# reg1 1 clock pin, placed
VERSION 5.8 ; 
DIVIDERCHAR "/" ;
BUSBITCHARS "[]" ;
DESIGN reg1 ;
UNITS DISTANCE MICRONS 100 ;
DIEAREA ( 0 0 ) ( 40000 40000 ) ;

COMPONENTS 5 ;
- r1 DFF_X1 + PLACED   ( 10000 20000 ) N ;
- r2 DFF_X1 + PLACED   ( 20000 10000 ) N ;
- r3 DFF_X1 + PLACED   ( 30000 30000 ) N ;
- u1 BUF_X1 + PLACED   ( 40000 10000 ) N ;
- u2 AND2_X1 + PLACED ( 10000 40000 ) N ;
END COMPONENTS

PINS 3 ;
    - in1 + NET in1 + DIRECTION INPUT + USE SIGNAL + FIXED ( 0 0 ) N + LAYER metal1 ( 0 0 ) ( 0 0 ) ;
    - in2 + NET in2 + DIRECTION INPUT + USE SIGNAL + FIXED ( 0 0 ) N + LAYER metal1 ( 0 0 ) ( 0 0 ) ;
    - clk + NET clk + DIRECTION INPUT + USE SIGNAL + FIXED ( 10000 3333 ) N + LAYER metal1 ( 0 0 ) ( 0 0 ) ;
    - out + NET out + DIRECTION OUTPUT + USE SIGNAL + FIXED ( 3333 10000 ) N + LAYER metal1 ( 0 0 ) ( 0 0 ) ;
END PINS

SPECIALNETS 2 ;
- VSS  ( * VSS )
  + USE GROUND ;
- VDD  ( * VDD )
  + USE POWER ;
END SPECIALNETS

NETS 10 ;
- in1 ( PIN in1 ) ( r1 D ) + USE SIGNAL ;
- in2 ( PIN in2 ) ( r2 D ) + USE SIGNAL ;
- clk ( PIN clk ) ( r1 CK ) ( r2 CK ) ( r3 CK ) + USE SIGNAL ;
- r1q ( r1 Q ) ( u2 A1 ) + USE SIGNAL ;
- r2q ( r2 Q ) ( u1 A ) + USE SIGNAL ;
- u1z ( u2 A2 ) ( u1 Z ) + USE SIGNAL ;
- u2z ( u2 ZN ) ( r3 D ) + USE SIGNAL ;
- out ( r3 Q ) ( PIN out ) + USE SIGNAL ;
END NETS

END DESIGN
