hisi_sas: add v2 hw ACPI support

Add support in v2 hw driver for ACPI.

A check on whether an ACPI handle is available for the device is used to
decide on whether to use ACPI reset handler or syscon

hisi_sas: add v2 hw ACPI support

Add support in v2 hw driver for ACPI.

A check on whether an ACPI handle is available for the device is used to
decide on whether to use ACPI reset handler or syscon for hw reset.

Signed-off-by: John Garry <john.garry@huawei.com>
Signed-off-by: Wei Xu <xuwei5@hisilicon.com>
Reviewed-by: Zhangfei Gao <zhangfei.gao@linaro.org>
Signed-off-by: Martin K. Petersen <martin.petersen@oracle.com>

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libata/libsas: Define ATA_CMD_NCQ_NON_DATA

Define the NCQ NON DATA command and update libsas to handle it
correctly.

Signed-off-by: Hannes Reinecke <hare@suse.com>
Signed-off-by: Tejun Heo <tj@kern

libata/libsas: Define ATA_CMD_NCQ_NON_DATA

Define the NCQ NON DATA command and update libsas to handle it
correctly.

Signed-off-by: Hannes Reinecke <hare@suse.com>
Signed-off-by: Tejun Heo <tj@kernel.org>

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libsas: enable FPDMA SEND/RECEIVE

Update libsas and dependent drivers to handle FPDMA
SEND/RECEIVE correctly.

Signed-off-by: Hannes Reinecke <hare@suse.com>
Signed-off-by: Tejun Heo <tj@kernel.org>

hisi_sas: add alloc_dev_quirk_v2_hw()

Add custom version of function to allocate device,
alloc_dev_quirk_v2_hw(). For sata devices the device id bit0 should be
0.

Signed-off-by: John Garry <john.g

hisi_sas: add alloc_dev_quirk_v2_hw()

Add custom version of function to allocate device,
alloc_dev_quirk_v2_hw(). For sata devices the device id bit0 should be
0.

Signed-off-by: John Garry <john.garry@huawei.com>
Reviewed-by: Hannes Reinicke <hare@suse.de>
Signed-off-by: Martin K. Petersen <martin.petersen@oracle.com>

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hisi_sas: add slot_index_alloc_quirk_v2_hw()

Add v2 hw custom function slot_index_alloc_quirk_v2_hw(). SAS devices
should have IPTT bit0 equal to 1.

Signed-off-by: John Garry <john.garry@huawei.co

hisi_sas: add slot_index_alloc_quirk_v2_hw()

Add v2 hw custom function slot_index_alloc_quirk_v2_hw(). SAS devices
should have IPTT bit0 equal to 1.

Signed-off-by: John Garry <john.garry@huawei.com>
Reviewed-by: Hannes Reinicke <hare@suse.de>
Signed-off-by: Martin K. Petersen <martin.petersen@oracle.com>

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hisi_sas: for v2 hw only set ITCT qw2 for SAS device

This patch fixes the ITCT table setup as it should be configured
differently for SAS and SATA devices. For SATA disks there is no need
to set qw

hisi_sas: for v2 hw only set ITCT qw2 for SAS device

This patch fixes the ITCT table setup as it should be configured
differently for SAS and SATA devices. For SATA disks there is no need
to set qw2 (already zeroed). Also, link parameters for Bus inactive
limit, max connection time limit, and reject to open limit timers
parameters are changed to match global config register,
MAX_CON_TIME_LIMIT_TIME, as recommended by hw team.

Signed-off-by: John Garry <john.garry@huawei.com>
Reviewed-by: Zhangfei Gao <zhangfei.gao@linaro.org>
Signed-off-by: Martin K. Petersen <martin.petersen@oracle.com>

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hisi_sas: add v2 hw support for >4 SATA phys

This patch adds support for directly attaching SATA disks to phy
4-8. The problem was that only registers concerned with phy 0-3 were
being considered in

hisi_sas: add v2 hw support for >4 SATA phys

This patch adds support for directly attaching SATA disks to phy
4-8. The problem was that only registers concerned with phy 0-3 were
being considered in sata_int_v2_hw(). The issue was not detected
previously as the development board only exposed phy 0-3; the new board
provides access to 8 phys.

Signed-off-by: John Garry <john.garry@huawei.com>
Reviewed-by: Zhangfei Gao <zhangfei.gao@linaro.org>
Signed-off-by: Martin K. Petersen <martin.petersen@oracle.com>

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hisi_sas: fix v2 hw multiple SATA disk issue

Intermittently it is found that when multiple SATA disks are directly
connected to the host that some disks are not detected. The problem is
that all se

hisi_sas: fix v2 hw multiple SATA disk issue

Intermittently it is found that when multiple SATA disks are directly
connected to the host that some disks are not detected. The problem is
that all set bitfields in ENT_INT_SRC1 are cleared for all phys in
sata_int_v2_hw() - it should clear the set bit for the phy being
serviced.

Also unnecessary double-write to ENT_INT_SRC1 and ENT_INT_SRC_MSK1 is
removed (remaining writes are done at end label).

Signed-off-by: John Garry <john.garry@huawei.com>
Reviewed-by: Zhangfei Gao <zhangfei.gao@linaro.org>
Signed-off-by: Martin K. Petersen <martin.petersen@oracle.com>

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hisi_sas: use device linkrate in MCR for v2 hw

Contrary to the field name, the MCR (max connection rate) in the ITCT
should hold the device linkrate (linkrate of the connected phy), and not
the max

hisi_sas: use device linkrate in MCR for v2 hw

Contrary to the field name, the MCR (max connection rate) in the ITCT
should hold the device linkrate (linkrate of the connected phy), and not
the max linkrate.

This fixes an issue seen where some SATA drives connected through an
expander which would not attach.

Signed-off-by: John Garry <john.garry@huawei.com>
Reviewed-by: Zhangfei Gao <zhangfei.gao@linaro.org>
Signed-off-by: Martin K. Petersen <martin.petersen@oracle.com>

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hisi_sas: use slot abort in v2 hw

When TRANS_TX_ERR_FRAME_TXED error occurs in
a slot, the command should be re-attempted.
This error is equivalent to meaning that the queue
is full in the sdev (and

hisi_sas: use slot abort in v2 hw

When TRANS_TX_ERR_FRAME_TXED error occurs in
a slot, the command should be re-attempted.
This error is equivalent to meaning that the queue
is full in the sdev (and not the host).
A superflous debug statement is also removed in the
slot complete handler.

Signed-off-by: John Garry <john.garry@huawei.com>
Reviewed-by: Hannes Reinecke <hare@suse.de>
Signed-off-by: Martin K. Petersen <martin.petersen@oracle.com>

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hisi_sas: add v2 tmf functions

Signed-off-by: John Garry <john.garry@huawei.com>
Reviewed-by: Hannes Reinecke <hare@suse.de>
Signed-off-by: Martin K. Petersen <martin.petersen@oracle.com>

hisi_sas: add v2 slot error handler

Signed-off-by: John Garry <john.garry@huawei.com>
Reviewed-by: Hannes Reinecke <hare@suse.de>
Signed-off-by: Martin K. Petersen <martin.petersen@oracle.com>

hisi_sas: add v2 path to send ATA command

Signed-off-by: John Garry <john.garry@huawei.com>
Reviewed-by: Hannes Reinecke <hare@suse.de>
Signed-off-by: Martin K. Petersen <martin.petersen@oracle.com>

hisi_sas: add v2 code for itct setup and free

Signed-off-by: John Garry <john.garry@huawei.com>
Reviewed-by: Hannes Reinecke <hare@suse.de>
Signed-off-by: Martin K. Petersen <martin.petersen@oracle.

hisi_sas: add v2 code for itct setup and free

Signed-off-by: John Garry <john.garry@huawei.com>
Reviewed-by: Hannes Reinecke <hare@suse.de>
Signed-off-by: Martin K. Petersen <martin.petersen@oracle.com>

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hisi_sas: add v2 code to send smp command

Signed-off-by: John Garry <john.garry@huawei.com>
Reviewed-by: Hannes Reinecke <hare@suse.de>
Signed-off-by: Martin K. Petersen <martin.petersen@oracle.com>

hisi_sas: add v2 path to send ssp frame

Include code to prep ssp frame and deliver to hardware.

Signed-off-by: John Garry <john.garry@huawei.com>
Reviewed-by: Hannes Reinecke <hare@suse.de>
Signed-

hisi_sas: add v2 path to send ssp frame

Include code to prep ssp frame and deliver to hardware.

Signed-off-by: John Garry <john.garry@huawei.com>
Reviewed-by: Hannes Reinecke <hare@suse.de>
Signed-off-by: Martin K. Petersen <martin.petersen@oracle.com>

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hisi_sas: add v2 cq interrupt handler

Also include slot_complete_v2_hw handler

Signed-off-by: John Garry <john.garry@huawei.com>
Reviewed-by: Hannes Reinecke <hare@suse.de>
Signed-off-by: Martin K.

hisi_sas: add v2 cq interrupt handler

Also include slot_complete_v2_hw handler

Signed-off-by: John Garry <john.garry@huawei.com>
Reviewed-by: Hannes Reinecke <hare@suse.de>
Signed-off-by: Martin K. Petersen <martin.petersen@oracle.com>

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hisi_sas: add v2 SATA interrupt handler

Signed-off-by: John Garry <john.garry@huawei.com>
Reviewed-by: Hannes Reinecke <hare@suse.de>
Signed-off-by: Martin K. Petersen <martin.petersen@oracle.com>

hisi_sas: add v2 channel interrupt handler

This also includes broadcast handler. Unlike v1 hw, broadcast does not
have its own dedicated interrupt.

Signed-off-by: John Garry <john.garry@huawei.com>

hisi_sas: add v2 channel interrupt handler

This also includes broadcast handler. Unlike v1 hw, broadcast does not
have its own dedicated interrupt.

Signed-off-by: John Garry <john.garry@huawei.com>
Reviewed-by: Hannes Reinecke <hare@suse.de>
Signed-off-by: Martin K. Petersen <martin.petersen@oracle.com>

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hisi_sas: add v2 phy down handler

Signed-off-by: John Garry <john.garry@huawei.com>
Reviewed-by: Hannes Reinecke <hare@suse.de>
Signed-off-by: Martin K. Petersen <martin.petersen@oracle.com>

hisi_sas: add v2 int init and phy up handler

Signed-off-by: John Garry <john.garry@huawei.com>
Reviewed-by: Hannes Reinecke <hare@suse.de>
Signed-off-by: Martin K. Petersen <martin.petersen@oracle.c

hisi_sas: add v2 int init and phy up handler

Signed-off-by: John Garry <john.garry@huawei.com>
Reviewed-by: Hannes Reinecke <hare@suse.de>
Signed-off-by: Martin K. Petersen <martin.petersen@oracle.com>

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hisi_sas: add v2 phy init code

Signed-off-by: John Garry <john.garry@huawei.com>
Reviewed-by: Hannes Reinecke <hare@suse.de>
Signed-off-by: Martin K. Petersen <martin.petersen@oracle.com>

hisi_sas: add init_id_frame_v2_hw()

Signed-off-by: John Garry <john.garry@huawei.com>
Reviewed-by: Hannes Reinecke <hare@suse.de>
Signed-off-by: Martin K. Petersen <martin.petersen@oracle.com>

hisi_sas: add v2 hw init

Add code to initialise the hardware.

Support is also added to deal with the "am-max-transmissions" (amt)
limitation in hip06 controller #1. This is how many connection requ

hisi_sas: add v2 hw init

Add code to initialise the hardware.

Support is also added to deal with the "am-max-transmissions" (amt)
limitation in hip06 controller #1. This is how many connection requests
we can send on the system bus before waiting for a response. Due to
chip bus design, controller #1 is limited to 32 amt, while, by design, a
controller supports 64. The default value for the nibbles in the
relevant registers is 0x40; these need to be programmed with 0x20.

Signed-off-by: John Garry <john.garry@huawei.com>
Reviewed-by: Hannes Reinecke <hare@suse.de>
Signed-off-by: Martin K. Petersen <martin.petersen@oracle.com>

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hisi_sas: add v2 register definitions

Signed-off-by: John Garry <john.garry@huawei.com>
Reviewed-by: Hannes Reinecke <hare@suse.de>
Signed-off-by: Martin K. Petersen <martin.petersen@oracle.com>