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01aea123 |
| 29-Apr-2024 |
Peter Griffin <peter.griffin@linaro.org> |
dt-bindings: clock: google,gs101-clock: add HSI2 clock management unit
Add dt schema documentation and clock IDs for the High Speed Interface 2 (HSI2) clock management unit. This CMU feeds high spee
dt-bindings: clock: google,gs101-clock: add HSI2 clock management unit
Add dt schema documentation and clock IDs for the High Speed Interface 2 (HSI2) clock management unit. This CMU feeds high speed interfaces such as PCIe and UFS.
[AD: * keep CMUs in google,gs101.h sorted alphabetically * resolve minor merge conflicts in google,gs101-clock.yaml * s/ufs_embd/ufs s/mmc_card/mmc
Signed-off-by: Peter Griffin <peter.griffin@linaro.org> Reviewed-by: Rob Herring (Arm) <robh@kernel.org> Signed-off-by: André Draszik <andre.draszik@linaro.org> Link: https://lore.kernel.org/r/20240429-hsi0-gs101-v3-1-f233be0a2455@linaro.org Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
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dbf76c0d |
| 23-Apr-2024 |
André Draszik <andre.draszik@linaro.org> |
dt-bindings: clock: google,gs101-clock: add HSI0 clock management unit
Add dt-schema documentation and clock IDs for the high speed interface 0 HSI0 clock management unit. This is used (amongst othe
dt-bindings: clock: google,gs101-clock: add HSI0 clock management unit
Add dt-schema documentation and clock IDs for the high speed interface 0 HSI0 clock management unit. This is used (amongst others) for USB.
While the usual (sed) script has been used to derive the linux clock IDs from the data sheet, one manual tweak was applied to fix a typo which we don't want to carry: HSI0_USPDPDBG_USER -> HSI0_USBDPDBG_USER (note USB vs USP).
Signed-off-by: André Draszik <andre.draszik@linaro.org> Reviewed-by: Rob Herring (Arm) <robh@kernel.org> Link: https://lore.kernel.org/r/20240423-hsi0-gs101-v1-1-2c3ddb50c720@linaro.org Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
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455061eb |
| 01-Feb-2024 |
André Draszik <andre.draszik@linaro.org> |
dt-bindings: clock: google,gs101-clock: add PERIC1 clock management unit
Add dt-schema documentation and clock IDs for the Connectivity Peripheral 1 (PERIC1) clock management unit.
Signed-off-by: A
dt-bindings: clock: google,gs101-clock: add PERIC1 clock management unit
Add dt-schema documentation and clock IDs for the Connectivity Peripheral 1 (PERIC1) clock management unit.
Signed-off-by: André Draszik <andre.draszik@linaro.org> Reviewed-by: Sam Protsenko <semen.protsenko@linaro.org> Reviewed-by: Peter Griffin <peter.griffin@linaro.org> Reviewed-by: Tudor Ambarus <tudor.ambarus@linaro.org> Reviewed-by: Rob Herring <robh@kernel.org> Link: https://lore.kernel.org/r/20240201161258.1013664-3-andre.draszik@linaro.org Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
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f80c4388 |
| 19-Jan-2024 |
Tudor Ambarus <tudor.ambarus@linaro.org> |
dt-bindings: clock: google,gs101-clock: add PERIC0 clock management unit
Add dt-schema documentation for the Connectivity Peripheral 0 (PERIC0) clock management unit.
Reviewed-by: Sam Protsenko <se
dt-bindings: clock: google,gs101-clock: add PERIC0 clock management unit
Add dt-schema documentation for the Connectivity Peripheral 0 (PERIC0) clock management unit.
Reviewed-by: Sam Protsenko <semen.protsenko@linaro.org> Reviewed-by: Peter Griffin <peter.griffin@linaro.org> Reviewed-by: Rob Herring <robh@kernel.org> Signed-off-by: Tudor Ambarus <tudor.ambarus@linaro.org> Link: https://lore.kernel.org/r/20240119111132.1290455-2-tudor.ambarus@linaro.org Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
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35f32e39 |
| 18-Dec-2023 |
Tudor Ambarus <tudor.ambarus@linaro.org> |
dt-bindings: clock: google,gs101: rename CMU_TOP gate defines
The gs101 clock defines from the bindings header are derived from the clock register names found in the datasheet under some certain rul
dt-bindings: clock: google,gs101: rename CMU_TOP gate defines
The gs101 clock defines from the bindings header are derived from the clock register names found in the datasheet under some certain rules.
The CMU TOP gate clock defines missed to include the required "CMU" differentiator which will cause collisions with the gate clock defines of other clock units. Rename the TOP gate clock defines to include "CMU".
Update the clock driver to use the new defines in order to not break compilation and bisect-ability. There are no device trees that use the previous defines.
Fixes: 0a910f160638 ("dt-bindings: clock: Add Google gs101 clock management unit bindings") Signed-off-by: Tudor Ambarus <tudor.ambarus@linaro.org> Reviewed-by: Sam Protsenko <semen.protsenko@linaro.org> Reviewed-by: Peter Griffin <peter.griffin@linaro.org> Link: https://lore.kernel.org/r/20231218064333.479885-1-tudor.ambarus@linaro.org Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
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5b02a863 |
| 11-Dec-2023 |
Peter Griffin <peter.griffin@linaro.org> |
dt-bindings: clock: google,gs101: fix incorrect numbering and DGB suffix
166 was skipped by mistake and two clocks: * CLK_MOUT_CMU_HSI0_USBDPDGB * CLK_GOUT_HSI0_USBDPDGB
Have an incorrect DGB endin
dt-bindings: clock: google,gs101: fix incorrect numbering and DGB suffix
166 was skipped by mistake and two clocks: * CLK_MOUT_CMU_HSI0_USBDPDGB * CLK_GOUT_HSI0_USBDPDGB
Have an incorrect DGB ending instead of DBG.
This is an ABI break, but as the patch was only applied yesterday this header has never been in an actual release so it seems better to fix this early than ignore it.
Fixes: 0a910f160638 ("dt-bindings: clock: Add Google gs101 clock management unit bindings") Signed-off-by: Peter Griffin <peter.griffin@linaro.org> Reviewed-by: Chanwoo Choi <cw00.choi@samsung.com> Reviewed-by: Sam Protsenko <semen.protsenko@linaro.org> Reviewed-by: André Draszik <andre.draszik@linaro.org> Link: https://lore.kernel.org/r/20231211162331.435900-7-peter.griffin@linaro.org Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
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0a910f16 |
| 09-Dec-2023 |
Peter Griffin <peter.griffin@linaro.org> |
dt-bindings: clock: Add Google gs101 clock management unit bindings
Provide dt-schema documentation for Google gs101 SoC clock controller. Currently this adds support for cmu_top, cmu_misc and cmu_a
dt-bindings: clock: Add Google gs101 clock management unit bindings
Provide dt-schema documentation for Google gs101 SoC clock controller. Currently this adds support for cmu_top, cmu_misc and cmu_apm.
Reviewed-by: Sam Protsenko <semen.protsenko@linaro.org> Signed-off-by: Peter Griffin <peter.griffin@linaro.org> Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Link: https://lore.kernel.org/r/20231209233106.147416-3-peter.griffin@linaro.org Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
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