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d1fb23d8 |
| 06-Aug-2020 |
skrll <skrll@NetBSD.org> |
Centralise SYNC/BDSYNC in asm.h and introduce a new LLCSCSYNC and use it before any ll/sc sequences.
Define LLSCSYNC as syncw; syncw for cnMIPS - issue two as early cnMIPS has errat{um,a} that means
Centralise SYNC/BDSYNC in asm.h and introduce a new LLCSCSYNC and use it before any ll/sc sequences.
Define LLSCSYNC as syncw; syncw for cnMIPS - issue two as early cnMIPS has errat{um,a} that means the first can fail.
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ed79f58c |
| 27-Aug-2011 |
bouyer <bouyer@NetBSD.org> |
loongson2f support: - Add some loongson2 definitions to cpuregs.h, from OpenBSD - Make sure that the at register is useable before every jump register instruction (exept when register is k0 or k1)
loongson2f support: - Add some loongson2 definitions to cpuregs.h, from OpenBSD - Make sure that the at register is useable before every jump register instruction (exept when register is k0 or k1) because -mfix-loongson2f-btb needs the at register for its workaround - add code to mips_fixup.c to handle the instructions added by -mfix-loongson2f-btb - Add a ls2-specific tlb miss handler: it doesn't have separate handler for the xtlbmiss exeption. - Fixes for some #ifdef MIPS3_LOONGSON2 assembly code (using the wrong register)
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