Lines Matching refs:log_id
215 return parent->hiername() + "." + log_id(instance->name); in hiername()
217 return log_id(module->name); in hiername()
302 log("[%s] eval %s (%s)\n", hiername().c_str(), log_id(cell), log_id(cell->type)); in update_cell()
322 …rning("Unsupported evaluable cell type: %s (%s.%s)\n", log_id(cell->type), log_id(module), log_id(… in update_cell()
326 …log_error("Unsupported cell type: %s (%s.%s)\n", log_id(cell->type), log_id(module), log_id(cell)); in update_cell()
340 …ory %s.%s has clocked read ports. Run 'memory' with -nordff.\n", log_id(module), log_id(mem.memid)… in update_memory()
507 string label = log_id(cell); in update_ph3()
515 log("Cover %s.%s (%s) reached.\n", hiername().c_str(), log_id(cell), label.c_str()); in update_ph3()
518 log("Assumption %s.%s (%s) failed.\n", hiername().c_str(), log_id(cell), label.c_str()); in update_ph3()
521 log_warning("Assert %s.%s (%s) failed.\n", hiername().c_str(), log_id(cell), label.c_str()); in update_ph3()
531 …ique: Writeback not possible. (Fix by running 'uniquify'.)\n", hiername().c_str(), log_id(module)); in writeback()
573 f << stringf("$scope module %s $end\n", log_id(name())); in write_vcd_header()
580 …"$var wire %d n%d %s%s $end\n", GetSize(wire), id, wire->name[0] == '$' ? "\\" : "", log_id(wire)); in write_vcd_header()
693 log_error("Can't find port %s on module %s.\n", log_id(portname), log_id(top->module)); in set_inports()