Lines Matching +refs:run +refs:args
76 void execute(std::vector<std::string> args, RTLIL::Design *design) override in execute()
82 for (argidx = 1; argidx < args.size(); argidx++) in execute()
84 if (args[argidx] == "-top" && argidx+1 < args.size()) { in execute()
85 top_opt = "-top " + args[++argidx]; in execute()
88 if (args[argidx] == "-family" && argidx+1 < args.size()) { in execute()
89 family = args[++argidx]; in execute()
92 if (args[argidx] == "-blif" && argidx+1 < args.size()) { in execute()
93 blif_file = args[++argidx]; in execute()
96 if (args[argidx] == "-verilog" && argidx+1 < args.size()) { in execute()
97 verilog_file = args[++argidx]; in execute()
100 if (args[argidx] == "-abc") { in execute()
106 extra_args(args, argidx, design); in execute()
130 …run(stringf("read_verilog -lib -specify +/quicklogic/cells_sim.v +/quicklogic/%s_cells_sim.v", fam… in script()
131 run("read_verilog -lib -specify +/quicklogic/lut_sim.v"); in script()
132 run(stringf("hierarchy -check %s", help_mode ? "-top <top>" : top_opt.c_str())); in script()
136 run("proc"); in script()
137 run("flatten"); in script()
138 run("tribuf -logic"); in script()
139 run("deminout"); in script()
140 run("opt_expr"); in script()
141 run("opt_clean"); in script()
142 run("check"); in script()
143 run("opt -nodffe -nosdff"); in script()
144 run("fsm"); in script()
145 run("opt"); in script()
146 run("wreduce"); in script()
147 run("peepopt"); in script()
148 run("opt_clean"); in script()
149 run("share"); in script()
150 run("techmap -map +/cmp2lut.v -D LUT_WIDTH=4"); in script()
151 run("opt_expr"); in script()
152 run("opt_clean"); in script()
153 run("alumacc"); in script()
154 run("pmuxtree"); in script()
155 run("opt"); in script()
156 run("memory -nomap"); in script()
157 run("opt_clean"); in script()
161 run("opt -fast -mux_undef -undriven -fine"); in script()
162 run("memory_map -iattr -attr !ram_block -attr !rom_block -attr logic_block " in script()
165 run("opt -undriven -fine"); in script()
169 run("techmap"); in script()
170 run("opt -fast"); in script()
171 run("muxcover -mux8 -mux4"); in script()
175 run("opt_expr"); in script()
176 run("dfflegalize -cell $_DFFSRE_PPPP_ 0 -cell $_DLATCH_?_ x"); in script()
178 …run(stringf("techmap -map +/quicklogic/%s_cells_map.v -map +/quicklogic/%s_ffs_map.v", family.c_st… in script()
180 run("opt_expr -mux_undef"); in script()
184 run(stringf("techmap -map +/quicklogic/%s_latches_map.v", family.c_str())); in script()
186 run("read_verilog -lib -specify -icells +/quicklogic/abc9_model.v"); in script()
187 run("techmap -map +/quicklogic/abc9_map.v"); in script()
188 run("abc9 -maxlut 4 -dff"); in script()
189 run("techmap -map +/quicklogic/abc9_unmap.v"); in script()
191 run("abc -luts 1,2,2,4 -dress"); in script()
193 run("clean"); in script()
197 run(stringf("techmap -map +/quicklogic/%s_lut_map.v", family.c_str())); in script()
198 run("clean"); in script()
202 run("autoname"); in script()
203 run("hierarchy -check"); in script()
204 run("stat"); in script()
205 run("check -noinit"); in script()
209 run("clkbufmap -inpad ckpad Q:P"); in script()
210 run("iopadmap -bits -outpad outpad A:P -inpad inpad Q:P -tinoutpad bipad EN:Q:A:P A:top"); in script()
214 run("setundef -zero -params -undriven"); in script()
215 run("hilomap -hicell logic_1 A -locell logic_0 A -singleton A:top"); in script()
216 run("opt_clean -purge"); in script()
217 run("check"); in script()
218 run("blackbox =A:whitebox"); in script()
223 run(stringf("write_blif -attr -param %s %s", top_opt.c_str(), blif_file.c_str())); in script()
229 run("write_verilog -noattr -nohex " + verilog_file); in script()