Lines Matching refs:dest
24 #define _absb_(src, dest) __asm__("absb %1, %0" : "=r" (dest) : \ argument
25 "r" ((char)src) , "0" (dest))
26 #define _absw_(src, dest) __asm__("absw %1,%0" : "=r" (dest) : \ argument
27 "r" ((short)src) , "0" (dest))
28 #define _absd_(src, dest) __asm__("absd %1, %0" : "=r" (dest) : \ argument
29 "r" ((int)src) , "0" (dest))
32 #define _addb_(src, dest) __asm__("addb %1, %0" : "=r" (dest) : \ argument
33 "ri" ((unsigned char)src), "0" (dest) : "cc")
34 #define _addub_(src, dest) __asm__("addub %1, %0" : "=r" (dest) : \ argument
35 "ri" ((unsigned char)src), "0" (dest) : "cc")
36 #define _addw_(src, dest) __asm__("addw %1, %0" : "=r" (dest) : \ argument
37 "ri" ((unsigned short)src), "0" (dest) : "cc")
38 #define _adduw_(src, dest) __asm__("adduw %1, %0" : "=r" (dest) : \ argument
39 "ri" ((unsigned short)src), "0" (dest) : "cc")
40 #define _addd_(src, dest) __asm__("addd %1, %0" : "=r" (dest) : \ argument
41 "ri" ((unsigned int)src), "0" (dest) : "cc")
42 #define _addud_(src, dest) __asm__("addud %1, %0" : "=r" (dest) : \ argument
43 "ri" ((unsigned int)src), "0" (dest) : "cc")
45 #define _addcb_(src, dest) __asm__("addcb %1, %0" : "=r" (dest) : \ argument
46 "ri" ((unsigned char)src), "0" (dest) : "cc")
47 #define _addcw_(src, dest) __asm__("addcw %1, %0" : "=r" (dest) : \ argument
48 "ri" ((unsigned short)src), "0" (dest) : "cc")
49 #define _addcd_(src, dest) __asm__("addcd %1, %0" : "=r" (dest) : \ argument
50 "ri" ((unsigned int)src), "0" (dest) : "cc")
52 #define _addqb_(src, dest) __asm__("addqb %1, %0" : "=r" (dest) : \ argument
53 "r" ((unsigned char)src), "0" (dest) : "cc")
54 #define _addqw_(src, dest) __asm__("addqw %1, %0" : "=r" (dest) : \ argument
55 "r" ((unsigned short)src), "0" (dest) : "cc")
56 #define _addqd_(src, dest) __asm__("addqd %1, %0" : "=r" (dest) : \ argument
57 "r" ((unsigned int)src), "0" (dest) : "cc")
61 #define _andb_(src, dest) __asm__("andb %1,%0" : "=r" (dest) : \ argument
62 "ri" ((unsigned char)src) , "0" (dest))
63 #define _andw_(src, dest) __asm__("andw %1,%0" : "=r" (dest) : \ argument
64 "ri" ((unsigned short)src) , "0" (dest))
65 #define _andd_(src, dest) __asm__("andd %1,%0" : "=r" (dest) : \ argument
66 "ri" ((unsigned int)src) , "0" (dest))
69 #define _bswap_(src, dest) __asm__("bswap %1,%0" : "=r" (dest) : \ argument
70 "r" ((unsigned int)src) , "0" (dest))
72 #define _cbitb_(pos, dest) __asm__("cbitb %1,%0" : "=mr" (dest) : \ argument
73 "i" ((unsigned char)pos) , "0" (dest) : "cc")
74 #define _cbitw_(pos, dest) __asm__("cbitw %1,%0" : "=mr" (dest) : \ argument
75 "i" ((unsigned char)pos) , "0" (dest) : "cc")
76 #define _cbitd_(pos, dest) __asm__("cbitd %1,%0" : "=r" (dest) : \ argument
77 "i" ((unsigned char)pos) , "0" (dest) : "cc")
88 #define _cntl1b_(src, dest) __asm__("cntl1b %1,%0" : "=r" (dest) : \ argument
89 "r" ((char)src) , "0" (dest))
90 #define _cntl1w_(src, dest) __asm__("cntl1w %1,%0" : "=r" (dest) : \ argument
91 "r" ((short)src) , "0" (dest))
92 #define _cntl1d_(src, dest) __asm__("cntl1d %1,%0" : "=r" (dest) : \ argument
93 "r" ((int)src) , "0" (dest))
96 #define _cntl0b_(src, dest) __asm__("cntl0b %1,%0" : "=r" (dest) : \ argument
97 "r" ((char)src) , "0" (dest))
98 #define _cntl0w_(src, dest) __asm__("cntl0w %1,%0" : "=r" (dest) : \ argument
99 "r" ((short)src) , "0" (dest))
100 #define _cntl0d_(src, dest) __asm__("cntl0d %1,%0" : "=r" (dest) : \ argument
101 "r" ((int)src) , "0" (dest))
104 #define _cntlsb_(src, dest) __asm__("cntlsb %1,%0" : "=r" (dest) : \ argument
105 "r" ((char)src) , "0" (dest))
106 #define _cntlsw_(src, dest) __asm__("cntlsw %1,%0" : "=r" (dest) : \ argument
107 "r" ((short)src) , "0" (dest))
108 #define _cntlsd_(src, dest) __asm__("cntlsd %1,%0" : "=r" (dest) : \ argument
109 "r" ((int)src) , "0" (dest))
126 #define _getrfid_(dest) __asm__("getrfid %0" : "=r" (dest) : \ argument
130 #define _loadb_(base,dest) __asm__("loadb %1,%0" : "=r" (dest) : \ argument
131 "m" (base) , "0" (dest))
132 #define _loadw_(base,dest) __asm__("loadw %1,%0" : "=r" (dest) : \ argument
133 "m" (base) , "0" (dest))
134 #define _loadd_(base,dest) __asm__("loadd %1,%0" : "=r" (dest) : \ argument
135 "m" (base) , "0" (dest))
175 #define _maxsb_(src, dest) __asm__("maxsb %1,%0" : "=r" (dest) : \ argument
176 "r" ((char)src) , "0" (dest))
177 #define _maxsw_(src, dest) __asm__("maxsw %1,%0" : "=r" (dest) : \ argument
178 "r" ((short)src) , "0" (dest))
179 #define _maxsd_(src, dest) __asm__("maxsd %1,%0" : "=r" (dest) : \ argument
180 "r" ((int)src) , "0" (dest))
181 #define _maxub_(src, dest) __asm__("maxub %1,%0" : "=r" (dest) : \ argument
182 "r" ((unsigned char)src) , "0" (dest))
183 #define _maxuw_(src, dest) __asm__("maxuw %1,%0" : "=r" (dest) : \ argument
184 "r" ((unsigned short)src) , "0" (dest))
185 #define _maxud_(src, dest) __asm__("maxud %1,%0" : "=r" (dest) : \ argument
186 "r" ((unsigned int)src) , "0" (dest))
189 #define _minsb_(src, dest) __asm__("minsb %1,%0" : "=r" (dest) : \ argument
190 "r" ((char)src) , "0" (dest))
191 #define _minsw_(src, dest) __asm__("minsw %1,%0" : "=r" (dest) : \ argument
192 "r" ((short)src) , "0" (dest))
193 #define _minsd_(src, dest) __asm__("minsd %1,%0" : "=r" (dest) : \ argument
194 "r" ((int)src) , "0" (dest))
195 #define _minub_(src, dest) __asm__("minub %1,%0" : "=r" (dest) : \ argument
196 "r" ((unsigned char)src) , "0" (dest))
197 #define _minuw_(src, dest) __asm__("minuw %1,%0" : "=r" (dest) : \ argument
198 "r" ((unsigned short)src) , "0" (dest))
199 #define _minud_(src, dest) __asm__("minud %1,%0" : "=r" (dest) : \ argument
200 "r" ((unsigned int)src) , "0" (dest))
203 #define _movb_(src, dest) __asm__("movb %1,%0" : "=r" (dest) : \ argument
204 "ri" ((unsigned char)src) , "0" (dest))
205 #define _movw_(src, dest) __asm__("movw %1,%0" : "=r" (dest) : \ argument
206 "ri" ((unsigned short)src) , "0" (dest))
207 #define _movd_(src, dest) __asm__("movd %1,%0" : "=r" (dest) : \ argument
208 "ri" ((unsigned int)src) , "0" (dest))
213 #define _mfpr_(procregd, dest) __asm__("mfpr\t" procregd ",%0" : "=r" (dest) : \ argument
214 /* no input */ "0" (dest) : "cc")
217 #define _mulsbw_(src, dest) __asm__("mulsbw %1,%0" : "=r" (dest) : \ argument
218 "r" ((char)src) , "0" (dest))
219 #define _mulubw_(src, dest) __asm__("mulubw %1,%0" : "=r" (dest) : \ argument
220 "r" ((unsigned char)src) , "0" (dest))
221 #define _mulswd_(src, dest) __asm__("mulswd %1,%0" : "=r" (dest) : \ argument
222 "r" ((short)src) , "0" (dest))
223 #define _muluwd_(src, dest) __asm__("muluwd %1,%0" : "=r" (dest) : \ argument
224 "r" ((unsigned short)src) , "0" (dest))
225 #define _mulb_(src, dest) __asm__("mulb %1,%0" : "=r" (dest) : \ argument
226 "ri" ((char)src) , "0" (dest))
227 #define _mulw_(src, dest) __asm__("mulw %1,%0" : "=r" (dest) : \ argument
228 "ri" ((short)src) , "0" (dest))
229 #define _muld_(src, dest) __asm__("muld %1,%0" : "=r" (dest) : \ argument
230 "ri" ((int)src) , "0" (dest))
239 #define _mulqb_(src, dest) __asm__("mulqb %1,%0" : "=r" (dest) : \ argument
240 "r" ((char)src) , "0" (dest))
241 #define _mulqw_(src, dest) __asm__("mulqw %1,%0" : "=r" (dest) : \ argument
242 "r" ((short)src) , "0" (dest))
248 #define _negb_(src, dest) __asm__("negb %1,%0" : "=r" (dest) : \ argument
249 "r" ((char)src) , "0" (dest))
250 #define _negw_(src, dest) __asm__("negw %1,%0" : "=r" (dest) : \ argument
251 "r" ((short)src) , "0" (dest))
252 #define _negd_(src, dest) __asm__("negd %1,%0" : "=r" (dest) : \ argument
253 "r" ((int)src) , "0" (dest))
256 #define _orb_(src, dest) __asm__("orb %1,%0" : "=r" (dest) : \ argument
257 "ri" ((unsigned char)src) , "0" (dest))
258 #define _orw_(src, dest) __asm__("orw %1,%0" : "=r" (dest) : \ argument
259 "ri" ((unsigned short)src) , "0" (dest))
260 #define _ord_(src, dest) __asm__("ord %1,%0" : "=r" (dest) : \ argument
261 "ri" ((unsigned int)src) , "0" (dest))
264 #define _popcntb_(src, dest) __asm__("popcntb %1,%0" : "=r" (dest) : \ argument
265 "r" ((char)src) , "0" (dest))
266 #define _popcntw_(src, dest) __asm__("popcntw %1,%0" : "=r" (dest) : \ argument
267 "r" ((short)src) , "0" (dest))
268 #define _popcntd_(src, dest) __asm__("popcntd %1,%0" : "=r" (dest) : \ argument
269 "r" ((int)src) , "0" (dest))
272 #define _ram_(shift, end, begin, dest, src) __asm__("ram %1, %2, %3, %0, %4" : \ argument
273 "=r" (dest) : \
276 "r" (src), "0" (dest))
277 #define _rim_(shift, end, begin, dest, src) __asm__("rim %1, %2, %3, %0, %4" : \ argument
278 "=r" (dest) : \
281 "r" (src), "0" (dest))
287 #define _rotb_(shift, dest) __asm__("rotb %1,%0" : "=r" (dest) : \ argument
288 "i" ((unsigned char)shift) , "0" (dest))
289 #define _rotw_(shift, dest) __asm__("rotw %1,%0" : "=r" (dest) : \ argument
290 "i" ((unsigned char)shift) , "0" (dest))
291 #define _rotd_(shift, dest) __asm__("rotd %1,%0" : "=r" (dest) : \ argument
292 "i" ((unsigned char)shift) , "0" (dest))
293 #define _rotlb_(shift, dest) __asm__("rotlb %1,%0" : "=r" (dest) : \ argument
294 "r" ((unsigned char)shift) , "0" (dest))
295 #define _rotlw_(shift, dest) __asm__("rotlw %1,%0" : "=r" (dest) : \ argument
296 "r" ((unsigned char)shift) , "0" (dest))
297 #define _rotld_(shift, dest) __asm__("rotld %1,%0" : "=r" (dest) : \ argument
298 "r" ((unsigned char)shift) , "0" (dest))
299 #define _rotrb_(shift, dest) __asm__("rotrb %1,%0" : "=r" (dest) : \ argument
300 "r" ((unsigned char)shift) , "0" (dest))
301 #define _rotrw_(shift, dest) __asm__("rotrw %1,%0" : "=r" (dest) : \ argument
302 "r" ((unsigned char)shift) , "0" (dest))
303 #define _rotrd_(shift, dest) __asm__("rotrd %1,%0" : "=r" (dest) : \ argument
304 "r" ((unsigned char)shift) , "0" (dest))
307 #define _sbitb_(pos,dest) __asm__("sbitb %1,%0" : "=mr" (dest) : \ argument
308 "i" ((unsigned char)pos) , "0" (dest) : "cc")
309 #define _sbitw_(pos,dest) __asm__("sbitw %1,%0" : "=mr" (dest) : \ argument
310 "i" ((unsigned char)pos) , "0" (dest) : "cc")
311 #define _sbitd_(pos,dest) __asm__("sbitd %1,%0" : "=mr" (dest) : \ argument
312 "i" ((unsigned char)pos) , "0" (dest) : "cc")
319 #define _sextbw_(src, dest) __asm__("sextbw %1,%0" : "=r" (dest) : \ argument
320 "r" ((char)src) , "0" (dest) )
321 #define _sextbd_(src, dest) __asm__("sextbd %1,%0" : "=r" (dest) : \ argument
322 "r" ((char)src) , "0" (dest) )
323 #define _sextwd_(src, dest) __asm__("sextwd %1,%0" : "=r" (dest) : \ argument
324 "r" ((short)src) , "0" (dest) )
327 #define _sllb_(src, dest) __asm__("sllb %1,%0" : "=r" (dest) : \ argument
328 "ri" ((unsigned char)src) , "0" (dest))
329 #define _sllw_(src, dest) __asm__("sllw %1,%0" : "=r" (dest) : \ argument
330 "ri" ((unsigned char)src) , "0" (dest))
331 #define _slld_(src, dest) __asm__("slld %1,%0" : "=r" (dest) : \ argument
332 "ri" ((unsigned char)src) , "0" (dest))
334 #define _srab_(src, dest) __asm__("srab %1,%0" : "=r" (dest) : \ argument
335 "ri" ((unsigned char)src) , "0" (dest))
336 #define _sraw_(src, dest) __asm__("sraw %1,%0" : "=r" (dest) : \ argument
337 "ri" ((unsigned char)src) , "0" (dest))
338 #define _srad_(src, dest) __asm__("srad %1,%0" : "=r" (dest) : \ argument
339 "ri" ((unsigned char)src) , "0" (dest))
342 #define _srlb_(src, dest) __asm__("srlb %1,%0" : "=r" (dest) : \ argument
343 "ri" ((unsigned char)src) , "0" (dest))
344 #define _srlw_(src, dest) __asm__("srlw %1,%0" : "=r" (dest) : \ argument
345 "ri" ((unsigned char)src) , "0" (dest))
346 #define _srld_(src, dest) __asm__("srld %1,%0" : "=r" (dest) : \ argument
347 "ri" ((unsigned char)src) , "0" (dest))
364 #define _subb_(src, dest) __asm__("subb %1, %0" : "=r" (dest) : \ argument
365 "ri" ((unsigned char)src), "0" (dest) : "cc")
366 #define _subw_(src, dest) __asm__("subw %1, %0" : "=r" (dest) : \ argument
367 "ri" ((unsigned short)src), "0" (dest) : "cc")
368 #define _subd_(src, dest) __asm__("subd %1, %0" : "=r" (dest) : \ argument
369 "ri" ((unsigned int)src), "0" (dest) : "cc")
372 #define _subcb_(src, dest) __asm__("subcb %1, %0" : "=r" (dest) : \ argument
373 "ri" ((unsigned char)src), "0" (dest) : "cc")
374 #define _subcw_(src, dest) __asm__("subcw %1, %0" : "=r" (dest) : \ argument
375 "ri" ((unsigned short)src), "0" (dest) : "cc")
376 #define _subcd_(src, dest) __asm__("subcd %1, %0" : "=r" (dest) : \ argument
377 "ri" ((unsigned int)src), "0" (dest) : "cc")
380 #define _subqb_(src, dest) __asm__("subqw %1,%0" : "=r" (dest) : \ argument
381 "r" ((char)src) , "0" (dest))
382 #define _subqw_(src, dest) __asm__("subqw %1,%0" : "=r" (dest) : \ argument
383 "r" ((short)src) , "0" (dest))
384 #define _subqd_(src, dest) __asm__("subqd %1,%0" : "=r" (dest) : \ argument
385 "r" ((short)src) , "0" (dest))
388 #define _tbitb_(pos,dest) __asm__("tbitb %0,%1" : /* No output */ : \ argument
389 "i" ((unsigned char)pos) , "rm" (dest) : "cc")
390 #define _tbitw_(pos,dest) __asm__("tbitw %0,%1" : /* No output */ : \ argument
391 "i" ((unsigned char)pos) , "rm" (dest) : "cc")
392 #define _tbitd_(pos,dest) __asm__("tbitd %0,%1" : /* No output */ : \ argument
393 "i" ((unsigned char)pos) , "rm" (dest) : "cc")
399 #define _xorb_(src, dest) __asm__("xorb %1,%0" : "=r" (dest) : \ argument
400 "ri" ((unsigned char)src) , "0" (dest))
401 #define _xorw_(src, dest) __asm__("xorw %1,%0" : "=r" (dest) : \ argument
402 "ri" ((unsigned short)src) , "0" (dest))
403 #define _xord_(src, dest) __asm__("xord %1,%0" : "=r" (dest) : \ argument
404 "ri" ((unsigned int)src) , "0" (dest))
407 #define _zextbw_(src, dest) __asm__("zextbw %1,%0" : "=r" (dest) : \ argument
408 "r" ((unsigned char)src) , "0" (dest))
409 #define _zextbd_(src, dest) __asm__("zextbd %1,%0" : "=r" (dest) : \ argument
410 "r" ((unsigned char)src) , "0" (dest))
411 #define _zextwd_(src, dest) __asm__("zextwd %1,%0" : "=r" (dest) : \ argument
412 "r" ((unsigned short)src) , "0" (dest))