Lines Matching refs:GFX6
2 ; RUN: llc -mtriple=amdgcn-amd-amdpal -mcpu=tahiti < %s | FileCheck --check-prefix=GFX6 %s
8 ; GFX6-LABEL: v_ssubsat_i8:
9 ; GFX6: ; %bb.0:
10 ; GFX6-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
11 ; GFX6-NEXT: v_bfe_i32 v1, v1, 0, 8
12 ; GFX6-NEXT: v_bfe_i32 v0, v0, 0, 8
13 ; GFX6-NEXT: v_sub_i32_e32 v0, vcc, v0, v1
14 ; GFX6-NEXT: v_min_i32_e32 v0, 0x7f, v0
15 ; GFX6-NEXT: v_max_i32_e32 v0, 0xffffff80, v0
16 ; GFX6-NEXT: s_setpc_b64 s[30:31]
49 ; GFX6-LABEL: v_ssubsat_i16:
50 ; GFX6: ; %bb.0:
51 ; GFX6-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
52 ; GFX6-NEXT: v_bfe_i32 v1, v1, 0, 16
53 ; GFX6-NEXT: v_bfe_i32 v0, v0, 0, 16
54 ; GFX6-NEXT: v_sub_i32_e32 v0, vcc, v0, v1
55 ; GFX6-NEXT: v_min_i32_e32 v0, 0x7fff, v0
56 ; GFX6-NEXT: v_max_i32_e32 v0, 0xffff8000, v0
57 ; GFX6-NEXT: s_setpc_b64 s[30:31]
90 ; GFX6-LABEL: v_ssubsat_i32:
91 ; GFX6: ; %bb.0:
92 ; GFX6-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
93 ; GFX6-NEXT: v_cmp_lt_i32_e32 vcc, 0, v1
94 ; GFX6-NEXT: v_sub_i32_e64 v1, s[4:5], v0, v1
95 ; GFX6-NEXT: v_cmp_lt_i32_e64 s[4:5], v1, v0
96 ; GFX6-NEXT: v_bfrev_b32_e32 v0, 1
97 ; GFX6-NEXT: v_bfrev_b32_e32 v2, -2
98 ; GFX6-NEXT: v_cmp_gt_i32_e64 s[6:7], 0, v1
99 ; GFX6-NEXT: v_cndmask_b32_e64 v0, v0, v2, s[6:7]
100 ; GFX6-NEXT: s_xor_b64 vcc, vcc, s[4:5]
101 ; GFX6-NEXT: v_cndmask_b32_e32 v0, v1, v0, vcc
102 ; GFX6-NEXT: s_setpc_b64 s[30:31]
135 ; GFX6-LABEL: v_ssubsat_v2i16:
136 ; GFX6: ; %bb.0:
137 ; GFX6-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
138 ; GFX6-NEXT: v_bfe_i32 v2, v2, 0, 16
139 ; GFX6-NEXT: v_bfe_i32 v0, v0, 0, 16
140 ; GFX6-NEXT: v_bfe_i32 v3, v3, 0, 16
141 ; GFX6-NEXT: v_bfe_i32 v1, v1, 0, 16
142 ; GFX6-NEXT: v_sub_i32_e32 v1, vcc, v1, v3
143 ; GFX6-NEXT: s_movk_i32 s4, 0x7fff
144 ; GFX6-NEXT: v_sub_i32_e32 v0, vcc, v0, v2
145 ; GFX6-NEXT: v_min_i32_e32 v1, s4, v1
146 ; GFX6-NEXT: s_movk_i32 s5, 0x8000
147 ; GFX6-NEXT: v_min_i32_e32 v0, s4, v0
148 ; GFX6-NEXT: v_max_i32_e32 v1, s5, v1
149 ; GFX6-NEXT: v_max_i32_e32 v0, s5, v0
150 ; GFX6-NEXT: v_lshlrev_b32_e32 v1, 16, v1
151 ; GFX6-NEXT: v_and_b32_e32 v0, 0xffff, v0
152 ; GFX6-NEXT: v_or_b32_e32 v0, v0, v1
153 ; GFX6-NEXT: v_lshrrev_b32_e32 v1, 16, v0
154 ; GFX6-NEXT: s_setpc_b64 s[30:31]
198 ; GFX6-LABEL: v_ssubsat_v3i16:
199 ; GFX6: ; %bb.0:
200 ; GFX6-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
201 ; GFX6-NEXT: v_bfe_i32 v3, v3, 0, 16
202 ; GFX6-NEXT: v_bfe_i32 v0, v0, 0, 16
203 ; GFX6-NEXT: v_bfe_i32 v4, v4, 0, 16
204 ; GFX6-NEXT: v_bfe_i32 v1, v1, 0, 16
205 ; GFX6-NEXT: v_bfe_i32 v5, v5, 0, 16
206 ; GFX6-NEXT: v_bfe_i32 v2, v2, 0, 16
207 ; GFX6-NEXT: v_sub_i32_e32 v1, vcc, v1, v4
208 ; GFX6-NEXT: s_movk_i32 s4, 0x7fff
209 ; GFX6-NEXT: v_sub_i32_e32 v0, vcc, v0, v3
210 ; GFX6-NEXT: v_sub_i32_e32 v2, vcc, v2, v5
211 ; GFX6-NEXT: v_min_i32_e32 v1, s4, v1
212 ; GFX6-NEXT: s_movk_i32 s5, 0x8000
213 ; GFX6-NEXT: v_min_i32_e32 v0, s4, v0
214 ; GFX6-NEXT: v_max_i32_e32 v1, s5, v1
215 ; GFX6-NEXT: v_min_i32_e32 v2, s4, v2
216 ; GFX6-NEXT: v_max_i32_e32 v0, s5, v0
217 ; GFX6-NEXT: s_mov_b32 s6, 0xffff
218 ; GFX6-NEXT: v_max_i32_e32 v3, s5, v2
219 ; GFX6-NEXT: v_lshlrev_b32_e32 v1, 16, v1
220 ; GFX6-NEXT: v_and_b32_e32 v0, s6, v0
221 ; GFX6-NEXT: v_or_b32_e32 v0, v0, v1
222 ; GFX6-NEXT: v_and_b32_e32 v2, s6, v3
223 ; GFX6-NEXT: v_alignbit_b32 v1, v3, v1, 16
224 ; GFX6-NEXT: s_setpc_b64 s[30:31]
277 ; GFX6-LABEL: v_ssubsat_v4i16:
278 ; GFX6: ; %bb.0:
279 ; GFX6-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
280 ; GFX6-NEXT: v_bfe_i32 v4, v4, 0, 16
281 ; GFX6-NEXT: v_bfe_i32 v0, v0, 0, 16
282 ; GFX6-NEXT: v_bfe_i32 v5, v5, 0, 16
283 ; GFX6-NEXT: v_bfe_i32 v1, v1, 0, 16
284 ; GFX6-NEXT: v_sub_i32_e32 v1, vcc, v1, v5
285 ; GFX6-NEXT: s_movk_i32 s4, 0x7fff
286 ; GFX6-NEXT: v_sub_i32_e32 v0, vcc, v0, v4
287 ; GFX6-NEXT: v_min_i32_e32 v1, s4, v1
288 ; GFX6-NEXT: s_movk_i32 s5, 0x8000
289 ; GFX6-NEXT: v_min_i32_e32 v0, s4, v0
290 ; GFX6-NEXT: v_max_i32_e32 v1, s5, v1
291 ; GFX6-NEXT: v_max_i32_e32 v0, s5, v0
292 ; GFX6-NEXT: s_mov_b32 s6, 0xffff
293 ; GFX6-NEXT: v_bfe_i32 v6, v6, 0, 16
294 ; GFX6-NEXT: v_bfe_i32 v2, v2, 0, 16
295 ; GFX6-NEXT: v_bfe_i32 v7, v7, 0, 16
296 ; GFX6-NEXT: v_bfe_i32 v3, v3, 0, 16
297 ; GFX6-NEXT: v_lshlrev_b32_e32 v1, 16, v1
298 ; GFX6-NEXT: v_and_b32_e32 v0, s6, v0
299 ; GFX6-NEXT: v_sub_i32_e32 v2, vcc, v2, v6
300 ; GFX6-NEXT: v_or_b32_e32 v0, v0, v1
301 ; GFX6-NEXT: v_sub_i32_e32 v1, vcc, v3, v7
302 ; GFX6-NEXT: v_min_i32_e32 v1, s4, v1
303 ; GFX6-NEXT: v_min_i32_e32 v2, s4, v2
304 ; GFX6-NEXT: v_max_i32_e32 v1, s5, v1
305 ; GFX6-NEXT: v_max_i32_e32 v2, s5, v2
306 ; GFX6-NEXT: v_lshlrev_b32_e32 v1, 16, v1
307 ; GFX6-NEXT: v_and_b32_e32 v2, s6, v2
308 ; GFX6-NEXT: v_or_b32_e32 v1, v2, v1
309 ; GFX6-NEXT: s_setpc_b64 s[30:31]
374 ; GFX6-LABEL: v_ssubsat_v2i32:
375 ; GFX6: ; %bb.0:
376 ; GFX6-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
377 ; GFX6-NEXT: v_cmp_lt_i32_e32 vcc, 0, v2
378 ; GFX6-NEXT: v_sub_i32_e64 v2, s[4:5], v0, v2
379 ; GFX6-NEXT: v_cmp_lt_i32_e64 s[4:5], v2, v0
380 ; GFX6-NEXT: v_bfrev_b32_e32 v4, 1
381 ; GFX6-NEXT: v_bfrev_b32_e32 v5, -2
382 ; GFX6-NEXT: v_cmp_gt_i32_e64 s[6:7], 0, v2
383 ; GFX6-NEXT: v_cndmask_b32_e64 v0, v4, v5, s[6:7]
384 ; GFX6-NEXT: s_xor_b64 vcc, vcc, s[4:5]
385 ; GFX6-NEXT: v_cndmask_b32_e32 v0, v2, v0, vcc
386 ; GFX6-NEXT: v_sub_i32_e64 v2, s[4:5], v1, v3
387 ; GFX6-NEXT: v_cmp_lt_i32_e32 vcc, 0, v3
388 ; GFX6-NEXT: v_cmp_lt_i32_e64 s[4:5], v2, v1
389 ; GFX6-NEXT: v_cmp_gt_i32_e64 s[6:7], 0, v2
390 ; GFX6-NEXT: v_cndmask_b32_e64 v1, v4, v5, s[6:7]
391 ; GFX6-NEXT: s_xor_b64 vcc, vcc, s[4:5]
392 ; GFX6-NEXT: v_cndmask_b32_e32 v1, v2, v1, vcc
393 ; GFX6-NEXT: s_setpc_b64 s[30:31]
435 ; GFX6-LABEL: v_ssubsat_v3i32:
436 ; GFX6: ; %bb.0:
437 ; GFX6-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
438 ; GFX6-NEXT: v_cmp_lt_i32_e32 vcc, 0, v3
439 ; GFX6-NEXT: v_sub_i32_e64 v3, s[4:5], v0, v3
440 ; GFX6-NEXT: v_cmp_lt_i32_e64 s[4:5], v3, v0
441 ; GFX6-NEXT: v_bfrev_b32_e32 v6, 1
442 ; GFX6-NEXT: v_bfrev_b32_e32 v7, -2
443 ; GFX6-NEXT: v_cmp_gt_i32_e64 s[6:7], 0, v3
444 ; GFX6-NEXT: v_cndmask_b32_e64 v0, v6, v7, s[6:7]
445 ; GFX6-NEXT: s_xor_b64 vcc, vcc, s[4:5]
446 ; GFX6-NEXT: v_cndmask_b32_e32 v0, v3, v0, vcc
447 ; GFX6-NEXT: v_sub_i32_e64 v3, s[4:5], v1, v4
448 ; GFX6-NEXT: v_cmp_lt_i32_e32 vcc, 0, v4
449 ; GFX6-NEXT: v_cmp_lt_i32_e64 s[4:5], v3, v1
450 ; GFX6-NEXT: v_cmp_gt_i32_e64 s[6:7], 0, v3
451 ; GFX6-NEXT: v_cndmask_b32_e64 v1, v6, v7, s[6:7]
452 ; GFX6-NEXT: s_xor_b64 vcc, vcc, s[4:5]
453 ; GFX6-NEXT: v_cndmask_b32_e32 v1, v3, v1, vcc
454 ; GFX6-NEXT: v_sub_i32_e64 v3, s[4:5], v2, v5
455 ; GFX6-NEXT: v_cmp_lt_i32_e32 vcc, 0, v5
456 ; GFX6-NEXT: v_cmp_lt_i32_e64 s[4:5], v3, v2
457 ; GFX6-NEXT: v_cmp_gt_i32_e64 s[6:7], 0, v3
458 ; GFX6-NEXT: v_cndmask_b32_e64 v2, v6, v7, s[6:7]
459 ; GFX6-NEXT: s_xor_b64 vcc, vcc, s[4:5]
460 ; GFX6-NEXT: v_cndmask_b32_e32 v2, v3, v2, vcc
461 ; GFX6-NEXT: s_setpc_b64 s[30:31]
512 ; GFX6-LABEL: v_ssubsat_v4i32:
513 ; GFX6: ; %bb.0:
514 ; GFX6-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
515 ; GFX6-NEXT: v_cmp_lt_i32_e32 vcc, 0, v4
516 ; GFX6-NEXT: v_sub_i32_e64 v4, s[4:5], v0, v4
517 ; GFX6-NEXT: v_cmp_lt_i32_e64 s[4:5], v4, v0
518 ; GFX6-NEXT: v_bfrev_b32_e32 v8, 1
519 ; GFX6-NEXT: v_bfrev_b32_e32 v9, -2
520 ; GFX6-NEXT: v_cmp_gt_i32_e64 s[6:7], 0, v4
521 ; GFX6-NEXT: v_cndmask_b32_e64 v0, v8, v9, s[6:7]
522 ; GFX6-NEXT: s_xor_b64 vcc, vcc, s[4:5]
523 ; GFX6-NEXT: v_cndmask_b32_e32 v0, v4, v0, vcc
524 ; GFX6-NEXT: v_sub_i32_e64 v4, s[4:5], v1, v5
525 ; GFX6-NEXT: v_cmp_lt_i32_e32 vcc, 0, v5
526 ; GFX6-NEXT: v_cmp_lt_i32_e64 s[4:5], v4, v1
527 ; GFX6-NEXT: v_cmp_gt_i32_e64 s[6:7], 0, v4
528 ; GFX6-NEXT: v_cndmask_b32_e64 v1, v8, v9, s[6:7]
529 ; GFX6-NEXT: s_xor_b64 vcc, vcc, s[4:5]
530 ; GFX6-NEXT: v_cndmask_b32_e32 v1, v4, v1, vcc
531 ; GFX6-NEXT: v_sub_i32_e64 v4, s[4:5], v2, v6
532 ; GFX6-NEXT: v_cmp_lt_i32_e32 vcc, 0, v6
533 ; GFX6-NEXT: v_cmp_lt_i32_e64 s[4:5], v4, v2
534 ; GFX6-NEXT: v_cmp_gt_i32_e64 s[6:7], 0, v4
535 ; GFX6-NEXT: v_cndmask_b32_e64 v2, v8, v9, s[6:7]
536 ; GFX6-NEXT: s_xor_b64 vcc, vcc, s[4:5]
537 ; GFX6-NEXT: v_cndmask_b32_e32 v2, v4, v2, vcc
538 ; GFX6-NEXT: v_sub_i32_e64 v4, s[4:5], v3, v7
539 ; GFX6-NEXT: v_cmp_lt_i32_e32 vcc, 0, v7
540 ; GFX6-NEXT: v_cmp_lt_i32_e64 s[4:5], v4, v3
541 ; GFX6-NEXT: v_cmp_gt_i32_e64 s[6:7], 0, v4
542 ; GFX6-NEXT: v_cndmask_b32_e64 v3, v8, v9, s[6:7]
543 ; GFX6-NEXT: s_xor_b64 vcc, vcc, s[4:5]
544 ; GFX6-NEXT: v_cndmask_b32_e32 v3, v4, v3, vcc
545 ; GFX6-NEXT: s_setpc_b64 s[30:31]
605 ; GFX6-LABEL: v_ssubsat_v8i32:
606 ; GFX6: ; %bb.0:
607 ; GFX6-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
608 ; GFX6-NEXT: v_cmp_lt_i32_e32 vcc, 0, v8
609 ; GFX6-NEXT: v_sub_i32_e64 v8, s[4:5], v0, v8
610 ; GFX6-NEXT: v_cmp_lt_i32_e64 s[4:5], v8, v0
611 ; GFX6-NEXT: v_bfrev_b32_e32 v16, 1
612 ; GFX6-NEXT: v_bfrev_b32_e32 v17, -2
613 ; GFX6-NEXT: v_cmp_gt_i32_e64 s[6:7], 0, v8
614 ; GFX6-NEXT: v_cndmask_b32_e64 v0, v16, v17, s[6:7]
615 ; GFX6-NEXT: s_xor_b64 vcc, vcc, s[4:5]
616 ; GFX6-NEXT: v_cndmask_b32_e32 v0, v8, v0, vcc
617 ; GFX6-NEXT: v_sub_i32_e64 v8, s[4:5], v1, v9
618 ; GFX6-NEXT: v_cmp_lt_i32_e32 vcc, 0, v9
619 ; GFX6-NEXT: v_cmp_lt_i32_e64 s[4:5], v8, v1
620 ; GFX6-NEXT: v_cmp_gt_i32_e64 s[6:7], 0, v8
621 ; GFX6-NEXT: v_cndmask_b32_e64 v1, v16, v17, s[6:7]
622 ; GFX6-NEXT: s_xor_b64 vcc, vcc, s[4:5]
623 ; GFX6-NEXT: v_cndmask_b32_e32 v1, v8, v1, vcc
624 ; GFX6-NEXT: v_sub_i32_e64 v8, s[4:5], v2, v10
625 ; GFX6-NEXT: v_cmp_lt_i32_e32 vcc, 0, v10
626 ; GFX6-NEXT: v_cmp_lt_i32_e64 s[4:5], v8, v2
627 ; GFX6-NEXT: v_cmp_gt_i32_e64 s[6:7], 0, v8
628 ; GFX6-NEXT: v_cndmask_b32_e64 v2, v16, v17, s[6:7]
629 ; GFX6-NEXT: s_xor_b64 vcc, vcc, s[4:5]
630 ; GFX6-NEXT: v_cndmask_b32_e32 v2, v8, v2, vcc
631 ; GFX6-NEXT: v_sub_i32_e64 v8, s[4:5], v3, v11
632 ; GFX6-NEXT: v_cmp_lt_i32_e32 vcc, 0, v11
633 ; GFX6-NEXT: v_cmp_lt_i32_e64 s[4:5], v8, v3
634 ; GFX6-NEXT: v_cmp_gt_i32_e64 s[6:7], 0, v8
635 ; GFX6-NEXT: v_cndmask_b32_e64 v3, v16, v17, s[6:7]
636 ; GFX6-NEXT: s_xor_b64 vcc, vcc, s[4:5]
637 ; GFX6-NEXT: v_cndmask_b32_e32 v3, v8, v3, vcc
638 ; GFX6-NEXT: v_sub_i32_e64 v8, s[4:5], v4, v12
639 ; GFX6-NEXT: v_cmp_lt_i32_e32 vcc, 0, v12
640 ; GFX6-NEXT: v_cmp_lt_i32_e64 s[4:5], v8, v4
641 ; GFX6-NEXT: v_cmp_gt_i32_e64 s[6:7], 0, v8
642 ; GFX6-NEXT: v_cndmask_b32_e64 v4, v16, v17, s[6:7]
643 ; GFX6-NEXT: s_xor_b64 vcc, vcc, s[4:5]
644 ; GFX6-NEXT: v_cndmask_b32_e32 v4, v8, v4, vcc
645 ; GFX6-NEXT: v_sub_i32_e64 v8, s[4:5], v5, v13
646 ; GFX6-NEXT: v_cmp_lt_i32_e32 vcc, 0, v13
647 ; GFX6-NEXT: v_cmp_lt_i32_e64 s[4:5], v8, v5
648 ; GFX6-NEXT: v_cmp_gt_i32_e64 s[6:7], 0, v8
649 ; GFX6-NEXT: v_cndmask_b32_e64 v5, v16, v17, s[6:7]
650 ; GFX6-NEXT: s_xor_b64 vcc, vcc, s[4:5]
651 ; GFX6-NEXT: v_cndmask_b32_e32 v5, v8, v5, vcc
652 ; GFX6-NEXT: v_sub_i32_e64 v8, s[4:5], v6, v14
653 ; GFX6-NEXT: v_cmp_lt_i32_e32 vcc, 0, v14
654 ; GFX6-NEXT: v_cmp_lt_i32_e64 s[4:5], v8, v6
655 ; GFX6-NEXT: v_cmp_gt_i32_e64 s[6:7], 0, v8
656 ; GFX6-NEXT: v_cndmask_b32_e64 v6, v16, v17, s[6:7]
657 ; GFX6-NEXT: s_xor_b64 vcc, vcc, s[4:5]
658 ; GFX6-NEXT: v_cndmask_b32_e32 v6, v8, v6, vcc
659 ; GFX6-NEXT: v_sub_i32_e64 v8, s[4:5], v7, v15
660 ; GFX6-NEXT: v_cmp_lt_i32_e32 vcc, 0, v15
661 ; GFX6-NEXT: v_cmp_lt_i32_e64 s[4:5], v8, v7
662 ; GFX6-NEXT: v_cmp_gt_i32_e64 s[6:7], 0, v8
663 ; GFX6-NEXT: v_cndmask_b32_e64 v7, v16, v17, s[6:7]
664 ; GFX6-NEXT: s_xor_b64 vcc, vcc, s[4:5]
665 ; GFX6-NEXT: v_cndmask_b32_e32 v7, v8, v7, vcc
666 ; GFX6-NEXT: s_setpc_b64 s[30:31]
762 ; GFX6-LABEL: v_ssubsat_v16i32:
763 ; GFX6: ; %bb.0:
764 ; GFX6-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
765 ; GFX6-NEXT: v_cmp_lt_i32_e32 vcc, 0, v16
766 ; GFX6-NEXT: v_sub_i32_e64 v16, s[4:5], v0, v16
767 ; GFX6-NEXT: v_cmp_lt_i32_e64 s[4:5], v16, v0
768 ; GFX6-NEXT: v_bfrev_b32_e32 v32, 1
769 ; GFX6-NEXT: v_bfrev_b32_e32 v33, -2
770 ; GFX6-NEXT: v_cmp_gt_i32_e64 s[6:7], 0, v16
771 ; GFX6-NEXT: v_cndmask_b32_e64 v0, v32, v33, s[6:7]
772 ; GFX6-NEXT: s_xor_b64 vcc, vcc, s[4:5]
773 ; GFX6-NEXT: v_cndmask_b32_e32 v0, v16, v0, vcc
774 ; GFX6-NEXT: v_sub_i32_e64 v16, s[4:5], v1, v17
775 ; GFX6-NEXT: v_cmp_lt_i32_e32 vcc, 0, v17
776 ; GFX6-NEXT: v_cmp_lt_i32_e64 s[4:5], v16, v1
777 ; GFX6-NEXT: v_cmp_gt_i32_e64 s[6:7], 0, v16
778 ; GFX6-NEXT: v_cndmask_b32_e64 v1, v32, v33, s[6:7]
779 ; GFX6-NEXT: s_xor_b64 vcc, vcc, s[4:5]
780 ; GFX6-NEXT: v_cndmask_b32_e32 v1, v16, v1, vcc
781 ; GFX6-NEXT: v_sub_i32_e64 v16, s[4:5], v2, v18
782 ; GFX6-NEXT: v_cmp_lt_i32_e32 vcc, 0, v18
783 ; GFX6-NEXT: v_cmp_lt_i32_e64 s[4:5], v16, v2
784 ; GFX6-NEXT: v_cmp_gt_i32_e64 s[6:7], 0, v16
785 ; GFX6-NEXT: v_cndmask_b32_e64 v2, v32, v33, s[6:7]
786 ; GFX6-NEXT: s_xor_b64 vcc, vcc, s[4:5]
787 ; GFX6-NEXT: v_cndmask_b32_e32 v2, v16, v2, vcc
788 ; GFX6-NEXT: v_sub_i32_e64 v16, s[4:5], v3, v19
789 ; GFX6-NEXT: v_cmp_lt_i32_e32 vcc, 0, v19
790 ; GFX6-NEXT: v_cmp_lt_i32_e64 s[4:5], v16, v3
791 ; GFX6-NEXT: v_cmp_gt_i32_e64 s[6:7], 0, v16
792 ; GFX6-NEXT: v_cndmask_b32_e64 v3, v32, v33, s[6:7]
793 ; GFX6-NEXT: s_xor_b64 vcc, vcc, s[4:5]
794 ; GFX6-NEXT: v_cndmask_b32_e32 v3, v16, v3, vcc
795 ; GFX6-NEXT: v_sub_i32_e64 v16, s[4:5], v4, v20
796 ; GFX6-NEXT: v_cmp_lt_i32_e32 vcc, 0, v20
797 ; GFX6-NEXT: v_cmp_lt_i32_e64 s[4:5], v16, v4
798 ; GFX6-NEXT: v_cmp_gt_i32_e64 s[6:7], 0, v16
799 ; GFX6-NEXT: v_cndmask_b32_e64 v4, v32, v33, s[6:7]
800 ; GFX6-NEXT: s_xor_b64 vcc, vcc, s[4:5]
801 ; GFX6-NEXT: v_cndmask_b32_e32 v4, v16, v4, vcc
802 ; GFX6-NEXT: v_sub_i32_e64 v16, s[4:5], v5, v21
803 ; GFX6-NEXT: v_cmp_lt_i32_e32 vcc, 0, v21
804 ; GFX6-NEXT: v_cmp_lt_i32_e64 s[4:5], v16, v5
805 ; GFX6-NEXT: v_cmp_gt_i32_e64 s[6:7], 0, v16
806 ; GFX6-NEXT: v_cndmask_b32_e64 v5, v32, v33, s[6:7]
807 ; GFX6-NEXT: s_xor_b64 vcc, vcc, s[4:5]
808 ; GFX6-NEXT: v_cndmask_b32_e32 v5, v16, v5, vcc
809 ; GFX6-NEXT: v_sub_i32_e64 v16, s[4:5], v6, v22
810 ; GFX6-NEXT: v_cmp_lt_i32_e32 vcc, 0, v22
811 ; GFX6-NEXT: v_cmp_lt_i32_e64 s[4:5], v16, v6
812 ; GFX6-NEXT: v_cmp_gt_i32_e64 s[6:7], 0, v16
813 ; GFX6-NEXT: v_cndmask_b32_e64 v6, v32, v33, s[6:7]
814 ; GFX6-NEXT: s_xor_b64 vcc, vcc, s[4:5]
815 ; GFX6-NEXT: v_cndmask_b32_e32 v6, v16, v6, vcc
816 ; GFX6-NEXT: v_sub_i32_e64 v16, s[4:5], v7, v23
817 ; GFX6-NEXT: v_cmp_lt_i32_e32 vcc, 0, v23
818 ; GFX6-NEXT: v_cmp_lt_i32_e64 s[4:5], v16, v7
819 ; GFX6-NEXT: v_cmp_gt_i32_e64 s[6:7], 0, v16
820 ; GFX6-NEXT: v_cndmask_b32_e64 v7, v32, v33, s[6:7]
821 ; GFX6-NEXT: s_xor_b64 vcc, vcc, s[4:5]
822 ; GFX6-NEXT: v_cndmask_b32_e32 v7, v16, v7, vcc
823 ; GFX6-NEXT: v_sub_i32_e64 v16, s[4:5], v8, v24
824 ; GFX6-NEXT: v_cmp_lt_i32_e32 vcc, 0, v24
825 ; GFX6-NEXT: v_cmp_lt_i32_e64 s[4:5], v16, v8
826 ; GFX6-NEXT: v_cmp_gt_i32_e64 s[6:7], 0, v16
827 ; GFX6-NEXT: v_cndmask_b32_e64 v8, v32, v33, s[6:7]
828 ; GFX6-NEXT: s_xor_b64 vcc, vcc, s[4:5]
829 ; GFX6-NEXT: v_cndmask_b32_e32 v8, v16, v8, vcc
830 ; GFX6-NEXT: v_sub_i32_e64 v16, s[4:5], v9, v25
831 ; GFX6-NEXT: v_cmp_lt_i32_e32 vcc, 0, v25
832 ; GFX6-NEXT: v_cmp_lt_i32_e64 s[4:5], v16, v9
833 ; GFX6-NEXT: v_cmp_gt_i32_e64 s[6:7], 0, v16
834 ; GFX6-NEXT: v_cndmask_b32_e64 v9, v32, v33, s[6:7]
835 ; GFX6-NEXT: s_xor_b64 vcc, vcc, s[4:5]
836 ; GFX6-NEXT: v_cndmask_b32_e32 v9, v16, v9, vcc
837 ; GFX6-NEXT: v_sub_i32_e64 v16, s[4:5], v10, v26
838 ; GFX6-NEXT: v_cmp_lt_i32_e32 vcc, 0, v26
839 ; GFX6-NEXT: v_cmp_lt_i32_e64 s[4:5], v16, v10
840 ; GFX6-NEXT: v_cmp_gt_i32_e64 s[6:7], 0, v16
841 ; GFX6-NEXT: v_cndmask_b32_e64 v10, v32, v33, s[6:7]
842 ; GFX6-NEXT: s_xor_b64 vcc, vcc, s[4:5]
843 ; GFX6-NEXT: v_cndmask_b32_e32 v10, v16, v10, vcc
844 ; GFX6-NEXT: v_sub_i32_e64 v16, s[4:5], v11, v27
845 ; GFX6-NEXT: v_cmp_lt_i32_e32 vcc, 0, v27
846 ; GFX6-NEXT: v_cmp_lt_i32_e64 s[4:5], v16, v11
847 ; GFX6-NEXT: v_cmp_gt_i32_e64 s[6:7], 0, v16
848 ; GFX6-NEXT: v_cndmask_b32_e64 v11, v32, v33, s[6:7]
849 ; GFX6-NEXT: s_xor_b64 vcc, vcc, s[4:5]
850 ; GFX6-NEXT: v_cndmask_b32_e32 v11, v16, v11, vcc
851 ; GFX6-NEXT: v_sub_i32_e64 v16, s[4:5], v12, v28
852 ; GFX6-NEXT: v_cmp_lt_i32_e32 vcc, 0, v28
853 ; GFX6-NEXT: v_cmp_lt_i32_e64 s[4:5], v16, v12
854 ; GFX6-NEXT: v_cmp_gt_i32_e64 s[6:7], 0, v16
855 ; GFX6-NEXT: v_cndmask_b32_e64 v12, v32, v33, s[6:7]
856 ; GFX6-NEXT: s_xor_b64 vcc, vcc, s[4:5]
857 ; GFX6-NEXT: v_cndmask_b32_e32 v12, v16, v12, vcc
858 ; GFX6-NEXT: v_sub_i32_e64 v16, s[4:5], v13, v29
859 ; GFX6-NEXT: v_cmp_lt_i32_e32 vcc, 0, v29
860 ; GFX6-NEXT: v_cmp_lt_i32_e64 s[4:5], v16, v13
861 ; GFX6-NEXT: v_cmp_gt_i32_e64 s[6:7], 0, v16
862 ; GFX6-NEXT: v_cndmask_b32_e64 v13, v32, v33, s[6:7]
863 ; GFX6-NEXT: s_xor_b64 vcc, vcc, s[4:5]
864 ; GFX6-NEXT: v_cndmask_b32_e32 v13, v16, v13, vcc
865 ; GFX6-NEXT: v_sub_i32_e64 v16, s[4:5], v14, v30
866 ; GFX6-NEXT: v_cmp_lt_i32_e32 vcc, 0, v30
867 ; GFX6-NEXT: v_cmp_lt_i32_e64 s[4:5], v16, v14
868 ; GFX6-NEXT: v_cmp_gt_i32_e64 s[6:7], 0, v16
869 ; GFX6-NEXT: v_cndmask_b32_e64 v14, v32, v33, s[6:7]
870 ; GFX6-NEXT: s_xor_b64 vcc, vcc, s[4:5]
871 ; GFX6-NEXT: v_cndmask_b32_e32 v14, v16, v14, vcc
872 ; GFX6-NEXT: v_sub_i32_e64 v16, s[4:5], v15, v31
873 ; GFX6-NEXT: v_cmp_lt_i32_e32 vcc, 0, v31
874 ; GFX6-NEXT: v_cmp_lt_i32_e64 s[4:5], v16, v15
875 ; GFX6-NEXT: v_cmp_gt_i32_e64 s[6:7], 0, v16
876 ; GFX6-NEXT: v_cndmask_b32_e64 v15, v32, v33, s[6:7]
877 ; GFX6-NEXT: s_xor_b64 vcc, vcc, s[4:5]
878 ; GFX6-NEXT: v_cndmask_b32_e32 v15, v16, v15, vcc
879 ; GFX6-NEXT: s_setpc_b64 s[30:31]
1048 ; GFX6-LABEL: v_ssubsat_i64:
1049 ; GFX6: ; %bb.0:
1050 ; GFX6-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
1051 ; GFX6-NEXT: v_sub_i32_e32 v4, vcc, v0, v2
1052 ; GFX6-NEXT: v_subb_u32_e32 v5, vcc, v1, v3, vcc
1053 ; GFX6-NEXT: v_cmp_lt_i64_e32 vcc, v[4:5], v[0:1]
1054 ; GFX6-NEXT: v_cmp_lt_i64_e64 s[4:5], 0, v[2:3]
1055 ; GFX6-NEXT: v_bfrev_b32_e32 v1, 1
1056 ; GFX6-NEXT: s_xor_b64 vcc, s[4:5], vcc
1057 ; GFX6-NEXT: v_cmp_gt_i64_e64 s[4:5], 0, v[4:5]
1058 ; GFX6-NEXT: v_bfrev_b32_e32 v2, -2
1059 ; GFX6-NEXT: v_ashrrev_i32_e32 v0, 31, v5
1060 ; GFX6-NEXT: v_cndmask_b32_e64 v1, v1, v2, s[4:5]
1061 ; GFX6-NEXT: v_cndmask_b32_e32 v0, v4, v0, vcc
1062 ; GFX6-NEXT: v_cndmask_b32_e32 v1, v5, v1, vcc
1063 ; GFX6-NEXT: s_setpc_b64 s[30:31]