Lines Matching refs:timer
189 s.timer[i].tn = i; in init()
190 s.timer[i].timer_id = in init()
192 bx_pc_system.setTimerParam(s.timer[i].timer_id, i); in init()
203 HPETTimer *timer = &s.timer[i]; in reset() local
205 hpet_del_timer(timer); in reset()
206 timer->cmp = ~BX_CONST64(0); in reset()
207 timer->period = ~BX_CONST64(0); in reset()
208 timer->config = HPET_TN_PERIODIC_CAP | HPET_TN_SIZE_CAP | (HPET_ROUTING_CAP << 32); in reset()
209 timer->last_checked = BX_CONST64(0); in reset()
229 BXRS_HEX_PARAM_FIELD(tim, config, s.timer[i].config); in register_state()
230 BXRS_HEX_PARAM_FIELD(tim, cmp, s.timer[i].cmp); in register_state()
231 BXRS_HEX_PARAM_FIELD(tim, fsb, s.timer[i].fsb); in register_state()
232 BXRS_DEC_PARAM_FIELD(tim, period, s.timer[i].period); in register_state()
261 void bx_hpet_c::update_irq(HPETTimer *timer, bool set) in update_irq() argument
265 BX_DEBUG(("Timer %d irq level set to %d", timer->tn, set)); in update_irq()
267 if ((timer->tn <= 1) && hpet_in_legacy_mode()) { in update_irq()
272 route = (timer->tn == 0) ? 0 : RTC_ISA_IRQ; in update_irq()
274 route = timer_int_route(timer); in update_irq()
276 mask = (BX_CONST64(1) << timer->tn); in update_irq()
280 if (timer->config & HPET_TN_TYPE_LEVEL) { in update_irq()
286 if (timer_enabled(timer)) { in update_irq()
287 if (timer_fsb_route(timer)) { in update_irq()
288 Bit32u val32 = (Bit32u)timer->fsb; in update_irq()
289 … DEV_MEM_WRITE_PHYSICAL((bx_phy_address) (timer->fsb >> 32), sizeof(Bit32u), (Bit8u *) &val32); in update_irq()
290 } else if (timer->config & HPET_TN_TYPE_LEVEL) { in update_irq()
308 HPETTimer *t = &s.timer[bx_pc_system.triggeredTimerParam()]; in hpet_timer()
439 HPETTimer *timer = &s.timer[id]; in read_aligned() local
442 value = (Bit32u)timer->config; in read_aligned()
445 value = (Bit32u)(timer->config >> 32); in read_aligned()
448 value = (Bit32u)timer->cmp; in read_aligned()
451 value = (Bit32u)(timer->cmp >> 32); in read_aligned()
454 value = (Bit32u)timer->fsb; in read_aligned()
457 value = (Bit32u)(timer->fsb >> 32); in read_aligned()
489 if (timer_enabled(&s.timer[i]) && (s.isr & (BX_CONST64(1) << i))) { in write_aligned()
490 update_irq(&s.timer[i], 1); in write_aligned()
492 hpet_set_timer(&s.timer[i]); in write_aligned()
498 hpet_del_timer(&s.timer[i]); in write_aligned()
519 update_irq(&s.timer[i], 0); in write_aligned()
532 s.timer[i].last_checked = s.hpet_counter; in write_aligned()
542 s.timer[i].last_checked = s.hpet_counter; in write_aligned()
555 HPETTimer *timer = &s.timer[id]; in write_aligned() local
559 timer->config = (timer->config & BX_CONST64(0xffffffff00000000)) | val; in write_aligned()
560 if (timer->config & HPET_TN_32BIT) { in write_aligned()
561 timer->cmp = (Bit32u)timer->cmp; in write_aligned()
562 timer->period = (Bit32u)timer->period; in write_aligned()
564 if (timer_fsb_route(timer) || !(timer->config & HPET_TN_TYPE_LEVEL)) { in write_aligned()
567 if (timer_enabled(timer) && hpet_enabled()) { in write_aligned()
569 update_irq(timer, 1); in write_aligned()
571 update_irq(timer, 0); in write_aligned()
575 hpet_set_timer(timer); in write_aligned()
581 if (!timer_is_periodic(timer) || (timer->config & HPET_TN_SETVAL)) { in write_aligned()
582 timer->cmp = (timer->cmp & BX_CONST64(0xffffffff00000000)) | new_val; in write_aligned()
584 timer->period = (timer->period & BX_CONST64(0xffffffff00000000)) | new_val; in write_aligned()
585 timer->config &= ~HPET_TN_SETVAL; in write_aligned()
587 hpet_set_timer(timer); in write_aligned()
591 if (timer->config & HPET_TN_32BIT) break; in write_aligned()
592 if (!timer_is_periodic(timer) || (timer->config & HPET_TN_SETVAL)) { in write_aligned()
593 timer->cmp = (timer->cmp & BX_CONST64(0xffffffff)) | (new_val << 32); in write_aligned()
595 timer->period = (timer->period & BX_CONST64(0xffffffff)) | (new_val << 32); in write_aligned()
596 timer->config &= ~HPET_TN_SETVAL; in write_aligned()
598 hpet_set_timer(timer); in write_aligned()
602 timer->fsb = (timer->fsb & BX_CONST64(0xffffffff00000000)) | new_val; in write_aligned()
605 timer->fsb = (new_val << 32) | (timer->fsb & 0xffffffff); in write_aligned()
629 HPETTimer *timer = &s.timer[i]; in debug_dump() local
630 dbg_printf("timer #%d (%d-bit)\n", i, ((timer->config & HPET_TN_32BIT) > 0) ? 32:64); in debug_dump()
631 dbg_printf("interrupt enable = %d\n", timer_enabled(timer) > 0); in debug_dump()
632 dbg_printf("periodic mode = %d\n", timer_is_periodic(timer) > 0); in debug_dump()
633 dbg_printf("level sensitive = %d\n", (timer->config & HPET_TN_TYPE_LEVEL) > 0); in debug_dump()
634 if (timer->config & HPET_TN_32BIT) { in debug_dump()
635 dbg_printf("comparator value = 0x%08x\n", (Bit32u)timer->cmp); in debug_dump()
636 dbg_printf("period = 0x%08x\n", (Bit32u)timer->period); in debug_dump()
638 dbg_printf("comparator value = 0x" FMT_LL "x\n", timer->cmp); in debug_dump()
639 dbg_printf("period = 0x" FMT_LL "x\n", timer->period); in debug_dump()