Lines Matching refs:desc

16 #define AA_USED(desc,x)             do { (desc).regin[0] |= 1 << (x); } while(0)  argument
17 #define AA_MODIFIED(desc,x) do { (desc).regout[0] |= 1 << (x); } while(0) argument
18 #define AB_USED(desc,x) do { (desc).regin[0] |= 1 << (8+(x)); } while(0) argument
19 #define AB_MODIFIED(desc,x) do { (desc).regout[0] |= 1 << (8+(x)); } while(0) argument
20 #define MA_USED(desc,x) do { (desc).regin[0] |= 1 << (16+(x)); } while(0) argument
21 #define MA_MODIFIED(desc,x) do { (desc).regout[0] |= 1 << (16+(x)); } while(0) argument
22 #define MB_USED(desc,x) do { (desc).regin[0] |= 1 << (24+(x)); } while(0) argument
23 #define MB_MODIFIED(desc,x) do { (desc).regout[0] |= 1 << (24+(x)); } while(0) argument
24 #define AR_USED(desc,x) do { (desc).regin[1] |= 1 << (24+(x)); } while(0) argument
25 #define AR_MODIFIED(desc,x) do { (desc).regout[1] |= 1 << (24+(x)); } while(0) argument
27 #define AZ_USED(desc) do { (desc).regin[1] |= 1 << 0; } while (0) argument
28 #define AZ_MODIFIED(desc) do { (desc).regout[1] |= 1 << 0; } while (0) argument
29 #define AN_USED(desc) do { (desc).regin[1] |= 1 << 1; } while (0) argument
30 #define AN_MODIFIED(desc) do { (desc).regout[1] |= 1 << 1; } while (0) argument
31 #define AV_USED(desc) do { (desc).regin[1] |= 1 << 2; } while (0) argument
32 #define AV_MODIFIED(desc) do { (desc).regout[1] |= 1 << 2; } while (0) argument
33 #define AU_USED(desc) do { (desc).regin[1] |= 1 << 3; } while (0) argument
34 #define AU_MODIFIED(desc) do { (desc).regout[1] |= 1 << 3; } while (0) argument
35 #define AD_USED(desc) do { (desc).regin[1] |= 1 << 4; } while (0) argument
36 #define AD_MODIFIED(desc) do { (desc).regout[1] |= 1 << 4; } while (0) argument
37 #define ZC_USED(desc) do { (desc).regin[1] |= 1 << 5; } while (0) argument
38 #define ZC_MODIFIED(desc) do { (desc).regout[1] |= 1 << 5; } while (0) argument
39 #define IL_USED(desc) do { (desc).regin[1] |= 1 << 6; } while (0) argument
40 #define IL_MODIFIED(desc) do { (desc).regout[1] |= 1 << 6; } while (0) argument
41 #define NR_USED(desc) do { (desc).regin[1] |= 1 << 7; } while (0) argument
42 #define NR_MODIFIED(desc) do { (desc).regout[1] |= 1 << 7; } while (0) argument
43 #define ZD_USED(desc) do { (desc).regin[1] |= 1 << 8; } while (0) argument
44 #define ZD_MODIFIED(desc) do { (desc).regout[1] |= 1 << 8; } while (0) argument
45 #define MN_USED(desc) do { (desc).regin[1] |= 1 << 9; } while (0) argument
46 #define MN_MODIFIED(desc) do { (desc).regout[1] |= 1 << 9; } while (0) argument
47 #define MZ_USED(desc) do { (desc).regin[1] |= 1 << 10; } while (0) argument
48 #define MZ_MODIFIED(desc) do { (desc).regout[1] |= 1 << 10; } while (0) argument
49 #define MV_USED(desc) do { (desc).regin[1] |= 1 << 11; } while (0) argument
50 #define MV_MODIFIED(desc) do { (desc).regout[1] |= 1 << 11; } while (0) argument
51 #define MU_USED(desc) do { (desc).regin[1] |= 1 << 12; } while (0) argument
52 #define MU_MODIFIED(desc) do { (desc).regout[1] |= 1 << 12; } while (0) argument
53 #define MD_USED(desc) do { (desc).regin[1] |= 1 << 13; } while (0) argument
54 #define MD_MODIFIED(desc) do { (desc).regout[1] |= 1 << 13; } while (0) argument
64 bool mb86235_frontend::describe(opcode_desc &desc, const opcode_desc *prev) in describe() argument
66 uint64_t opcode = desc.opptr.q[0] = m_core->m_pcache.read_qword(desc.pc, 0); in describe()
68 desc.length = 1; in describe()
69 desc.cycles = 1; in describe()
76 desc.flags |= OPFLAG_IS_BRANCH_TARGET; in describe()
77 desc.userflags |= OP_USERFLAG_REPEATED_OP; in describe()
84 describe_alu(desc, (opcode >> 42) & 0x7ffff); in describe()
85 describe_mul(desc, (opcode >> 27) & 0x7fff); in describe()
86 describe_double_xfer1(desc); in describe()
89 describe_alu(desc, (opcode >> 42) & 0x7ffff); in describe()
90 describe_mul(desc, (opcode >> 27) & 0x7fff); in describe()
91 describe_xfer1(desc); in describe()
94 describe_alu(desc, (opcode >> 42) & 0x7ffff); in describe()
95 describe_mul(desc, (opcode >> 27) & 0x7fff); in describe()
96 describe_control(desc); in describe()
100 describe_alu(desc, (opcode >> 42) & 0x7ffff); in describe()
102 describe_mul(desc, (opcode >> 42) & 0x7fff); in describe()
103 describe_double_xfer2(desc); in describe()
107 describe_alu(desc, (opcode >> 42) & 0x7ffff); in describe()
109 describe_mul(desc, (opcode >> 42) & 0x7fff); in describe()
110 describe_xfer2(desc); in describe()
114 describe_alu(desc, (opcode >> 42) & 0x7ffff); in describe()
116 describe_mul(desc, (opcode >> 42) & 0x7fff); in describe()
117 describe_control(desc); in describe()
120 describe_xfer3(desc); in describe()
130 void mb86235_frontend::describe_alu_input(opcode_desc &desc, int reg) in describe_alu_input() argument
135 AA_USED(desc, reg & 7); in describe_alu_input()
139 AB_USED(desc, reg & 7); in describe_alu_input()
146 desc.userflags &= ~OP_USERFLAG_PR_MASK; in describe_alu_input()
147 desc.userflags |= OP_USERFLAG_PR_INC; in describe_alu_input()
150 desc.userflags &= ~OP_USERFLAG_PR_MASK; in describe_alu_input()
151 desc.userflags |= OP_USERFLAG_PR_DEC; in describe_alu_input()
154 desc.userflags &= ~OP_USERFLAG_PR_MASK; in describe_alu_input()
155 desc.userflags |= OP_USERFLAG_PR_ZERO; in describe_alu_input()
164 void mb86235_frontend::describe_mul_input(opcode_desc &desc, int reg) in describe_mul_input() argument
169 MA_USED(desc, reg & 7); in describe_mul_input()
173 MB_USED(desc, reg & 7); in describe_mul_input()
180 if ((desc.userflags & OP_USERFLAG_PR_MASK) == 0) // ALU PR update has higher priority in describe_mul_input()
182 desc.userflags |= OP_USERFLAG_PR_INC; in describe_mul_input()
186 if ((desc.userflags & OP_USERFLAG_PR_MASK) == 0) // ALU PR update has higher priority in describe_mul_input()
188 desc.userflags |= OP_USERFLAG_PR_DEC; in describe_mul_input()
192 if ((desc.userflags & OP_USERFLAG_PR_MASK) == 0) // ALU PR update has higher priority in describe_mul_input()
194 desc.userflags |= OP_USERFLAG_PR_ZERO; in describe_mul_input()
203 void mb86235_frontend::describe_alumul_output(opcode_desc &desc, int reg) in describe_alumul_output() argument
208 MA_MODIFIED(desc, reg & 7); in describe_alumul_output()
212 MB_MODIFIED(desc, reg & 7); in describe_alumul_output()
216 AA_MODIFIED(desc, reg & 7); in describe_alumul_output()
220 AB_MODIFIED(desc, reg & 7); in describe_alumul_output()
228 void mb86235_frontend::describe_reg_read(opcode_desc &desc, int reg) in describe_reg_read() argument
234 MA_USED(desc, reg & 7); in describe_reg_read()
238 AA_USED(desc, reg & 7); in describe_reg_read()
242 AR_USED(desc, reg & 7); in describe_reg_read()
246 MB_USED(desc, reg & 7); in describe_reg_read()
250 AB_USED(desc, reg & 7); in describe_reg_read()
254 desc.userflags |= OP_USERFLAG_FIFOIN; in describe_reg_read()
255 desc.flags |= OPFLAG_IS_BRANCH_TARGET; // fifo check makes this a branch target in describe_reg_read()
277 …if ((desc.userflags & OP_USERFLAG_PR_MASK) == 0) // ALU and MUL PR updates have higher prio… in describe_reg_read()
279 desc.userflags |= OP_USERFLAG_PR_INC; in describe_reg_read()
285 void mb86235_frontend::describe_reg_write(opcode_desc &desc, int reg) in describe_reg_write() argument
291 MA_MODIFIED(desc, reg & 7); in describe_reg_write()
295 AA_MODIFIED(desc, reg & 7); in describe_reg_write()
299 AR_MODIFIED(desc, reg & 7); in describe_reg_write()
303 MB_MODIFIED(desc, reg & 7); in describe_reg_write()
307 AB_MODIFIED(desc, reg & 7); in describe_reg_write()
314 desc.userflags |= OP_USERFLAG_FIFOOUT0; in describe_reg_write()
315 desc.flags |= OPFLAG_IS_BRANCH_TARGET; // fifo check makes this a branch target in describe_reg_write()
318 desc.userflags |= OP_USERFLAG_FIFOOUT1; in describe_reg_write()
319 desc.flags |= OPFLAG_IS_BRANCH_TARGET; // fifo check makes this a branch target in describe_reg_write()
336 desc.userflags &= ~OP_USERFLAG_PW_MASK; in describe_reg_write()
337 desc.userflags |= OP_USERFLAG_PW_INC; in describe_reg_write()
343 void mb86235_frontend::describe_alu(opcode_desc &desc, uint32_t aluop) in describe_alu() argument
353 describe_alu_input(desc, i1); describe_alu_input(desc, i2); describe_alumul_output(desc, io); in describe_alu()
354 AN_MODIFIED(desc); in describe_alu()
355 AZ_MODIFIED(desc); in describe_alu()
356 AV_MODIFIED(desc); in describe_alu()
357 AU_MODIFIED(desc); in describe_alu()
360 describe_alu_input(desc, i1); describe_alu_input(desc, i2); describe_alumul_output(desc, io); in describe_alu()
361 ZC_MODIFIED(desc); in describe_alu()
362 AN_MODIFIED(desc); in describe_alu()
363 AZ_MODIFIED(desc); in describe_alu()
364 AV_MODIFIED(desc); in describe_alu()
365 AU_MODIFIED(desc); in describe_alu()
366 AD_MODIFIED(desc); in describe_alu()
369 describe_alu_input(desc, i1); describe_alu_input(desc, i2); describe_alumul_output(desc, io); in describe_alu()
370 AN_MODIFIED(desc); in describe_alu()
371 AZ_MODIFIED(desc); in describe_alu()
372 AV_MODIFIED(desc); in describe_alu()
373 AU_MODIFIED(desc); in describe_alu()
374 AD_MODIFIED(desc); in describe_alu()
377 describe_alu_input(desc, i1); describe_alu_input(desc, i2); describe_alumul_output(desc, io); in describe_alu()
378 ZC_MODIFIED(desc); in describe_alu()
379 AN_MODIFIED(desc); in describe_alu()
380 AZ_MODIFIED(desc); in describe_alu()
381 AV_MODIFIED(desc); in describe_alu()
382 AU_MODIFIED(desc); in describe_alu()
383 AD_MODIFIED(desc); in describe_alu()
386 describe_alu_input(desc, i1); describe_alu_input(desc, i2); in describe_alu()
387 AN_MODIFIED(desc); in describe_alu()
388 AZ_MODIFIED(desc); in describe_alu()
389 AV_MODIFIED(desc); in describe_alu()
390 AU_MODIFIED(desc); in describe_alu()
391 AD_MODIFIED(desc); in describe_alu()
394 describe_alu_input(desc, i1); describe_alumul_output(desc, io); in describe_alu()
395 AN_MODIFIED(desc); in describe_alu()
396 AZ_MODIFIED(desc); in describe_alu()
397 AD_MODIFIED(desc); in describe_alu()
400 describe_alu_input(desc, i1); describe_alu_input(desc, i2); describe_alumul_output(desc, io); in describe_alu()
401 AN_MODIFIED(desc); in describe_alu()
402 AZ_MODIFIED(desc); in describe_alu()
403 AU_MODIFIED(desc); in describe_alu()
404 AD_MODIFIED(desc); in describe_alu()
409 describe_alu_input(desc, i1); describe_alumul_output(desc, io); in describe_alu()
410 AN_MODIFIED(desc); in describe_alu()
411 AZ_MODIFIED(desc); in describe_alu()
412 AV_MODIFIED(desc); in describe_alu()
413 AD_MODIFIED(desc); in describe_alu()
416 describe_alu_input(desc, i1); describe_alumul_output(desc, io); in describe_alu()
417 AN_MODIFIED(desc); in describe_alu()
418 AZ_MODIFIED(desc); in describe_alu()
419 AU_MODIFIED(desc); in describe_alu()
420 AD_MODIFIED(desc); in describe_alu()
423 describe_alu_input(desc, i1); describe_alumul_output(desc, io); in describe_alu()
424 ZD_MODIFIED(desc); in describe_alu()
425 AN_MODIFIED(desc); in describe_alu()
426 AZ_MODIFIED(desc); in describe_alu()
427 AU_MODIFIED(desc); in describe_alu()
428 AD_MODIFIED(desc); in describe_alu()
431 describe_alu_input(desc, i1); describe_alumul_output(desc, io); in describe_alu()
432 NR_MODIFIED(desc); in describe_alu()
433 AN_MODIFIED(desc); in describe_alu()
434 AZ_MODIFIED(desc); in describe_alu()
435 AU_MODIFIED(desc); in describe_alu()
436 AD_MODIFIED(desc); in describe_alu()
439 describe_alu_input(desc, i1); describe_alumul_output(desc, io); in describe_alu()
440 IL_MODIFIED(desc); in describe_alu()
441 AN_MODIFIED(desc); in describe_alu()
442 AZ_MODIFIED(desc); in describe_alu()
443 AD_MODIFIED(desc); in describe_alu()
446 describe_alu_input(desc, i1); describe_alumul_output(desc, io); in describe_alu()
447 AN_MODIFIED(desc); in describe_alu()
448 AZ_MODIFIED(desc); in describe_alu()
451 describe_alu_input(desc, i1); describe_alumul_output(desc, io); in describe_alu()
452 AN_MODIFIED(desc); in describe_alu()
453 AZ_MODIFIED(desc); in describe_alu()
454 AV_MODIFIED(desc); in describe_alu()
455 AD_MODIFIED(desc); in describe_alu()
458 describe_alu_input(desc, i1); describe_alumul_output(desc, io); in describe_alu()
459 AN_MODIFIED(desc); in describe_alu()
460 AZ_MODIFIED(desc); in describe_alu()
461 AV_MODIFIED(desc); in describe_alu()
462 AD_MODIFIED(desc); in describe_alu()
463 AU_MODIFIED(desc); in describe_alu()
466 describe_alu_input(desc, i1); describe_alu_input(desc, i2); describe_alumul_output(desc, io); in describe_alu()
467 AN_MODIFIED(desc); in describe_alu()
468 AZ_MODIFIED(desc); in describe_alu()
469 AV_MODIFIED(desc); in describe_alu()
472 describe_alu_input(desc, i1); describe_alu_input(desc, i2); describe_alumul_output(desc, io); in describe_alu()
473 ZC_MODIFIED(desc); in describe_alu()
474 AN_MODIFIED(desc); in describe_alu()
475 AZ_MODIFIED(desc); in describe_alu()
476 AV_MODIFIED(desc); in describe_alu()
479 describe_alu_input(desc, i1); describe_alu_input(desc, i2); describe_alumul_output(desc, io); in describe_alu()
480 AN_MODIFIED(desc); in describe_alu()
481 AZ_MODIFIED(desc); in describe_alu()
482 AV_MODIFIED(desc); in describe_alu()
485 describe_alu_input(desc, i1); describe_alu_input(desc, i2); describe_alumul_output(desc, io); in describe_alu()
486 ZC_MODIFIED(desc); in describe_alu()
487 AN_MODIFIED(desc); in describe_alu()
488 AZ_MODIFIED(desc); in describe_alu()
489 AV_MODIFIED(desc); in describe_alu()
492 describe_alu_input(desc, i1); describe_alu_input(desc, i2); in describe_alu()
493 AN_MODIFIED(desc); in describe_alu()
494 AZ_MODIFIED(desc); in describe_alu()
495 AV_MODIFIED(desc); in describe_alu()
498 describe_alu_input(desc, i1); describe_alumul_output(desc, io); in describe_alu()
499 AN_MODIFIED(desc); in describe_alu()
500 AZ_MODIFIED(desc); in describe_alu()
501 AV_MODIFIED(desc); in describe_alu()
504 describe_alu_input(desc, i1); describe_alumul_output(desc, io); in describe_alu()
507 describe_alu_input(desc, i1); describe_alumul_output(desc, io); in describe_alu()
508 ZC_MODIFIED(desc); in describe_alu()
511 describe_alu_input(desc, i1); describe_alu_input(desc, i2); describe_alumul_output(desc, io); in describe_alu()
512 AN_MODIFIED(desc); in describe_alu()
513 AZ_MODIFIED(desc); in describe_alu()
514 AV_MODIFIED(desc); in describe_alu()
515 AU_MODIFIED(desc); in describe_alu()
518 describe_alu_input(desc, i1); describe_alu_input(desc, i2); describe_alumul_output(desc, io); in describe_alu()
519 AN_MODIFIED(desc); in describe_alu()
520 AZ_MODIFIED(desc); in describe_alu()
521 AV_MODIFIED(desc); in describe_alu()
522 AU_MODIFIED(desc); in describe_alu()
525 describe_alu_input(desc, i1); describe_alu_input(desc, i2); describe_alumul_output(desc, io); in describe_alu()
526 AN_MODIFIED(desc); in describe_alu()
527 AZ_MODIFIED(desc); in describe_alu()
528 AV_MODIFIED(desc); in describe_alu()
529 AU_MODIFIED(desc); in describe_alu()
532 describe_alu_input(desc, i1); describe_alumul_output(desc, io); in describe_alu()
533 AN_MODIFIED(desc); in describe_alu()
534 AZ_MODIFIED(desc); in describe_alu()
535 AV_MODIFIED(desc); in describe_alu()
536 AU_MODIFIED(desc); in describe_alu()
539 describe_alu_input(desc, i1); describe_alumul_output(desc, io); in describe_alu()
540 AN_MODIFIED(desc); in describe_alu()
541 AZ_MODIFIED(desc); in describe_alu()
542 AV_MODIFIED(desc); in describe_alu()
543 AU_MODIFIED(desc); in describe_alu()
546 describe_alu_input(desc, i1); describe_alumul_output(desc, io); in describe_alu()
547 AN_MODIFIED(desc); in describe_alu()
548 AZ_MODIFIED(desc); in describe_alu()
549 AV_MODIFIED(desc); in describe_alu()
550 AU_MODIFIED(desc); in describe_alu()
553 describe_alu_input(desc, i1); describe_alumul_output(desc, io); in describe_alu()
554 AN_MODIFIED(desc); in describe_alu()
555 AZ_MODIFIED(desc); in describe_alu()
558 describe_alu_input(desc, i1); describe_alumul_output(desc, io); in describe_alu()
559 AN_MODIFIED(desc); in describe_alu()
560 AZ_MODIFIED(desc); in describe_alu()
565 void mb86235_frontend::describe_mul(opcode_desc &desc, uint32_t mulop) in describe_mul() argument
572 describe_mul_input(desc, i1); in describe_mul()
573 describe_mul_input(desc, i2); in describe_mul()
574 describe_alumul_output(desc, io); in describe_mul()
579 MN_MODIFIED(desc); in describe_mul()
580 MZ_MODIFIED(desc); in describe_mul()
581 MV_MODIFIED(desc); in describe_mul()
582 MU_MODIFIED(desc); in describe_mul()
583 MD_MODIFIED(desc); in describe_mul()
588 MN_MODIFIED(desc); in describe_mul()
589 MZ_MODIFIED(desc); in describe_mul()
590 MV_MODIFIED(desc); in describe_mul()
594 void mb86235_frontend::describe_ea(opcode_desc &desc, int md, int arx, int ary, int disp) in describe_ea() argument
599 AR_USED(desc, arx); in describe_ea()
602 AR_USED(desc, arx); AR_MODIFIED(desc, arx); in describe_ea()
605 AR_USED(desc, arx); AR_MODIFIED(desc, arx); in describe_ea()
608 AR_USED(desc, arx); AR_MODIFIED(desc, arx); in describe_ea()
611 AR_USED(desc, arx); AR_USED(desc, ary); in describe_ea()
614 AR_USED(desc, arx); AR_USED(desc, ary); AR_MODIFIED(desc, ary); in describe_ea()
617 AR_USED(desc, arx); AR_USED(desc, ary); AR_MODIFIED(desc, ary); in describe_ea()
620 AR_USED(desc, arx); AR_USED(desc, ary); AR_MODIFIED(desc, ary); in describe_ea()
623 AR_USED(desc, arx); AR_USED(desc, ary); in describe_ea()
626 AR_USED(desc, arx); AR_USED(desc, ary); in describe_ea()
629 AR_USED(desc, arx); in describe_ea()
632 AR_USED(desc, arx); AR_USED(desc, ary); in describe_ea()
637 AR_USED(desc, arx); AR_USED(desc, ary); AR_MODIFIED(desc, ary); in describe_ea()
640 AR_USED(desc, arx); AR_USED(desc, ary); AR_MODIFIED(desc, ary); in describe_ea()
643 AR_USED(desc, arx); AR_USED(desc, ary); AR_MODIFIED(desc, ary); in describe_ea()
648 void mb86235_frontend::describe_xfer1(opcode_desc &desc) in describe_xfer1() argument
650 uint64_t opcode = desc.opptr.q[0]; in describe_xfer1()
664 describe_reg_read(desc, sr & 0x3f); in describe_xfer1()
672 describe_ea(desc, md, sr & 7, ary, disp5); in describe_xfer1()
673 desc.flags |= OPFLAG_READS_MEMORY; in describe_xfer1()
678 describe_reg_write(desc, dr & 0x3f); in describe_xfer1()
682 describe_ea(desc, md, dr & 7, ary, disp5); in describe_xfer1()
683 desc.flags |= OPFLAG_WRITES_MEMORY; in describe_xfer1()
691 describe_reg_read(desc, dr & 0x3f); in describe_xfer1()
692 desc.flags |= OPFLAG_WRITES_MEMORY; in describe_xfer1()
696 describe_reg_write(desc, dr & 0x3f); in describe_xfer1()
697 desc.flags |= OPFLAG_READS_MEMORY; in describe_xfer1()
702 void mb86235_frontend::describe_double_xfer1(opcode_desc &desc) in describe_double_xfer1() argument
704 uint64_t opcode = desc.opptr.q[0]; in describe_double_xfer1()
706 …fatalerror("mb86235_frontend: describe_double_xfer1 at %08X (%08X%08X)", desc.pc, (uint32_t)(opcod… in describe_double_xfer1()
709 void mb86235_frontend::describe_xfer2(opcode_desc &desc) in describe_xfer2() argument
711 uint64_t opcode = desc.opptr.q[0]; in describe_xfer2()
728 describe_reg_read(desc, sr & 0x3f); in describe_xfer2()
736 describe_ea(desc, md, sr & 7, ary, disp14); in describe_xfer2()
737 desc.flags |= OPFLAG_READS_MEMORY; in describe_xfer2()
742 describe_reg_write(desc, dr & 0x3f); in describe_xfer2()
746 describe_ea(desc, md, dr & 7, ary, disp14); in describe_xfer2()
747 desc.flags |= OPFLAG_WRITES_MEMORY; in describe_xfer2()
755 describe_reg_read(desc, dr & 0x3f); in describe_xfer2()
756 desc.flags |= OPFLAG_WRITES_MEMORY; in describe_xfer2()
760 describe_reg_write(desc, dr & 0x3f); in describe_xfer2()
761 desc.flags |= OPFLAG_READS_MEMORY; in describe_xfer2()
767 …fatalerror("mb86235_frontend: describe_xfer2 MOV4 at %08X (%08X%08X)", desc.pc, (uint32_t)(opcode … in describe_xfer2()
772 void mb86235_frontend::describe_double_xfer2(opcode_desc &desc) in describe_double_xfer2() argument
774 uint64_t opcode = desc.opptr.q[0]; in describe_double_xfer2()
775 …fatalerror("mb86235_frontend: describe_double_xfer2 at %08X (%08X%08X)", desc.pc, (uint32_t)(opcod… in describe_double_xfer2()
778 void mb86235_frontend::describe_xfer3(opcode_desc &desc) in describe_xfer3() argument
780 uint64_t opcode = desc.opptr.q[0]; in describe_xfer3()
791 describe_reg_write(desc, dr & 0x3f); in describe_xfer3()
796 desc.flags |= OPFLAG_WRITES_MEMORY; in describe_xfer3()
797 describe_ea(desc, md, dr & 7, ary, disp); in describe_xfer3()
802 void mb86235_frontend::describe_control(opcode_desc &desc) in describe_control() argument
804 int ef1 = (desc.opptr.q[0] >> 16) & 0x3f; in describe_control()
805 int ef2 = desc.opptr.q[0] & 0xffff; in describe_control()
806 int cop = (desc.opptr.q[0] >> 22) & 0x1f; in describe_control()
807 …int rel12 = (desc.opptr.q[0] & 0x800) ? (0xfffff000 | (desc.opptr.q[0] & 0xfff)) : (desc.opptr.q[0… in describe_control()
815 AR_USED(desc, (ef2 >> 12) & 7); in describe_control()
817 desc.userflags |= OP_USERFLAG_REPEAT; in describe_control()
821 AR_USED(desc, (ef2 >> 12) & 7); in describe_control()
826 describe_reg_read(desc, (ef2 >> 6) & 0x3f); in describe_control()
829 describe_reg_write(desc, (ef2 >> 6) & 0x3f); in describe_control()
844 desc.flags |= OPFLAG_IS_CONDITIONAL_BRANCH; in describe_control()
845 desc.targetpc = desc.pc + rel12; in describe_control()
846 desc.delayslots = 1; in describe_control()
849 desc.flags |= OPFLAG_IS_CONDITIONAL_BRANCH; in describe_control()
850 desc.targetpc = desc.pc + rel12; in describe_control()
851 desc.delayslots = 1; in describe_control()
852 AR_USED(desc, ((desc.opptr.q[0] >> 13) & 7)); in describe_control()
855 desc.flags |= OPFLAG_IS_CONDITIONAL_BRANCH; in describe_control()
856 desc.targetpc = desc.pc + rel12; in describe_control()
857 desc.delayslots = 1; in describe_control()
858 AR_USED(desc, ((desc.opptr.q[0] >> 13) & 7)); in describe_control()
861 desc.flags |= OPFLAG_IS_UNCONDITIONAL_BRANCH | OPFLAG_END_SEQUENCE; in describe_control()
862 desc.targetpc = BRANCH_TARGET_DYNAMIC; in describe_control()
863 desc.delayslots = 1; in describe_control()
871 switch ((desc.opptr.q[0] >> 12) & 0xf) in describe_control()
873 case 0x0: desc.targetpc = ef2 & 0xfff; break; in describe_control()
874 case 0x1: desc.targetpc = desc.pc + rel12; break; in describe_control()
875 …case 0x2: desc.targetpc = BRANCH_TARGET_DYNAMIC; describe_reg_read(desc, (ef2 >> 6) & 0x3f); break; in describe_control()
876 …case 0x3: desc.targetpc = BRANCH_TARGET_DYNAMIC; describe_reg_read(desc, (ef2 >> 6) & 0x3f); break; in describe_control()
877 …case 0x4: desc.targetpc = BRANCH_TARGET_DYNAMIC; describe_reg_read(desc, (ef2 >> 6) & 0x3f); break; in describe_control()
878 …case 0x5: desc.targetpc = BRANCH_TARGET_DYNAMIC; describe_reg_read(desc, (ef2 >> 6) & 0x3f); break; in describe_control()
879 …case 0x6: desc.targetpc = BRANCH_TARGET_DYNAMIC; describe_reg_read(desc, (ef2 >> 6) & 0x3f); break; in describe_control()
880 …case 0x7: desc.targetpc = BRANCH_TARGET_DYNAMIC; describe_reg_read(desc, (ef2 >> 6) & 0x3f); break; in describe_control()
881 case 0x8: desc.targetpc = BRANCH_TARGET_DYNAMIC; break; in describe_control()
882 case 0x9: desc.targetpc = BRANCH_TARGET_DYNAMIC; break; in describe_control()
883 case 0xa: desc.targetpc = BRANCH_TARGET_DYNAMIC; break; in describe_control()
884 case 0xb: desc.targetpc = BRANCH_TARGET_DYNAMIC; break; in describe_control()
885 …case 0xc: desc.targetpc = BRANCH_TARGET_DYNAMIC; describe_reg_read(desc, (ef2 >> 6) & 0x3f); break; in describe_control()
886 …case 0xd: desc.targetpc = BRANCH_TARGET_DYNAMIC; describe_reg_read(desc, (ef2 >> 6) & 0x3f); break; in describe_control()
887 …case 0xe: desc.targetpc = BRANCH_TARGET_DYNAMIC; describe_reg_read(desc, (ef2 >> 6) & 0x3f); break; in describe_control()
888 …case 0xf: desc.targetpc = BRANCH_TARGET_DYNAMIC; describe_reg_read(desc, (ef2 >> 6) & 0x3f); break; in describe_control()
891 desc.flags |= OPFLAG_IS_CONDITIONAL_BRANCH; in describe_control()
892 desc.delayslots = 1; in describe_control()
899 switch ((desc.opptr.q[0] >> 12) & 0xf) in describe_control()
901 case 0x0: desc.targetpc = ef2 & 0xfff; break; in describe_control()
902 case 0x1: desc.targetpc = desc.pc + rel12; break; in describe_control()
903 …case 0x2: desc.targetpc = BRANCH_TARGET_DYNAMIC; describe_reg_read(desc, (ef2 >> 6) & 0x3f); break; in describe_control()
904 …case 0x3: desc.targetpc = BRANCH_TARGET_DYNAMIC; describe_reg_read(desc, (ef2 >> 6) & 0x3f); break; in describe_control()
905 …case 0x4: desc.targetpc = BRANCH_TARGET_DYNAMIC; describe_reg_read(desc, (ef2 >> 6) & 0x3f); break; in describe_control()
906 …case 0x5: desc.targetpc = BRANCH_TARGET_DYNAMIC; describe_reg_read(desc, (ef2 >> 6) & 0x3f); break; in describe_control()
907 …case 0x6: desc.targetpc = BRANCH_TARGET_DYNAMIC; describe_reg_read(desc, (ef2 >> 6) & 0x3f); break; in describe_control()
908 …case 0x7: desc.targetpc = BRANCH_TARGET_DYNAMIC; describe_reg_read(desc, (ef2 >> 6) & 0x3f); break; in describe_control()
909 case 0x8: desc.targetpc = BRANCH_TARGET_DYNAMIC; break; in describe_control()
910 case 0x9: desc.targetpc = BRANCH_TARGET_DYNAMIC; break; in describe_control()
911 case 0xa: desc.targetpc = BRANCH_TARGET_DYNAMIC; break; in describe_control()
912 case 0xb: desc.targetpc = BRANCH_TARGET_DYNAMIC; break; in describe_control()
913 …case 0xc: desc.targetpc = BRANCH_TARGET_DYNAMIC; describe_reg_read(desc, (ef2 >> 6) & 0x3f); break; in describe_control()
914 …case 0xd: desc.targetpc = BRANCH_TARGET_DYNAMIC; describe_reg_read(desc, (ef2 >> 6) & 0x3f); break; in describe_control()
915 …case 0xe: desc.targetpc = BRANCH_TARGET_DYNAMIC; describe_reg_read(desc, (ef2 >> 6) & 0x3f); break; in describe_control()
916 …case 0xf: desc.targetpc = BRANCH_TARGET_DYNAMIC; describe_reg_read(desc, (ef2 >> 6) & 0x3f); break; in describe_control()
919 desc.flags |= OPFLAG_IS_UNCONDITIONAL_BRANCH | OPFLAG_END_SEQUENCE; in describe_control()
920 desc.delayslots = 1; in describe_control()