Lines Matching refs:opcode
36 void arm7_disassembler::DasmCoProc_RT(std::ostream &stream, uint32_t opcode, const char *pCondition… in DasmCoProc_RT() argument
40 if( opcode&0x00100000 ) //Bit 20 = Load or Store in DasmCoProc_RT()
51 (opcode>>8)&0xf, (opcode>>21)&7, (opcode>>12)&0xf, (opcode>>16)&0xf, opcode&0xf ); in DasmCoProc_RT()
52 if((opcode>>5)&7) util::stream_format( stream, ", %d",(opcode>>5)&7); in DasmCoProc_RT()
55 void arm7_disassembler::DasmCoProc_DT(std::ostream &stream, uint32_t opcode, const char *pCondition… in DasmCoProc_DT() argument
61 …util::stream_format(stream, "%s%s",(opcode&0x00100000)?"LDC":"STC",pConditionCode); //Bit 20 = 1… in DasmCoProc_DT()
63 if(opcode & 0x400000) util::stream_format(stream, "L"); in DasmCoProc_DT()
67 util::stream_format(stream, "p%d, c%d, ",(opcode>>8)&0x0f,(opcode>>12)&0x0f); in DasmCoProc_DT()
70 …util::stream_format(stream, "[R%d%s",(opcode>>16)&0x0f,(opcode&0x1000000)?"":"]"); //If Bit 24 … in DasmCoProc_DT()
73 …if(opcode & 0xff) util::stream_format(stream, ",%s#$%x",(opcode&0x800000)?"":"-",(opcode & 0xff)… in DasmCoProc_DT()
76 util::stream_format(stream, "%s%s",(opcode&0x1000000)?"]":"",(opcode&0x200000)?"{!}":""); in DasmCoProc_DT()
79 void arm7_disassembler::DasmCoProc_DO(std::ostream &stream, uint32_t opcode, const char *pCondition… in DasmCoProc_DO() argument
88 (opcode>>8)&0xf, (opcode>>20)&0xf, (opcode>>12)&0xf, (opcode>>16)&0xf, opcode&0xf ); in DasmCoProc_DO()
89 if((opcode>>5)&7) util::stream_format(stream, ", %d",(opcode>>5)&7); in DasmCoProc_DO()
92 void arm7_disassembler::WriteImmediateOperand( std::ostream &stream, uint32_t opcode ) in WriteImmediateOperand() argument
98 imm = opcode&0xff; in WriteImmediateOperand()
99 r = ((opcode>>8)&0xf)*2; in WriteImmediateOperand()
104 void arm7_disassembler::WriteDataProcessingOperand( std::ostream &stream, uint32_t opcode, int prin… in WriteDataProcessingOperand() argument
110 util::stream_format(stream, "R%d, ", (opcode>>12)&0xf); in WriteDataProcessingOperand()
112 util::stream_format(stream, "R%d, ", (opcode>>16)&0xf); in WriteDataProcessingOperand()
115 if (opcode & 0x02000000) in WriteDataProcessingOperand()
118 WriteImmediateOperand(stream, opcode); in WriteDataProcessingOperand()
125 util::stream_format(stream, "R%d ", (opcode>>0)&0xf); in WriteDataProcessingOperand()
128 if( ((opcode&0x2000000) == 0) && (((opcode>>4) & 0xff)==0) ) in WriteDataProcessingOperand()
131 util::stream_format(stream, ",%s ", pRegOp[(opcode>>5)&3]); in WriteDataProcessingOperand()
134 if( opcode&0x10 ) /* Shift amount specified in bottom bits of RS */ in WriteDataProcessingOperand()
136 util::stream_format( stream, "R%d", (opcode>>8)&0xf ); in WriteDataProcessingOperand()
140 int c=(opcode>>7)&0x1f; in WriteDataProcessingOperand()
146 void arm7_disassembler::WriteRegisterOperand1( std::ostream &stream, uint32_t opcode ) in WriteRegisterOperand1() argument
154 (opcode >> 0) & 0xf); in WriteRegisterOperand1()
157 if ((((opcode >> 5) & 3) == 0) && (((opcode >> 7) & 0xf) == 0)) in WriteRegisterOperand1()
161 util::stream_format(stream, " %s ", pRegOp[(opcode >> 5) & 3]); in WriteRegisterOperand1()
163 if( opcode&0x10 ) /* Shift amount specified in bottom bits of RS */ in WriteRegisterOperand1()
165 util::stream_format( stream, "R%d", (opcode>>7)&0xf ); in WriteRegisterOperand1()
169 int c=(opcode>>7)&0x1f; in WriteRegisterOperand1()
176 void arm7_disassembler::WriteBranchAddress( std::ostream &stream, uint32_t pc, uint32_t opcode, boo… in WriteBranchAddress() argument
178 opcode <<= 2; in WriteBranchAddress()
179 if (h_bit && (opcode & 0x04000000)) in WriteBranchAddress()
181 opcode |= 2; in WriteBranchAddress()
183 opcode &= 0x03fffffe; in WriteBranchAddress()
184 if( opcode & 0x02000000 ) in WriteBranchAddress()
186 opcode |= 0xfc000000; /* sign-extend */ in WriteBranchAddress()
188 pc += 8+opcode; in WriteBranchAddress()
192 u32 arm7_disassembler::arm7_disasm( std::ostream &stream, uint32_t pc, uint32_t opcode ) in arm7_disasm() argument
212 pConditionCode= pConditionCodeTable[opcode>>28]; in arm7_disasm()
214 if( (opcode&0xfe000000)==0xfa000000 ) //bits 31-25 == 1111 101 (BLX - v5) in arm7_disasm()
222 WriteBranchAddress( stream, pc, opcode, true ); in arm7_disasm()
224 else if( (opcode&0x0ff000f0)==0x01200030 ) // (BLX - v5) in arm7_disasm()
230 util::stream_format( stream, "R%d",(opcode&0xf)); in arm7_disasm()
232 else if( (opcode&0x0ffffff0)==0x012fff10 ) //bits 27-4 == 000100101111111111110001 in arm7_disasm()
238 util::stream_format( stream, "R%d",(opcode&0xf)); in arm7_disasm()
239 if ((opcode & 0x0f) == 14) in arm7_disasm()
242 else if ((opcode & 0x0ff000f0) == 0x01600010) // CLZ - v5 in arm7_disasm()
246 util::stream_format(stream, "R%d, R%d", (opcode>>12)&0xf, opcode&0xf); in arm7_disasm()
248 else if ((opcode & 0x0ff000f0) == 0x01000050) // QADD - v5 in arm7_disasm()
252 util::stream_format(stream, "R%d, R%d, R%d", (opcode>>12)&0xf, opcode&0xf, (opcode>>16)&0xf); in arm7_disasm()
254 else if ((opcode & 0x0ff000f0) == 0x01400050) // QDADD - v5 in arm7_disasm()
258 util::stream_format(stream, "R%d, R%d, R%d", (opcode>>12)&0xf, opcode&0xf, (opcode>>16)&0xf); in arm7_disasm()
260 else if ((opcode & 0x0ff000f0) == 0x01200050) // QSUB - v5 in arm7_disasm()
264 util::stream_format(stream, "R%d, R%d, R%d", (opcode>>12)&0xf, opcode&0xf, (opcode>>16)&0xf); in arm7_disasm()
266 else if ((opcode & 0x0ff000f0) == 0x01600050) // QDSUB - v5 in arm7_disasm()
270 util::stream_format(stream, "R%d, R%d, R%d", (opcode>>12)&0xf, opcode&0xf, (opcode>>16)&0xf); in arm7_disasm()
272 else if ((opcode & 0x0ff00090) == 0x01000080) // SMLAxy - v5 in arm7_disasm()
274 util::stream_format(stream, "SMLA%c%c", (opcode&0x20) ? 'T' : 'B', (opcode&0x40) ? 'T' : 'B'); in arm7_disasm()
276 …il::stream_format(stream, "R%d, R%d, R%d, R%d", (opcode>>16)&0xf, (opcode>>12)&0xf, opcode&0xf, (o… in arm7_disasm()
278 else if ((opcode & 0x0ff00090) == 0x01400080) // SMLALxy - v5 in arm7_disasm()
280 util::stream_format(stream, "SMLAL%c%c", (opcode&0x20) ? 'T' : 'B', (opcode&0x40) ? 'T' : 'B'); in arm7_disasm()
282 …il::stream_format(stream, "R%d, R%d, R%d, R%d", (opcode>>16)&0xf, (opcode>>12)&0xf, opcode&0xf, (o… in arm7_disasm()
284 else if ((opcode & 0x0ff00090) == 0x01600080) // SMULxy - v5 in arm7_disasm()
286 util::stream_format(stream, "SMUL%c%c", (opcode&0x20) ? 'T' : 'B', (opcode&0x40) ? 'T' : 'B'); in arm7_disasm()
288 util::stream_format(stream, "R%d, R%d, R%d", (opcode>>16)&0xf, opcode&0xf, (opcode>>12)&0xf); in arm7_disasm()
290 else if ((opcode & 0x0ff000b0) == 0x012000a0) // SMULWy - v5 in arm7_disasm()
292 util::stream_format(stream, "SMULW%c", (opcode&0x40) ? 'T' : 'B'); in arm7_disasm()
294 util::stream_format(stream, "R%d, R%d, R%d", (opcode>>16)&0xf, opcode&0xf, (opcode>>8)&0xf); in arm7_disasm()
296 else if ((opcode & 0x0ff000b0) == 0x01200080) // SMLAWy - v5 in arm7_disasm()
298 util::stream_format(stream, "SMLAW%c", (opcode&0x40) ? 'T' : 'B'); in arm7_disasm()
300 …til::stream_format(stream, "R%d, R%d, R%d, R%d", (opcode>>16)&0xf, opcode&0xf, (opcode>>8)&0xf, (o… in arm7_disasm()
302 …else if( (opcode&0x0e000000)==0 && (opcode&0x80) && (opcode&0x10) ) //bits 27-25 == 000, bit 7=1, … in arm7_disasm()
305 if(opcode&0x60) in arm7_disasm()
308 … if (((opcode & 0x60) == 0x40) && !(opcode & 0x100000)) // bit 20 = 0, bits 5&6 = 10 is ARMv5 LDRD in arm7_disasm()
312 …else if (((opcode & 0x60) == 0x60) && !(opcode & 0x100000)) // bit 20 = 0, bits 5&6 = 11 is ARMv5 … in arm7_disasm()
318 …util::stream_format(stream, "%s%s",(opcode&0x00100000)?"LDR":"STR",pConditionCode); //Bit 20 = 1… in arm7_disasm()
321 if(opcode&0x40) in arm7_disasm()
323 …util::stream_format(stream, "%s",(opcode&0x20)?"SH":"SB"); //Bit 5 = 1 for Half Word, 0 for Byte in arm7_disasm()
334 util::stream_format(stream, "R%d, ",(opcode>>12)&0x0f); in arm7_disasm()
336 …util::stream_format(stream, "[R%d%s",(opcode>>16)&0x0f,(opcode&0x1000000)?"":"]"); //If Bit 24 … in arm7_disasm()
339 if(opcode&0x400000) { //Bit 22 - 1 = immediate, 0 = register in arm7_disasm()
341 …util::stream_format(stream, ",%s#$%x",(opcode&0x800000)?"":"-",( (((opcode>>8)&0x0f)<<4) | (opcode… in arm7_disasm()
345 util::stream_format(stream, ",%sR%d",(opcode&0x800000)?"":"-",(opcode & 0x0f)); in arm7_disasm()
349 util::stream_format(stream, "%s%s",(opcode&0x1000000)?"]":"",(opcode&0x200000)?"{!}":""); in arm7_disasm()
352 if(opcode&0x01000000) { //bit 24 = 1 in arm7_disasm()
357 …util::stream_format( stream, "%s%s", pConditionCode, (opcode & 0x400000)?"B":"" ); //Bit 22 = B… in arm7_disasm()
360 (opcode>>12)&0xf, opcode&0xf, (opcode>>16)&0xf ); in arm7_disasm()
365 if( opcode&0x800000 ) //Bit 23 = 1 for Multiply Long in arm7_disasm()
371 if( opcode&0x00400000 ) in arm7_disasm()
377 if( opcode&0x00200000 ) in arm7_disasm()
388 if( opcode&0x00100000 ) in arm7_disasm()
397 (opcode>>12)&0xf, in arm7_disasm()
398 (opcode>>16)&0xf, in arm7_disasm()
399 (opcode&0xf), in arm7_disasm()
400 (opcode>>8)&0xf); in arm7_disasm()
408 if( opcode&0x00200000 ) in arm7_disasm()
418 if( opcode&0x00100000 ) in arm7_disasm()
426 (opcode>>16)&0xf, in arm7_disasm()
427 (opcode&0xf), in arm7_disasm()
428 (opcode>>8)&0xf); in arm7_disasm()
430 if( opcode&0x00200000 ) in arm7_disasm()
432 util::stream_format( stream, ", R%d", (opcode>>12)&0xf ); in arm7_disasm()
438 …else if( (opcode&0x0c000000)==0 ) //bits 27-26 == 00 - This check can only exist properly af… in arm7_disasm()
443 if( ((opcode&0x00100000)==0) && ((opcode&0x01800000)==0x01000000) ) { in arm7_disasm()
444 std::string strpsr = util::string_format("%s",(opcode&0x400000)?"SPSR":"CPSR"); in arm7_disasm()
447 if( (opcode&0x00200000) ) { in arm7_disasm()
450 if( (opcode&0x10000)==0) util::stream_format(stream, "F"); in arm7_disasm()
453 WriteDataProcessingOperand(stream, opcode, (opcode&0x02000000)?1:0, 0, 1); in arm7_disasm()
459 util::stream_format(stream, "R%d,", (opcode>>12)&0x0f); in arm7_disasm()
467 int op=(opcode>>21)&0xf; in arm7_disasm()
475 if( (opcode&0x0100000) ) in arm7_disasm()
493 WriteDataProcessingOperand(stream, opcode, 1, 1, 1); in arm7_disasm()
499 WriteDataProcessingOperand(stream, opcode, 0, 1, 1); in arm7_disasm()
503 if (((opcode >> 12) & 0x0f) == 15 && ((opcode >> 0) & 0x0f) == 14 && (opcode & 0x02000000) == 0) in arm7_disasm()
506 WriteDataProcessingOperand(stream, opcode, 1, 0, 1); in arm7_disasm()
511 else if( (opcode&0x0c000000)==0x04000000 ) //bits 27-26 == 01 in arm7_disasm()
520 if( opcode&0x00100000 ) in arm7_disasm()
530 if( opcode&0x00400000 ) in arm7_disasm()
535 if( opcode&0x00200000 ) in arm7_disasm()
538 if( opcode&0x01000000 ) in arm7_disasm()
552 (opcode>>12)&0xf, (opcode>>16)&0xf ); in arm7_disasm()
555 rn = (opcode>>16)&0xf; in arm7_disasm()
558 if( opcode&0x02000000 ) in arm7_disasm()
561 util::stream_format( stream, "%s",(opcode&0x01000000)?"":"]" ); in arm7_disasm()
562 WriteRegisterOperand1(stream, opcode); in arm7_disasm()
563 util::stream_format( stream, "%s",(opcode&0x01000000)?"]":"" ); in arm7_disasm()
568 util::stream_format( stream, "%s",(opcode&0x01000000)?"":"]" ); in arm7_disasm()
570 if(opcode&0xfff) { in arm7_disasm()
571 if( opcode&0x00800000 ) in arm7_disasm()
573 util::stream_format( stream, ", #$%x", opcode&0xfff ); in arm7_disasm()
574 rnv += (rnv)?opcode&0xfff:0; in arm7_disasm()
578 util::stream_format( stream, ", -#$%x", opcode&0xfff ); in arm7_disasm()
579 rnv -= (rnv)?opcode&0xfff:0; in arm7_disasm()
582 util::stream_format( stream, "%s",(opcode&0x01000000)?"]":"" ); in arm7_disasm()
587 else if( (opcode&0x0e000000) == 0x08000000 ) //bits 27-25 == 100 in arm7_disasm()
592 if( opcode&0x00100000 ) in arm7_disasm()
602 if( opcode&0x01000000 ) in arm7_disasm()
606 if( opcode&0x00800000 ) in arm7_disasm()
610 if( opcode&0x00400000 ) in arm7_disasm()
614 if( opcode&0x00200000 ) in arm7_disasm()
620 util::stream_format(stream, "[R%d], {",(opcode>>16)&0xf); in arm7_disasm()
625 if (opcode&(1<<j) && found==0) { in arm7_disasm()
629 else if ((opcode&(1<<j))==0 && found) { in arm7_disasm()
646 else if( (opcode&0x0e000000)==0x0a000000 ) //bits 27-25 == 101 in arm7_disasm()
650 if( opcode&0x01000000 ) in arm7_disasm()
664 WriteBranchAddress( stream, pc, opcode, false ); in arm7_disasm()
666 else if( (opcode&0x0e000000)==0x0c000000 ) //bits 27-25 == 110 in arm7_disasm()
669 DasmCoProc_DT(stream, opcode, (char*)pConditionCode, start_position); in arm7_disasm()
671 else if( (opcode&0x0f000000)==0x0e000000 ) //bits 27-24 == 1110 in arm7_disasm()
676 if(opcode&0x10) in arm7_disasm()
678 DasmCoProc_RT(stream, opcode, pConditionCode, start_position); in arm7_disasm()
683 DasmCoProc_DO(stream, opcode, pConditionCode, start_position); in arm7_disasm()
686 else if( (opcode&0x0f000000) == 0x0f000000 ) //bits 27-24 == 1111 in arm7_disasm()
691 opcode&0x00ffffff ); in arm7_disasm()
701 u32 arm7_disassembler::thumb_disasm(std::ostream &stream, uint32_t pc, uint16_t opcode) in thumb_disasm() argument
714 switch( ( opcode & THUMB_INSN_TYPE ) >> THUMB_INSN_TYPE_SHIFT ) in thumb_disasm()
717 if( opcode & THUMB_SHIFT_R ) /* Shift right */ in thumb_disasm()
719 rs = ( opcode & THUMB_ADDSUB_RS ) >> THUMB_ADDSUB_RS_SHIFT; in thumb_disasm()
720 rd = ( opcode & THUMB_ADDSUB_RD ) >> THUMB_ADDSUB_RD_SHIFT; in thumb_disasm()
721 offs = ( opcode & THUMB_SHIFT_AMT ) >> THUMB_SHIFT_AMT_SHIFT; in thumb_disasm()
726 rs = ( opcode & THUMB_ADDSUB_RS ) >> THUMB_ADDSUB_RS_SHIFT; in thumb_disasm()
727 rd = ( opcode & THUMB_ADDSUB_RD ) >> THUMB_ADDSUB_RD_SHIFT; in thumb_disasm()
728 offs = ( opcode & THUMB_SHIFT_AMT ) >> THUMB_SHIFT_AMT_SHIFT; in thumb_disasm()
733 if( opcode & THUMB_INSN_ADDSUB ) in thumb_disasm()
735 switch( ( opcode & THUMB_ADDSUB_TYPE ) >> THUMB_ADDSUB_TYPE_SHIFT ) in thumb_disasm()
738 rn = ( opcode & THUMB_ADDSUB_RNIMM ) >> THUMB_ADDSUB_RNIMM_SHIFT; in thumb_disasm()
739 rs = ( opcode & THUMB_ADDSUB_RS ) >> THUMB_ADDSUB_RS_SHIFT; in thumb_disasm()
740 rd = ( opcode & THUMB_ADDSUB_RD ) >> THUMB_ADDSUB_RD_SHIFT; in thumb_disasm()
744 rn = ( opcode & THUMB_ADDSUB_RNIMM ) >> THUMB_ADDSUB_RNIMM_SHIFT; in thumb_disasm()
745 rs = ( opcode & THUMB_ADDSUB_RS ) >> THUMB_ADDSUB_RS_SHIFT; in thumb_disasm()
746 rd = ( opcode & THUMB_ADDSUB_RD ) >> THUMB_ADDSUB_RD_SHIFT; in thumb_disasm()
750 imm = ( opcode & THUMB_ADDSUB_RNIMM ) >> THUMB_ADDSUB_RNIMM_SHIFT; in thumb_disasm()
751 rs = ( opcode & THUMB_ADDSUB_RS ) >> THUMB_ADDSUB_RS_SHIFT; in thumb_disasm()
752 rd = ( opcode & THUMB_ADDSUB_RD ) >> THUMB_ADDSUB_RD_SHIFT; in thumb_disasm()
756 imm = ( opcode & THUMB_ADDSUB_RNIMM ) >> THUMB_ADDSUB_RNIMM_SHIFT; in thumb_disasm()
757 rs = ( opcode & THUMB_ADDSUB_RS ) >> THUMB_ADDSUB_RS_SHIFT; in thumb_disasm()
758 rd = ( opcode & THUMB_ADDSUB_RD ) >> THUMB_ADDSUB_RD_SHIFT; in thumb_disasm()
762 util::stream_format(stream, "INVALID %04x", opcode); in thumb_disasm()
768 rs = ( opcode & THUMB_ADDSUB_RS ) >> THUMB_ADDSUB_RS_SHIFT; in thumb_disasm()
769 rd = ( opcode & THUMB_ADDSUB_RD ) >> THUMB_ADDSUB_RD_SHIFT; in thumb_disasm()
770 offs = ( opcode & THUMB_SHIFT_AMT ) >> THUMB_SHIFT_AMT_SHIFT; in thumb_disasm()
775 if( opcode & THUMB_INSN_CMP ) in thumb_disasm()
777 rn = ( opcode & THUMB_INSN_IMM_RD ) >> THUMB_INSN_IMM_RD_SHIFT; in thumb_disasm()
778 op2 = ( opcode & THUMB_INSN_IMM ); in thumb_disasm()
783 rd = ( opcode & THUMB_INSN_IMM_RD ) >> THUMB_INSN_IMM_RD_SHIFT; in thumb_disasm()
784 op2 = ( opcode & THUMB_INSN_IMM ); in thumb_disasm()
789 if( opcode & THUMB_INSN_SUB ) /* SUB Rd, #Offset8 */ in thumb_disasm()
791 rn = ( opcode & THUMB_INSN_IMM_RD ) >> THUMB_INSN_IMM_RD_SHIFT; in thumb_disasm()
792 op2 = ( opcode & THUMB_INSN_IMM ); in thumb_disasm()
797 rn = ( opcode & THUMB_INSN_IMM_RD ) >> THUMB_INSN_IMM_RD_SHIFT; in thumb_disasm()
798 op2 = opcode & THUMB_INSN_IMM; in thumb_disasm()
803 switch( ( opcode & THUMB_GROUP4_TYPE ) >> THUMB_GROUP4_TYPE_SHIFT ) in thumb_disasm()
806 switch( ( opcode & THUMB_ALUOP_TYPE ) >> THUMB_ALUOP_TYPE_SHIFT ) in thumb_disasm()
809 rs = ( opcode & THUMB_ADDSUB_RS ) >> THUMB_ADDSUB_RS_SHIFT; in thumb_disasm()
810 rd = ( opcode & THUMB_ADDSUB_RD ) >> THUMB_ADDSUB_RD_SHIFT; in thumb_disasm()
814 rs = ( opcode & THUMB_ADDSUB_RS ) >> THUMB_ADDSUB_RS_SHIFT; in thumb_disasm()
815 rd = ( opcode & THUMB_ADDSUB_RD ) >> THUMB_ADDSUB_RD_SHIFT; in thumb_disasm()
819 rs = ( opcode & THUMB_ADDSUB_RS ) >> THUMB_ADDSUB_RS_SHIFT; in thumb_disasm()
820 rd = ( opcode & THUMB_ADDSUB_RD ) >> THUMB_ADDSUB_RD_SHIFT; in thumb_disasm()
824 rs = ( opcode & THUMB_ADDSUB_RS ) >> THUMB_ADDSUB_RS_SHIFT; in thumb_disasm()
825 rd = ( opcode & THUMB_ADDSUB_RD ) >> THUMB_ADDSUB_RD_SHIFT; in thumb_disasm()
829 rs = ( opcode & THUMB_ADDSUB_RS ) >> THUMB_ADDSUB_RS_SHIFT; in thumb_disasm()
830 rd = ( opcode & THUMB_ADDSUB_RD ) >> THUMB_ADDSUB_RD_SHIFT; in thumb_disasm()
834 rs = ( opcode & THUMB_ADDSUB_RS ) >> THUMB_ADDSUB_RS_SHIFT; in thumb_disasm()
835 rd = ( opcode & THUMB_ADDSUB_RD ) >> THUMB_ADDSUB_RD_SHIFT; in thumb_disasm()
839 rs = ( opcode & THUMB_ADDSUB_RS ) >> THUMB_ADDSUB_RS_SHIFT; in thumb_disasm()
840 rd = ( opcode & THUMB_ADDSUB_RD ) >> THUMB_ADDSUB_RD_SHIFT; in thumb_disasm()
844 rs = ( opcode & THUMB_ADDSUB_RS ) >> THUMB_ADDSUB_RS_SHIFT; in thumb_disasm()
845 rd = ( opcode & THUMB_ADDSUB_RD ) >> THUMB_ADDSUB_RD_SHIFT; in thumb_disasm()
849 rs = ( opcode & THUMB_ADDSUB_RS ) >> THUMB_ADDSUB_RS_SHIFT; in thumb_disasm()
850 rd = ( opcode & THUMB_ADDSUB_RD ) >> THUMB_ADDSUB_RD_SHIFT; in thumb_disasm()
854 rs = ( opcode & THUMB_ADDSUB_RS ) >> THUMB_ADDSUB_RS_SHIFT; in thumb_disasm()
855 rd = ( opcode & THUMB_ADDSUB_RD ) >> THUMB_ADDSUB_RD_SHIFT; in thumb_disasm()
859 rs = ( opcode & THUMB_ADDSUB_RS ) >> THUMB_ADDSUB_RS_SHIFT; in thumb_disasm()
860 rd = ( opcode & THUMB_ADDSUB_RD ) >> THUMB_ADDSUB_RD_SHIFT; in thumb_disasm()
864 rs = ( opcode & THUMB_ADDSUB_RS ) >> THUMB_ADDSUB_RS_SHIFT; in thumb_disasm()
865 rd = ( opcode & THUMB_ADDSUB_RD ) >> THUMB_ADDSUB_RD_SHIFT; in thumb_disasm()
869 rs = ( opcode & THUMB_ADDSUB_RS ) >> THUMB_ADDSUB_RS_SHIFT; in thumb_disasm()
870 rd = ( opcode & THUMB_ADDSUB_RD ) >> THUMB_ADDSUB_RD_SHIFT; in thumb_disasm()
874 rs = ( opcode & THUMB_ADDSUB_RS ) >> THUMB_ADDSUB_RS_SHIFT; in thumb_disasm()
875 rd = ( opcode & THUMB_ADDSUB_RD ) >> THUMB_ADDSUB_RD_SHIFT; in thumb_disasm()
879 rs = ( opcode & THUMB_ADDSUB_RS ) >> THUMB_ADDSUB_RS_SHIFT; in thumb_disasm()
880 rd = ( opcode & THUMB_ADDSUB_RD ) >> THUMB_ADDSUB_RD_SHIFT; in thumb_disasm()
884 rs = ( opcode & THUMB_ADDSUB_RS ) >> THUMB_ADDSUB_RS_SHIFT; in thumb_disasm()
885 rd = ( opcode & THUMB_ADDSUB_RD ) >> THUMB_ADDSUB_RD_SHIFT; in thumb_disasm()
889 util::stream_format(stream, "INVALID %04x", opcode); in thumb_disasm()
894 switch( ( opcode & THUMB_HIREG_OP ) >> THUMB_HIREG_OP_SHIFT ) in thumb_disasm()
897 rs = ( opcode & THUMB_HIREG_RS ) >> THUMB_HIREG_RS_SHIFT; in thumb_disasm()
898 rd = opcode & THUMB_HIREG_RD; in thumb_disasm()
899 switch( ( opcode & THUMB_HIREG_H ) >> THUMB_HIREG_H_SHIFT ) in thumb_disasm()
911 util::stream_format(stream, "INVALID %04x", opcode); in thumb_disasm()
916 switch( ( opcode & THUMB_HIREG_H ) >> THUMB_HIREG_H_SHIFT ) in thumb_disasm()
919 rs = ( opcode & THUMB_HIREG_RS ) >> THUMB_HIREG_RS_SHIFT; in thumb_disasm()
920 rd = opcode & THUMB_HIREG_RD; in thumb_disasm()
924 rs = ( opcode & THUMB_HIREG_RS ) >> THUMB_HIREG_RS_SHIFT; in thumb_disasm()
925 rd = opcode & THUMB_HIREG_RD; in thumb_disasm()
929 rs = ( opcode & THUMB_HIREG_RS ) >> THUMB_HIREG_RS_SHIFT; in thumb_disasm()
930 rd = opcode & THUMB_HIREG_RD; in thumb_disasm()
934 rs = ( opcode & THUMB_HIREG_RS ) >> THUMB_HIREG_RS_SHIFT; in thumb_disasm()
935 rd = opcode & THUMB_HIREG_RD; in thumb_disasm()
939 util::stream_format(stream, "INVALID %04x", opcode); in thumb_disasm()
944 switch( ( opcode & THUMB_HIREG_H ) >> THUMB_HIREG_H_SHIFT ) in thumb_disasm()
947 rs = ( opcode & THUMB_HIREG_RS ) >> THUMB_HIREG_RS_SHIFT; in thumb_disasm()
948 rd = opcode & THUMB_HIREG_RD; in thumb_disasm()
952 rs = ( opcode & THUMB_HIREG_RS ) >> THUMB_HIREG_RS_SHIFT; in thumb_disasm()
953 rd = opcode & THUMB_HIREG_RD; in thumb_disasm()
957 rs = ( opcode & THUMB_HIREG_RS ) >> THUMB_HIREG_RS_SHIFT; in thumb_disasm()
958 rd = opcode & THUMB_HIREG_RD; in thumb_disasm()
962 rs = ( opcode & THUMB_HIREG_RS ) >> THUMB_HIREG_RS_SHIFT; in thumb_disasm()
963 rd = opcode & THUMB_HIREG_RD; in thumb_disasm()
967 util::stream_format(stream, "INVALID %04x", opcode); in thumb_disasm()
972 switch( ( opcode & THUMB_HIREG_H ) >> THUMB_HIREG_H_SHIFT ) in thumb_disasm()
975 rd = ( opcode & THUMB_HIREG_RS ) >> THUMB_HIREG_RS_SHIFT; in thumb_disasm()
979 rd = ( ( opcode & THUMB_HIREG_RS ) >> THUMB_HIREG_RS_SHIFT ) + 8; in thumb_disasm()
985 rd = ( opcode & THUMB_HIREG_RS ) >> THUMB_HIREG_RS_SHIFT; in thumb_disasm()
989 util::stream_format(stream, "INVALID %04x", opcode); in thumb_disasm()
994 util::stream_format(stream, "INVALID %04x", opcode); in thumb_disasm()
1000 rd = ( opcode & THUMB_INSN_IMM_RD ) >> THUMB_INSN_IMM_RD_SHIFT; in thumb_disasm()
1001 addr = ( opcode & THUMB_INSN_IMM ) << 2; in thumb_disasm()
1005 util::stream_format(stream, "INVALID %04x", opcode); in thumb_disasm()
1010 switch( ( opcode & THUMB_GROUP5_TYPE ) >> THUMB_GROUP5_TYPE_SHIFT ) in thumb_disasm()
1013 rm = ( opcode & THUMB_GROUP5_RM ) >> THUMB_GROUP5_RM_SHIFT; in thumb_disasm()
1014 rn = ( opcode & THUMB_GROUP5_RN ) >> THUMB_GROUP5_RN_SHIFT; in thumb_disasm()
1015 rd = ( opcode & THUMB_GROUP5_RD ) >> THUMB_GROUP5_RD_SHIFT; in thumb_disasm()
1019 rm = ( opcode & THUMB_GROUP5_RM ) >> THUMB_GROUP5_RM_SHIFT; in thumb_disasm()
1020 rn = ( opcode & THUMB_GROUP5_RN ) >> THUMB_GROUP5_RN_SHIFT; in thumb_disasm()
1021 rd = ( opcode & THUMB_GROUP5_RD ) >> THUMB_GROUP5_RD_SHIFT; in thumb_disasm()
1025 rm = ( opcode & THUMB_GROUP5_RM ) >> THUMB_GROUP5_RM_SHIFT; in thumb_disasm()
1026 rn = ( opcode & THUMB_GROUP5_RN ) >> THUMB_GROUP5_RN_SHIFT; in thumb_disasm()
1027 rd = ( opcode & THUMB_GROUP5_RD ) >> THUMB_GROUP5_RD_SHIFT; in thumb_disasm()
1031 rm = ( opcode & THUMB_GROUP5_RM ) >> THUMB_GROUP5_RM_SHIFT; in thumb_disasm()
1032 rn = ( opcode & THUMB_GROUP5_RN ) >> THUMB_GROUP5_RN_SHIFT; in thumb_disasm()
1033 rd = ( opcode & THUMB_GROUP5_RD ) >> THUMB_GROUP5_RD_SHIFT; in thumb_disasm()
1037 rm = ( opcode & THUMB_GROUP5_RM ) >> THUMB_GROUP5_RM_SHIFT; in thumb_disasm()
1038 rn = ( opcode & THUMB_GROUP5_RN ) >> THUMB_GROUP5_RN_SHIFT; in thumb_disasm()
1039 rd = ( opcode & THUMB_GROUP5_RD ) >> THUMB_GROUP5_RD_SHIFT; in thumb_disasm()
1043 rm = ( opcode & THUMB_GROUP5_RM ) >> THUMB_GROUP5_RM_SHIFT; in thumb_disasm()
1044 rn = ( opcode & THUMB_GROUP5_RN ) >> THUMB_GROUP5_RN_SHIFT; in thumb_disasm()
1045 rd = ( opcode & THUMB_GROUP5_RD ) >> THUMB_GROUP5_RD_SHIFT; in thumb_disasm()
1050 rm = ( opcode & THUMB_GROUP5_RM ) >> THUMB_GROUP5_RM_SHIFT; in thumb_disasm()
1051 rn = ( opcode & THUMB_GROUP5_RN ) >> THUMB_GROUP5_RN_SHIFT; in thumb_disasm()
1052 rd = ( opcode & THUMB_GROUP5_RD ) >> THUMB_GROUP5_RD_SHIFT; in thumb_disasm()
1056 rm = ( opcode & THUMB_GROUP5_RM ) >> THUMB_GROUP5_RM_SHIFT; in thumb_disasm()
1057 rn = ( opcode & THUMB_GROUP5_RN ) >> THUMB_GROUP5_RN_SHIFT; in thumb_disasm()
1058 rd = ( opcode & THUMB_GROUP5_RD ) >> THUMB_GROUP5_RD_SHIFT; in thumb_disasm()
1062 util::stream_format(stream, "INVALID %04x", opcode); in thumb_disasm()
1067 if( opcode & THUMB_LSOP_L ) /* Load */ in thumb_disasm()
1069 rn = ( opcode & THUMB_ADDSUB_RS ) >> THUMB_ADDSUB_RS_SHIFT; in thumb_disasm()
1070 rd = opcode & THUMB_ADDSUB_RD; in thumb_disasm()
1071 offs = ( ( opcode & THUMB_LSOP_OFFS ) >> THUMB_LSOP_OFFS_SHIFT ) << 2; in thumb_disasm()
1076 rn = ( opcode & THUMB_ADDSUB_RS ) >> THUMB_ADDSUB_RS_SHIFT; in thumb_disasm()
1077 rd = opcode & THUMB_ADDSUB_RD; in thumb_disasm()
1078 offs = ( ( opcode & THUMB_LSOP_OFFS ) >> THUMB_LSOP_OFFS_SHIFT ) << 2; in thumb_disasm()
1083 if( opcode & THUMB_LSOP_L ) /* Load */ in thumb_disasm()
1085 rn = ( opcode & THUMB_ADDSUB_RS ) >> THUMB_ADDSUB_RS_SHIFT; in thumb_disasm()
1086 rd = opcode & THUMB_ADDSUB_RD; in thumb_disasm()
1087 offs = ( opcode & THUMB_LSOP_OFFS ) >> THUMB_LSOP_OFFS_SHIFT; in thumb_disasm()
1092 rn = ( opcode & THUMB_ADDSUB_RS ) >> THUMB_ADDSUB_RS_SHIFT; in thumb_disasm()
1093 rd = opcode & THUMB_ADDSUB_RD; in thumb_disasm()
1094 offs = ( opcode & THUMB_LSOP_OFFS ) >> THUMB_LSOP_OFFS_SHIFT; in thumb_disasm()
1099 if( opcode & THUMB_HALFOP_L ) /* Load */ in thumb_disasm()
1101 imm = ( opcode & THUMB_HALFOP_OFFS ) >> THUMB_HALFOP_OFFS_SHIFT; in thumb_disasm()
1102 rs = ( opcode & THUMB_ADDSUB_RS ) >> THUMB_ADDSUB_RS_SHIFT; in thumb_disasm()
1103 rd = ( opcode & THUMB_ADDSUB_RD ) >> THUMB_ADDSUB_RD_SHIFT; in thumb_disasm()
1108 imm = ( opcode & THUMB_HALFOP_OFFS ) >> THUMB_HALFOP_OFFS_SHIFT; in thumb_disasm()
1109 rs = ( opcode & THUMB_ADDSUB_RS ) >> THUMB_ADDSUB_RS_SHIFT; in thumb_disasm()
1110 rd = ( opcode & THUMB_ADDSUB_RD ) >> THUMB_ADDSUB_RD_SHIFT; in thumb_disasm()
1115 if( opcode & THUMB_STACKOP_L ) in thumb_disasm()
1117 rd = ( opcode & THUMB_STACKOP_RD ) >> THUMB_STACKOP_RD_SHIFT; in thumb_disasm()
1118 offs = (uint8_t)( opcode & THUMB_INSN_IMM ); in thumb_disasm()
1123 rd = ( opcode & THUMB_STACKOP_RD ) >> THUMB_STACKOP_RD_SHIFT; in thumb_disasm()
1124 offs = (uint8_t)( opcode & THUMB_INSN_IMM ); in thumb_disasm()
1129 if( opcode & THUMB_RELADDR_SP ) /* ADD Rd, SP, #nn */ in thumb_disasm()
1131 rd = ( opcode & THUMB_RELADDR_RD ) >> THUMB_RELADDR_RD_SHIFT; in thumb_disasm()
1132 offs = (uint8_t)( opcode & THUMB_INSN_IMM ) << 2; in thumb_disasm()
1137 rd = ( opcode & THUMB_RELADDR_RD ) >> THUMB_RELADDR_RD_SHIFT; in thumb_disasm()
1138 offs = (uint8_t)( opcode & THUMB_INSN_IMM ) << 2; in thumb_disasm()
1143 switch( ( opcode & THUMB_STACKOP_TYPE ) >> THUMB_STACKOP_TYPE_SHIFT ) in thumb_disasm()
1146 addr = ( opcode & THUMB_INSN_IMM ); in thumb_disasm()
1149 if( opcode & THUMB_INSN_IMM_S ) in thumb_disasm()
1159 if( opcode & ( 1 << offs ) ) in thumb_disasm()
1170 if( opcode & ( 1 << offs ) ) in thumb_disasm()
1181 if( opcode & ( 1 << offs ) ) in thumb_disasm()
1192 if( opcode & ( 1 << offs ) ) in thumb_disasm()
1200 util::stream_format(stream, "INVALID %04x", opcode); in thumb_disasm()
1205 if( opcode & THUMB_MULTLS ) /* Load */ in thumb_disasm()
1207 rd = ( opcode & THUMB_MULTLS_BASE ) >> THUMB_MULTLS_BASE_SHIFT; in thumb_disasm()
1211 if( opcode & ( 1 << offs ) ) in thumb_disasm()
1220 rd = ( opcode & THUMB_MULTLS_BASE ) >> THUMB_MULTLS_BASE_SHIFT; in thumb_disasm()
1224 if( opcode & ( 1 << offs ) ) in thumb_disasm()
1233 offs = (int8_t)( opcode & THUMB_INSN_IMM ); in thumb_disasm()
1234 switch( ( opcode & THUMB_COND_TYPE ) >> THUMB_COND_TYPE_SHIFT ) in thumb_disasm()
1282 util::stream_format( stream, "SWI %02x", opcode & 0xff); in thumb_disasm()
1287 if( opcode & THUMB_BLOP_LO ) in thumb_disasm()
1289 addr = ( ( opcode & THUMB_BLOP_OFFS ) << 1 ) & 0xfffc; in thumb_disasm()
1295 offs = ( opcode & THUMB_BRANCH_OFFS ) << 1; in thumb_disasm()
1304 if( opcode & THUMB_BLOP_LO ) in thumb_disasm()
1306 util::stream_format( stream, "BL (LO) %08x", ( opcode & THUMB_BLOP_OFFS ) << 1 ); in thumb_disasm()
1311 addr = ( opcode & THUMB_BLOP_OFFS ) << 12; in thumb_disasm()
1321 util::stream_format(stream, "INVALID %04x", opcode); in thumb_disasm()