Lines Matching refs:regs
71 state_add(STATE_GENPC, "GENPC", regs.pc).noshow(); in device_start()
72 state_add(STATE_GENPCBASE, "CURPC", regs.pc).noshow(); in device_start()
73 state_add(UPD7725_PC, "PC", regs.pc); in device_start()
74 state_add(UPD7725_RP, "RP", regs.rp); in device_start()
75 state_add(UPD7725_DP, "DP", regs.dp); in device_start()
76 state_add(UPD7725_SP, "SP", regs.sp); in device_start()
77 state_add(UPD7725_K, "K", regs.k); in device_start()
78 state_add(UPD7725_L, "L", regs.l); in device_start()
79 state_add(UPD7725_M, "M", regs.m); in device_start()
80 state_add(UPD7725_N, "N", regs.n); in device_start()
81 state_add(UPD7725_A, "A", regs.a); in device_start()
82 state_add(UPD7725_B, "B", regs.b); in device_start()
83 state_add(UPD7725_TR, "TR", regs.tr); in device_start()
84 state_add(UPD7725_TRB, "TRB", regs.trb); in device_start()
85 state_add(UPD7725_DR, "DR", regs.dr); in device_start()
86 state_add(UPD7725_SI, "SI", regs.si); in device_start()
87 state_add(UPD7725_SO, "SO", regs.so); in device_start()
88 state_add(UPD7725_IDB, "IDB", regs.idb); in device_start()
104 save_item(NAME(regs.pc)); in device_start()
105 save_item(NAME(regs.rp)); in device_start()
106 save_item(NAME(regs.dp)); in device_start()
107 save_item(NAME(regs.sp)); in device_start()
108 save_item(NAME(regs.k)); in device_start()
109 save_item(NAME(regs.l)); in device_start()
110 save_item(NAME(regs.m)); in device_start()
111 save_item(NAME(regs.n)); in device_start()
112 save_item(NAME(regs.a)); in device_start()
113 save_item(NAME(regs.b)); in device_start()
114 save_item(NAME(regs.flaga.s1)); in device_start()
115 save_item(NAME(regs.flaga.s0)); in device_start()
116 save_item(NAME(regs.flaga.c)); in device_start()
117 save_item(NAME(regs.flaga.z)); in device_start()
118 save_item(NAME(regs.flaga.ov1)); in device_start()
119 save_item(NAME(regs.flaga.ov0)); in device_start()
120 save_item(NAME(regs.flagb.s1)); in device_start()
121 save_item(NAME(regs.flagb.s0)); in device_start()
122 save_item(NAME(regs.flagb.c)); in device_start()
123 save_item(NAME(regs.flagb.z)); in device_start()
124 save_item(NAME(regs.flagb.ov1)); in device_start()
125 save_item(NAME(regs.flagb.ov0)); in device_start()
126 save_item(NAME(regs.tr)); in device_start()
127 save_item(NAME(regs.trb)); in device_start()
128 save_item(NAME(regs.dr)); in device_start()
129 save_item(NAME(regs.si)); in device_start()
130 save_item(NAME(regs.so)); in device_start()
131 save_item(NAME(regs.idb)); in device_start()
132 save_item(NAME(regs.siack)); in device_start()
133 save_item(NAME(regs.soack)); in device_start()
134 save_item(NAME(regs.sr.rqm)); in device_start()
135 save_item(NAME(regs.sr.usf0)); in device_start()
136 save_item(NAME(regs.sr.usf1)); in device_start()
137 save_item(NAME(regs.sr.drs)); in device_start()
138 save_item(NAME(regs.sr.dma)); in device_start()
139 save_item(NAME(regs.sr.drc)); in device_start()
140 save_item(NAME(regs.sr.soc)); in device_start()
141 save_item(NAME(regs.sr.sic)); in device_start()
142 save_item(NAME(regs.sr.ei)); in device_start()
143 save_item(NAME(regs.sr.p0)); in device_start()
144 save_item(NAME(regs.sr.p1)); in device_start()
145 save_item(NAME(regs.stack)); in device_start()
158 regs.rp = 0x0000; in device_start()
159 regs.dp = 0x0000; in device_start()
160 regs.sp = 0x0; in device_start()
161 regs.k = 0x0000; in device_start()
162 regs.l = 0x0000; in device_start()
163 regs.m = 0x0000; in device_start()
164 regs.n = 0x0000; in device_start()
165 regs.a = 0x0000; in device_start()
166 regs.b = 0x0000; in device_start()
167 regs.tr = 0x0000; in device_start()
168 regs.trb = 0x0000; in device_start()
169 regs.dr = 0x0000; in device_start()
170 regs.si = 0x0000; in device_start()
171 regs.so = 0x0000; in device_start()
172 regs.idb = 0x0000; in device_start()
182 regs.pc = 0x0000; in device_reset()
183 regs.sr = 0x0000; in device_reset()
184 m_out_p0_cb(regs.sr.p0); in device_reset()
185 m_out_p1_cb(regs.sr.p1); in device_reset()
188 regs.flaga = 0x00; in device_reset()
189 regs.flagb = 0x00; in device_reset()
190 regs.siack = 0; in device_reset()
191 regs.soack = 0; in device_reset()
243 regs.flaga.s1 ? "S1" : "s1", in state_string_export()
244 regs.flaga.s0 ? "S0" : "s0", in state_string_export()
245 regs.flaga.c ? 'C' : 'c', in state_string_export()
246 regs.flaga.z ? 'Z' : 'z', in state_string_export()
247 regs.flaga.ov1 ? "OV1" : "ov1", in state_string_export()
248 regs.flaga.ov0 ? "OV0" : "ov0"); in state_string_export()
253 regs.flagb.s1 ? "S1" : "s1", in state_string_export()
254 regs.flagb.s0 ? "S0" : "s0", in state_string_export()
255 regs.flagb.c ? 'C' : 'c', in state_string_export()
256 regs.flagb.z ? 'Z' : 'z', in state_string_export()
257 regs.flagb.ov1 ? "OV1" : "ov1", in state_string_export()
258 regs.flagb.ov0 ? "OV0" : "ov0"); in state_string_export()
305 if ((!m_irq && (CLEAR_LINE != state)) && regs.sr.ei) // detect rising edge AND if EI == 1; in execute_set_input()
308 regs.sr.ei = 0; in execute_set_input()
335 debugger_instruction_hook(regs.pc); in execute_run()
340 opcode = m_cache.read_dword(regs.pc) >> 8; in execute_run()
341 regs.pc++; in execute_run()
366 int32_t result = (int32_t)regs.k * regs.l; //sign + 30-bit result in execute_run()
367 regs.m = result >> 15; //store sign + top 15-bits in execute_run()
368 regs.n = result << 1; //store low 15-bits + zero in execute_run()
386 case 0: regs.idb = regs.trb; break; in exec_op()
387 case 1: regs.idb = regs.a; break; in exec_op()
388 case 2: regs.idb = regs.b; break; in exec_op()
389 case 3: regs.idb = regs.tr; break; in exec_op()
390 case 4: regs.idb = regs.dp; break; in exec_op()
391 case 5: regs.idb = regs.rp; break; in exec_op()
392 case 6: regs.idb = m_data.read_word(regs.rp); break; in exec_op()
393 case 7: regs.idb = 0x8000 - regs.flaga.s1; break; //SGN in exec_op()
394 case 8: regs.idb = regs.dr; regs.sr.rqm = 1; break; in exec_op()
395 case 9: regs.idb = regs.dr; break; in exec_op()
396 case 10: regs.idb = regs.sr; break; in exec_op()
397 case 11: regs.idb = regs.si; break; //MSB = first bit in from serial, 'natural' SI register order in exec_op()
398 …case 12: regs.idb = bitswap<16>(regs.si, 0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15); br… in exec_op()
399 case 13: regs.idb = regs.k; break; in exec_op()
400 case 14: regs.idb = regs.l; break; in exec_op()
401 case 15: regs.idb = dataRAM[regs.dp]; break; in exec_op()
415 case 0: p = dataRAM[regs.dp]; break; in exec_op()
416 case 1: p = regs.idb; break; in exec_op()
417 case 2: p = regs.m; break; in exec_op()
418 case 3: p = regs.n; break; in exec_op()
422 case 0: q = regs.a; flag = regs.flaga; c = regs.flagb.c; break; in exec_op()
423 case 1: q = regs.b; flag = regs.flagb; c = regs.flaga.c; break; in exec_op()
480 case 0: regs.a = r; regs.flaga = flag; break; in exec_op()
481 case 1: regs.b = r; regs.flagb = flag; break; in exec_op()
485 exec_ld((regs.idb << 6) + dst); in exec_op()
489 case 1: regs.dp = (regs.dp & 0xf0) + ((regs.dp + 1) & 0x0f); break; //DPINC in exec_op()
490 case 2: regs.dp = (regs.dp & 0xf0) + ((regs.dp - 1) & 0x0f); break; //DPDEC in exec_op()
491 case 3: regs.dp = (regs.dp & 0xf0); break; //DPCLR in exec_op()
494 regs.dp ^= dphm << 4; in exec_op()
497 if(rpdcr && (dst != 5)) regs.rp--; in exec_op()
502 regs.pc = regs.stack[--regs.sp]; in exec_rt()
503 regs.sp &= 0xf; in exec_rt()
511 uint16_t jps = (regs.pc & 0x2000) | (bank << 11) | (na << 0); in exec_jp()
515 case 0x000: regs.pc = regs.so; return; //JMPSO in exec_jp()
517 case 0x080: if(regs.flaga.c == 0) regs.pc = jps; return; //JNCA in exec_jp()
518 case 0x082: if(regs.flaga.c == 1) regs.pc = jps; return; //JCA in exec_jp()
519 case 0x084: if(regs.flagb.c == 0) regs.pc = jps; return; //JNCB in exec_jp()
520 case 0x086: if(regs.flagb.c == 1) regs.pc = jps; return; //JCB in exec_jp()
522 case 0x088: if(regs.flaga.z == 0) regs.pc = jps; return; //JNZA in exec_jp()
523 case 0x08a: if(regs.flaga.z == 1) regs.pc = jps; return; //JZA in exec_jp()
524 case 0x08c: if(regs.flagb.z == 0) regs.pc = jps; return; //JNZB in exec_jp()
525 case 0x08e: if(regs.flagb.z == 1) regs.pc = jps; return; //JZB in exec_jp()
527 case 0x090: if(regs.flaga.ov0 == 0) regs.pc = jps; return; //JNOVA0 in exec_jp()
528 case 0x092: if(regs.flaga.ov0 == 1) regs.pc = jps; return; //JOVA0 in exec_jp()
529 case 0x094: if(regs.flagb.ov0 == 0) regs.pc = jps; return; //JNOVB0 in exec_jp()
530 case 0x096: if(regs.flagb.ov0 == 1) regs.pc = jps; return; //JOVB0 in exec_jp()
532 case 0x098: if(regs.flaga.ov1 == 0) regs.pc = jps; return; //JNOVA1 in exec_jp()
533 case 0x09a: if(regs.flaga.ov1 == 1) regs.pc = jps; return; //JOVA1 in exec_jp()
534 case 0x09c: if(regs.flagb.ov1 == 0) regs.pc = jps; return; //JNOVB1 in exec_jp()
535 case 0x09e: if(regs.flagb.ov1 == 1) regs.pc = jps; return; //JOVB1 in exec_jp()
537 case 0x0a0: if(regs.flaga.s0 == 0) regs.pc = jps; return; //JNSA0 in exec_jp()
538 case 0x0a2: if(regs.flaga.s0 == 1) regs.pc = jps; return; //JSA0 in exec_jp()
539 case 0x0a4: if(regs.flagb.s0 == 0) regs.pc = jps; return; //JNSB0 in exec_jp()
540 case 0x0a6: if(regs.flagb.s0 == 1) regs.pc = jps; return; //JSB0 in exec_jp()
542 case 0x0a8: if(regs.flaga.s1 == 0) regs.pc = jps; return; //JNSA1 in exec_jp()
543 case 0x0aa: if(regs.flaga.s1 == 1) regs.pc = jps; return; //JSA1 in exec_jp()
544 case 0x0ac: if(regs.flagb.s1 == 0) regs.pc = jps; return; //JNSB1 in exec_jp()
545 case 0x0ae: if(regs.flagb.s1 == 1) regs.pc = jps; return; //JSB1 in exec_jp()
547 case 0x0b0: if((regs.dp & 0x0f) == 0x00) regs.pc = jps; return; //JDPL0 in exec_jp()
548 case 0x0b1: if((regs.dp & 0x0f) != 0x00) regs.pc = jps; return; //JDPLN0 in exec_jp()
549 case 0x0b2: if((regs.dp & 0x0f) == 0x0f) regs.pc = jps; return; //JDPLF in exec_jp()
550 case 0x0b3: if((regs.dp & 0x0f) != 0x0f) regs.pc = jps; return; //JDPLNF in exec_jp()
552 case 0x0b4: if(regs.siack == 0) regs.pc = jps; return; //JNSIAK in exec_jp()
553 case 0x0b6: if(regs.siack == 1) regs.pc = jps; return; //JSIAK in exec_jp()
554 case 0x0b8: if(regs.soack == 0) regs.pc = jps; return; //JNSOAK in exec_jp()
555 case 0x0ba: if(regs.soack == 1) regs.pc = jps; return; //JSOAK in exec_jp()
557 case 0x0bc: if(regs.sr.rqm == 0) regs.pc = jps; return; //JNRQM in exec_jp()
558 case 0x0be: if(regs.sr.rqm == 1) regs.pc = jps; return; //JRQM in exec_jp()
560 case 0x100: regs.pc = 0x0000 | jpl; return; //LJMP in exec_jp()
561 case 0x101: regs.pc = 0x2000 | jpl; return; //HJMP in exec_jp()
563 …case 0x140: regs.stack[regs.sp++] = regs.pc; regs.pc = 0x0000 | jpl; regs.sp &= 0xf; return; //LC… in exec_jp()
564 …case 0x141: regs.stack[regs.sp++] = regs.pc; regs.pc = 0x2000 | jpl; regs.sp &= 0xf; return; //HC… in exec_jp()
572 regs.idb = id; in exec_ld()
576 case 1: regs.a = id; break; in exec_ld()
577 case 2: regs.b = id; break; in exec_ld()
578 case 3: regs.tr = id; break; in exec_ld()
579 case 4: regs.dp = id; break; in exec_ld()
580 case 5: regs.rp = id; break; in exec_ld()
581 case 6: regs.dr = id; regs.sr.rqm = 1; break; in exec_ld()
582 case 7: regs.sr = (regs.sr & 0x907c) | (id & ~0x907c); in exec_ld()
583 m_out_p0_cb(regs.sr.p0); in exec_ld()
584 m_out_p1_cb(regs.sr.p1); in exec_ld()
586 …case 8: regs.so = bitswap<16>(id, 0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15); break; … in exec_ld()
587 case 9: regs.so = id; break; //MSB first output, output tapped at bit 15 shifting left in exec_ld()
588 case 10: regs.k = id; break; in exec_ld()
589 case 11: regs.k = id; regs.l = m_data.read_word(regs.rp); break; in exec_ld()
590 case 12: regs.l = id; regs.k = dataRAM[regs.dp | 0x40]; break; in exec_ld()
591 case 13: regs.l = id; break; in exec_ld()
592 case 14: regs.trb = id; break; in exec_ld()
593 case 15: dataRAM[regs.dp] = id; break; in exec_ld()
600 return regs.sr >> 8; in snesdsp_read()
603 if (regs.sr.drc == 0) in snesdsp_read()
606 if(regs.sr.drs == 0) in snesdsp_read()
608 regs.sr.drs = 1; in snesdsp_read()
609 return regs.dr >> 0; in snesdsp_read()
613 regs.sr.rqm = 0; in snesdsp_read()
614 regs.sr.drs = 0; in snesdsp_read()
615 return regs.dr >> 8; in snesdsp_read()
621 regs.sr.rqm = 0; in snesdsp_read()
622 return regs.dr >> 0; in snesdsp_read()
629 if (regs.sr.drc == 0) in snesdsp_write()
632 if (regs.sr.drs == 0) in snesdsp_write()
634 regs.sr.drs = 1; in snesdsp_write()
635 regs.dr = (regs.dr & 0xff00) | (data << 0); in snesdsp_write()
639 regs.sr.rqm = 0; in snesdsp_write()
640 regs.sr.drs = 0; in snesdsp_write()
641 regs.dr = (data << 8) | (regs.dr & 0x00ff); in snesdsp_write()
647 regs.sr.rqm = 0; in snesdsp_write()
648 regs.dr = (regs.dr & 0xff00) | (data << 0); in snesdsp_write()