Lines Matching refs:cpu_reg

12         if (AL == temp) seteab(getr8(cpu_reg));  in opCMPXCHG_b_a16()
30 if (AL == temp) seteab(getr8(cpu_reg)); in opCMPXCHG_b_a32()
49 if (AX == temp) seteaw(cpu_state.regs[cpu_reg].w); in opCMPXCHG_w_a16()
67 if (AX == temp) seteaw(cpu_state.regs[cpu_reg].w); in opCMPXCHG_w_a32()
86 if (EAX == temp) seteal(cpu_state.regs[cpu_reg].l); in opCMPXCHG_l_a16()
104 if (EAX == temp) seteal(cpu_state.regs[cpu_reg].l); in opCMPXCHG_l_a32()
186 seteab(temp + getr8(cpu_reg)); if (cpu_state.abrt) return 1; in opXADD_b_a16()
187 setadd8(temp, getr8(cpu_reg)); in opXADD_b_a16()
188 setr8(cpu_reg, temp); in opXADD_b_a16()
203 seteab(temp + getr8(cpu_reg)); if (cpu_state.abrt) return 1; in opXADD_b_a32()
204 setadd8(temp, getr8(cpu_reg)); in opXADD_b_a32()
205 setr8(cpu_reg, temp); in opXADD_b_a32()
221 seteaw(temp + cpu_state.regs[cpu_reg].w); if (cpu_state.abrt) return 1; in opXADD_w_a16()
222 setadd16(temp, cpu_state.regs[cpu_reg].w); in opXADD_w_a16()
223 cpu_state.regs[cpu_reg].w = temp; in opXADD_w_a16()
238 seteaw(temp + cpu_state.regs[cpu_reg].w); if (cpu_state.abrt) return 1; in opXADD_w_a32()
239 setadd16(temp, cpu_state.regs[cpu_reg].w); in opXADD_w_a32()
240 cpu_state.regs[cpu_reg].w = temp; in opXADD_w_a32()
256 seteal(temp + cpu_state.regs[cpu_reg].l); if (cpu_state.abrt) return 1; in opXADD_l_a16()
257 setadd32(temp, cpu_state.regs[cpu_reg].l); in opXADD_l_a16()
258 cpu_state.regs[cpu_reg].l = temp; in opXADD_l_a16()
273 seteal(temp + cpu_state.regs[cpu_reg].l); if (cpu_state.abrt) return 1; in opXADD_l_a32()
274 setadd32(temp, cpu_state.regs[cpu_reg].l); in opXADD_l_a32()
275 cpu_state.regs[cpu_reg].l = temp; in opXADD_l_a32()