Lines Matching refs:AhciBar

81   IN UINTN     AhciBar,  in AhciReadReg()  argument
88 Data = MmioRead32 (AhciBar + Offset); in AhciReadReg()
103 IN UINTN AhciBar, in AhciWriteReg() argument
108 MmioWrite32 (AhciBar + Offset, Data); in AhciWriteReg()
121 IN UINTN AhciBar, in AhciAndReg() argument
128 Data = AhciReadReg (AhciBar, Offset); in AhciAndReg()
131 AhciWriteReg (AhciBar, Offset, Data); in AhciAndReg()
144 IN UINTN AhciBar, in AhciOrReg() argument
151 Data = AhciReadReg (AhciBar, Offset); in AhciOrReg()
154 AhciWriteReg (AhciBar, Offset, Data); in AhciOrReg()
174 IN UINTN AhciBar, in AhciWaitMmioSet() argument
187 Value = AhciReadReg (AhciBar, Offset) & MaskValue; in AhciWaitMmioSet()
306 IN UINTN AhciBar, in AhciClearPortStatus() argument
316 AhciWriteReg (AhciBar, Offset, AhciReadReg (AhciBar, Offset)); in AhciClearPortStatus()
322 AhciWriteReg (AhciBar, Offset, AhciReadReg (AhciBar, Offset)); in AhciClearPortStatus()
327 AhciWriteReg (AhciBar, AHCI_IS_OFFSET, AhciReadReg (AhciBar, AHCI_IS_OFFSET)); in AhciClearPortStatus()
344 IN UINTN AhciBar, in AhciEnableFisReceive() argument
352 AhciOrReg (AhciBar, Offset, AHCI_PORT_CMD_FRE); in AhciEnableFisReceive()
372 IN UINTN AhciBar, in AhciDisableFisReceive() argument
381 Data = AhciReadReg (AhciBar, Offset); in AhciDisableFisReceive()
398 AhciAndReg (AhciBar, Offset, (UINT32)~(AHCI_PORT_CMD_FRE)); in AhciDisableFisReceive()
401 AhciBar, in AhciDisableFisReceive()
438 UINTN AhciBar; in AhciBuildCommand() local
448 AhciBar = Private->MmioBase; in AhciBuildCommand()
483 AhciAndReg (AhciBar, Offset, (UINT32)~(AHCI_PORT_CMD_DLAE | AHCI_PORT_CMD_ATAPI)); in AhciBuildCommand()
578 IN UINTN AhciBar, in AhciStopCommand() argument
587 Data = AhciReadReg (AhciBar, Offset); in AhciStopCommand()
594 AhciAndReg (AhciBar, Offset, (UINT32)~(AHCI_PORT_CMD_ST)); in AhciStopCommand()
598 AhciBar, in AhciStopCommand()
621 IN UINTN AhciBar, in AhciStartCommand() argument
638 Capability = AhciReadReg (AhciBar, AHCI_CAPABILITY_OFFSET); in AhciStartCommand()
643 AhciBar, in AhciStartCommand()
648 AhciBar, in AhciStartCommand()
657 PortStatus = AhciReadReg (AhciBar, Offset); in AhciStartCommand()
661 StartCmd = AhciReadReg (AhciBar, Offset); in AhciStartCommand()
667 PortTfd = AhciReadReg (AhciBar, Offset); in AhciStartCommand()
672 AhciOrReg (AhciBar, Offset, AHCI_PORT_CMD_CLO); in AhciStartCommand()
675 AhciBar, in AhciStartCommand()
685 AhciOrReg (AhciBar, Offset, AHCI_PORT_CMD_ST | StartCmd); in AhciStartCommand()
691 AhciAndReg (AhciBar, Offset, 0); in AhciStartCommand()
692 AhciOrReg (AhciBar, Offset, CmdSlotBit); in AhciStartCommand()
739 UINTN AhciBar; in AhciPioTransfer() local
787 AhciBar = Private->MmioBase; in AhciPioTransfer()
794 OldRfisLo = AhciReadReg (AhciBar, Offset); in AhciPioTransfer()
796 OldRfisHi = AhciReadReg (AhciBar, Offset); in AhciPioTransfer()
799 AhciWriteReg (AhciBar, Offset, Data64.Uint32.Lower32); in AhciPioTransfer()
801 AhciWriteReg (AhciBar, Offset, Data64.Uint32.Upper32); in AhciPioTransfer()
807 OldCmdListLo = AhciReadReg (AhciBar, Offset); in AhciPioTransfer()
809 OldCmdListHi = AhciReadReg (AhciBar, Offset); in AhciPioTransfer()
812 AhciWriteReg (AhciBar, Offset, Data64.Uint32.Lower32); in AhciPioTransfer()
814 AhciWriteReg (AhciBar, Offset, Data64.Uint32.Upper32); in AhciPioTransfer()
839 AhciBar, in AhciPioTransfer()
883 PortTfd = AhciReadReg (AhciBar, (UINT32) Offset); in AhciPioTransfer()
926 PortTfd = AhciReadReg (AhciBar, (UINT32) Offset); in AhciPioTransfer()
934 AhciBar, in AhciPioTransfer()
940 AhciBar, in AhciPioTransfer()
950 AhciWriteReg (AhciBar, Offset, OldRfisLo); in AhciPioTransfer()
952 AhciWriteReg (AhciBar, Offset, OldRfisHi); in AhciPioTransfer()
955 AhciWriteReg (AhciBar, Offset, OldCmdListLo); in AhciPioTransfer()
957 AhciWriteReg (AhciBar, Offset, OldCmdListHi); in AhciPioTransfer()
992 UINTN AhciBar; in AhciNonDataTransfer() local
1000 AhciBar = Private->MmioBase; in AhciNonDataTransfer()
1025 AhciBar, in AhciNonDataTransfer()
1051 PortTfd = AhciReadReg (AhciBar, (UINT32) Offset); in AhciNonDataTransfer()
1058 AhciBar, in AhciNonDataTransfer()
1064 AhciBar, in AhciNonDataTransfer()
1085 IN UINTN AhciBar, in AhciReset() argument
1096 Capability = AhciReadReg (AhciBar, AHCI_CAPABILITY_OFFSET); in AhciReset()
1102 AhciOrReg (AhciBar, AHCI_GHC_OFFSET, AHCI_GHC_ENABLE); in AhciReset()
1105 AhciOrReg (AhciBar, AHCI_GHC_OFFSET, AHCI_GHC_RESET); in AhciReset()
1110 Value = AhciReadReg(AhciBar, AHCI_GHC_OFFSET); in AhciReset()
1267 UINTN AhciBar; in AhciCreateTransferDescriptor() local
1280 AhciBar = Private->MmioBase; in AhciCreateTransferDescriptor()
1286 Capability = AhciReadReg (AhciBar, AHCI_CAPABILITY_OFFSET); in AhciCreateTransferDescriptor()
1301 PortImplementBitMap = AhciReadReg (AhciBar, AHCI_PI_OFFSET); in AhciCreateTransferDescriptor()
1651 UINTN AhciBar; in AhciModeInitialization() local
1667 AhciBar = Private->MmioBase; in AhciModeInitialization()
1669 Status = AhciReset (AhciBar, AHCI_PEI_RESET_TIMEOUT); in AhciModeInitialization()
1678 Capability = AhciReadReg (AhciBar, AHCI_CAPABILITY_OFFSET); in AhciModeInitialization()
1683 Value = AhciReadReg (AhciBar, AHCI_GHC_OFFSET); in AhciModeInitialization()
1685 AhciOrReg (AhciBar, AHCI_GHC_OFFSET, AHCI_GHC_ENABLE); in AhciModeInitialization()
1708 PortImplementBitMap = AhciReadReg (AhciBar, AHCI_PI_OFFSET); in AhciModeInitialization()
1739 AhciWriteReg (AhciBar, Offset, Data64.Uint32.Lower32); in AhciModeInitialization()
1741 AhciWriteReg (AhciBar, Offset, Data64.Uint32.Upper32); in AhciModeInitialization()
1745 AhciWriteReg (AhciBar, Offset, Data64.Uint32.Lower32); in AhciModeInitialization()
1747 AhciWriteReg (AhciBar, Offset, Data64.Uint32.Upper32); in AhciModeInitialization()
1750 Data = AhciReadReg (AhciBar, Offset); in AhciModeInitialization()
1752 AhciOrReg (AhciBar, Offset, AHCI_PORT_CMD_POD); in AhciModeInitialization()
1756 AhciOrReg (AhciBar, Offset, AHCI_PORT_CMD_SUD); in AhciModeInitialization()
1763 AhciOrReg (AhciBar, Offset, AHCI_PORT_SCTL_IPM_INIT); in AhciModeInitialization()
1768 AhciAndReg (AhciBar, Offset, 0); in AhciModeInitialization()
1774 AhciOrReg (AhciBar, Offset, AHCI_PORT_CMD_FRE); in AhciModeInitialization()
1782 Data = AhciReadReg (AhciBar, Offset) & AHCI_PORT_SSTS_DET_MASK; in AhciModeInitialization()
1797 AhciAndReg (AhciBar, Offset, (UINT32) ~(AHCI_PORT_CMD_SUD)); in AhciModeInitialization()
1809 if (AhciReadReg(AhciBar, Offset) != 0) { in AhciModeInitialization()
1810 AhciWriteReg (AhciBar, Offset, AhciReadReg (AhciBar, Offset)); in AhciModeInitialization()
1814 Data = AhciReadReg (AhciBar, Offset) & AHCI_PORT_TFD_MASK; in AhciModeInitialization()
1837 AhciBar, in AhciModeInitialization()
1852 Data = AhciReadReg (AhciBar, Offset); in AhciModeInitialization()