target/mips/cpu-defs.c.inc

244                     (1 << FCR0_D) | (1 << FCR0_S) | (0x93 << FCR0_PRID),
276                     (1 << FCR0_D) | (1 << FCR0_S) | (0x95 << FCR0_PRID),
318                     (1 << FCR0_D) | (1 << FCR0_S) | (0x93 << FCR0_PRID),
405                     (1 << FCR0_D) | (1 << FCR0_S) | (0x03 << FCR0_PRID),
444                     (1 << FCR0_S) | (0x00 << FCR0_PRID) | (0x0 << FCR0_REV),
484                     (1 << FCR0_S) | (0x02 << FCR0_PRID) | (0x0 << FCR0_REV),
507         .CP1_fcr0 = (0x5 << FCR0_PRID) | (0x0 << FCR0_REV),
528         .CP1_fcr0 = (0x54 << FCR0_PRID) | (0x0 << FCR0_REV),
575                     (0x81 << FCR0_PRID) | (0x0 << FCR0_REV),
604                     (0x82 << FCR0_PRID) | (0x0 << FCR0_REV),
633                     (1 << FCR0_S) | (0x00 << FCR0_PRID) | (0x0 << FCR0_REV),
680                     (0x89 << FCR0_PRID) | (0x0 << FCR0_REV),
717                     (1 << FCR0_S) | (0x03 << FCR0_PRID) | (0x0 << FCR0_REV),
757                     (1 << FCR0_S) | (0x03 << FCR0_PRID) | (0x0 << FCR0_REV),
778         .CP1_fcr0 = (0x5 << FCR0_PRID) | (0x1 << FCR0_REV),
798         .CP1_fcr0 = (0x5 << FCR0_PRID) | (0x1 << FCR0_REV),
825         .CP1_fcr0 = (0x5 << FCR0_PRID) | (0x1 << FCR0_REV) | (0x1 << FCR0_F64) |
883         .CP1_fcr0 = (0x5 << FCR0_PRID) | (0x1 << FCR0_REV) | (0x1 << FCR0_F64) |
916                     (1 << FCR0_S) | (0x00 << FCR0_PRID) | (0x0 << FCR0_REV),