target/arm/helper.c

5081       .access = PL2_RW, .type = ARM_CP_ALIAS,
5091       .access = PL2_RW, .accessfn = fpexc32_access },
5094       .access = PL2_RW, .resetvalue = 0,
5099       .access = PL2_RW, .resetvalue = 0,
5104       .access = PL2_RW,
5109       .access = PL2_RW,
5114       .access = PL2_RW,
5119       .access = PL2_RW,
5137       .access = PL2_RW,
5141       .access = PL2_RW,
5145       .access = PL2_RW, .type = ARM_CP_CONST, .resetvalue = 0 },
5148       .access = PL2_RW,
5152       .access = PL2_RW, .type = ARM_CP_CONST, .resetvalue = 0 },
5155       .access = PL2_RW, .type = ARM_CP_CONST,
5159       .access = PL2_RW, .type = ARM_CP_CONST, .resetvalue = 0 },
5162       .access = PL2_RW, .type = ARM_CP_CONST,
5166       .access = PL2_RW, .type = ARM_CP_CONST,
5170       .access = PL2_RW, .type = ARM_CP_CONST,
5174       .access = PL2_RW, .type = ARM_CP_CONST,
5178       .access = PL2_RW, .type = ARM_CP_CONST, .resetvalue = 0 },
5181       .access = PL2_RW, .accessfn = access_el3_aa32ns,
5185       .access = PL2_RW, .accessfn = access_el3_aa32ns,
5189       .access = PL2_RW, .type = ARM_CP_CONST, .resetvalue = 0 },
5192       .access = PL2_RW, .type = ARM_CP_CONST, .resetvalue = 0 },
5195       .access = PL2_RW, .type = ARM_CP_CONST, .resetvalue = 0 },
5198       .access = PL2_RW, .type = ARM_CP_CONST, .resetvalue = 0 },
5200       .access = PL2_RW, .type = ARM_CP_64BIT | ARM_CP_CONST,
5204       .access = PL2_RW, .type = ARM_CP_CONST, .resetvalue = 0 },
5207       .access = PL2_RW, .type = ARM_CP_CONST, .resetvalue = 0 },
5209       .access = PL2_RW, .type = ARM_CP_64BIT | ARM_CP_CONST,
5213       .access = PL2_RW, .type = ARM_CP_CONST, .resetvalue = 0 },
5215       .access = PL2_RW, .type = ARM_CP_64BIT | ARM_CP_CONST,
5219       .access = PL2_RW, .type = ARM_CP_CONST, .resetvalue = 0 },
5222       .access = PL2_RW, .type = ARM_CP_CONST, .resetvalue = 0 },
5225       .access = PL2_RW, .accessfn = access_tda,
5229       .access = PL2_RW, .accessfn = access_el3_aa32ns,
5233       .access = PL2_RW, .type = ARM_CP_CONST, .resetvalue = 0 },
5236       .access = PL2_RW, .type = ARM_CP_CONST, .resetvalue = 0 },
5240       .access = PL2_RW, .resetvalue = 0 },
5248       .access = PL2_RW,
5445       .access = PL2_RW, .fieldoffset = offsetof(CPUARMState, cp15.hcr_el2),
5450       .access = PL2_RW, .fieldoffset = offsetof(CPUARMState, cp15.hcr_el2),
5454       .access = PL2_RW, .type = ARM_CP_CONST, .resetvalue = 0 },
5458       .access = PL2_RW,
5462       .access = PL2_RW, .fieldoffset = offsetof(CPUARMState, cp15.esr_el[2]) },
5465       .access = PL2_RW, .fieldoffset = offsetof(CPUARMState, cp15.far_el[2]) },
5469       .access = PL2_RW,
5474       .access = PL2_RW,
5478       .access = PL2_RW, .writefn = vbar_write,
5487       .access = PL2_RW, .accessfn = cptr_access, .resetvalue = 0,
5492       .access = PL2_RW, .fieldoffset = offsetof(CPUARMState, cp15.mair_el[2]),
5496       .access = PL2_RW, .type = ARM_CP_ALIAS,
5500       .access = PL2_RW, .type = ARM_CP_CONST,
5505       .access = PL2_RW, .type = ARM_CP_CONST,
5509       .access = PL2_RW, .type = ARM_CP_CONST,
5513       .access = PL2_RW, .type = ARM_CP_CONST,
5517       .access = PL2_RW, .writefn = vmsa_tcr_el12_write,
5523       .access = PL2_RW, .accessfn = access_el3_aa32ns,
5527       .access = PL2_RW,
5535       .access = PL2_RW, .accessfn = access_el3_aa32ns,
5540       .access = PL2_RW, .writefn = vttbr_write,
5544       .access = PL2_RW, .raw_writefn = raw_write, .writefn = sctlr_write,
5548       .access = PL2_RW, .resetvalue = 0,
5552       .access = PL2_RW, .resetvalue = 0, .writefn = vmsa_tcr_ttbr_el2_write,
5555       .access = PL2_RW, .type = ARM_CP_64BIT | ARM_CP_ALIAS,
5631       .access = PL2_RW, .resetvalue = 3,
5635       .access = PL2_RW, .type = ARM_CP_IO, .resetvalue = 0,
5639       .access = PL2_RW, .type = ARM_CP_64BIT | ARM_CP_ALIAS | ARM_CP_IO,
5645       .type = ARM_CP_IO, .access = PL2_RW,
5649       .access = PL2_RW, .type = ARM_CP_64BIT | ARM_CP_IO,
5653       .type = ARM_CP_NO_RAW | ARM_CP_IO, .access = PL2_RW,
5659       .access = PL2_RW,
5671       .access = PL2_RW, .resetvalue = 0,
5675       .access = PL2_RW, .accessfn = access_el3_aa32ns,
5679       .access = PL2_RW,
5683       .access = PL2_RW,
5692       .access = PL2_RW,
5955             new_reg->access &= PL2_RW | PL3_RW;  in define_arm_vh_e2h_redirects_aliases()
6084       .access = PL2_RW, .accessfn = access_tda,
6232     .access = PL2_RW, .type = ARM_CP_SVE,
6240     .access = PL2_RW, .type = ARM_CP_SVE,
6934       .access = PL2_RW, .accessfn = access_mte,
7152       .access = PL2_RW,
7156       .access = PL2_RW, .writefn = vmsa_tcr_ttbr_el2_write,
7163       .type = ARM_CP_IO, .access = PL2_RW,
7167       .type = ARM_CP_NO_RAW | ARM_CP_IO, .access = PL2_RW,
7173       .access = PL2_RW,
7179       .access = PL2_RW, .accessfn = e2h_access,
7185       .access = PL2_RW, .accessfn = e2h_access,
7191       .access = PL2_RW, .accessfn = e2h_access,
7196       .access = PL2_RW, .accessfn = e2h_access,
7202       .access = PL2_RW, .accessfn = e2h_access,
7208       .access = PL2_RW, .accessfn = e2h_access,
7256       .access = PL2_RW, .type = ARM_CP_CONST,
7686               .access = PL2_RW, .accessfn = access_el3_aa32ns,  in register_cp_regs_for_features()
7691               .access = PL2_RW, .resetvalue = cpu->midr,  in register_cp_regs_for_features()
7695               .access = PL2_RW, .accessfn = access_el3_aa32ns,  in register_cp_regs_for_features()
7700               .access = PL2_RW,  in register_cp_regs_for_features()
7730                   .access = PL2_RW, .accessfn = access_el3_aa32ns,  in register_cp_regs_for_features()
7735                   .access = PL2_RW, .accessfn = access_el3_aa32ns,  in register_cp_regs_for_features()
8021               .access = PL2_RW, .type = ARM_CP_CONST,  in register_cp_regs_for_features()
8541             mask = PL2_RW;  in define_one_arm_cp_reg_with_opaque()