Lines Matching refs:CMIPS

230 CPS2OS::CPS2OS(CMIPS& ee, uint8* ram, uint8* bios, uint8* spr, CGSHandler*& gs, CSIF& sif, CIopBios…  in CPS2OS()
281 m_ee.m_State.nCOP0[CCOP_SCU::STATUS] |= (CMIPS::STATUS_IE | CMIPS::STATUS_EIE); in Initialize()
662 assembler.ADDIU(CMIPS::SP, CMIPS::SP, 0xFFF0); in AssembleCustomSyscallHandler()
663 assembler.SD(CMIPS::RA, 0x0000, CMIPS::SP); in AssembleCustomSyscallHandler()
666 assembler.SLL(CMIPS::T0, CMIPS::V1, 2); in AssembleCustomSyscallHandler()
667 assembler.LUI(CMIPS::T1, 0x8001); in AssembleCustomSyscallHandler()
668 assembler.ADDU(CMIPS::T0, CMIPS::T0, CMIPS::T1); in AssembleCustomSyscallHandler()
669 assembler.LW(CMIPS::T0, 0x0000, CMIPS::T0); in AssembleCustomSyscallHandler()
672 assembler.LUI(CMIPS::T1, 0x1FFF); in AssembleCustomSyscallHandler()
673 assembler.ORI(CMIPS::T1, CMIPS::T1, 0xFFFF); in AssembleCustomSyscallHandler()
674 assembler.AND(CMIPS::T0, CMIPS::T0, CMIPS::T1); in AssembleCustomSyscallHandler()
677 assembler.JALR(CMIPS::T0); in AssembleCustomSyscallHandler()
681 assembler.LD(CMIPS::RA, 0x0000, CMIPS::SP); in AssembleCustomSyscallHandler()
682 assembler.ADDIU(CMIPS::SP, CMIPS::SP, 0x0010); in AssembleCustomSyscallHandler()
697 assembler.LI(CMIPS::K0, BIOS_ADDRESS_KERNELSTACK_TOP); in AssembleInterruptHandler()
698 assembler.ADDIU(CMIPS::K0, CMIPS::K0, 0x10000 - stackFrameSize); in AssembleInterruptHandler()
701 assembler.MFC0(CMIPS::T0, CCOP_SCU::EPC); in AssembleInterruptHandler()
702 assembler.SW(CMIPS::T0, 0x0220, CMIPS::K0); in AssembleInterruptHandler()
705 assembler.ADDU(CMIPS::SP, CMIPS::K0, CMIPS::R0); in AssembleInterruptHandler()
708 assembler.MFC0(CMIPS::T0, CCOP_SCU::STATUS); in AssembleInterruptHandler()
709 assembler.LI(CMIPS::T1, ~CMIPS::STATUS_IE); in AssembleInterruptHandler()
710 assembler.AND(CMIPS::T0, CMIPS::T0, CMIPS::T1); in AssembleInterruptHandler()
711 assembler.MTC0(CMIPS::T0, CCOP_SCU::STATUS); in AssembleInterruptHandler()
714 assembler.LI(CMIPS::T0, CINTC::INTC_STAT); in AssembleInterruptHandler()
715 assembler.LW(CMIPS::S0, 0x0000, CMIPS::T0); in AssembleInterruptHandler()
718 assembler.LI(CMIPS::T1, CINTC::INTC_MASK); in AssembleInterruptHandler()
719 assembler.LW(CMIPS::S1, 0x0000, CMIPS::T1); in AssembleInterruptHandler()
722 assembler.AND(CMIPS::S0, CMIPS::S0, CMIPS::S1); in AssembleInterruptHandler()
733 assembler.ANDI(CMIPS::T0, CMIPS::S0, (1 << line)); in AssembleInterruptHandler()
734 assembler.BEQ(CMIPS::R0, CMIPS::T0, skipIntHandlerLabel); in AssembleInterruptHandler()
738 assembler.ADDIU(CMIPS::A0, CMIPS::R0, line); in AssembleInterruptHandler()
751 assembler.ANDI(CMIPS::T0, CMIPS::S0, (1 << CINTC::INTC_LINE_DMAC)); in AssembleInterruptHandler()
752 assembler.BEQ(CMIPS::R0, CMIPS::T0, skipIntHandlerLabel); in AssembleInterruptHandler()
776 assembler.MFC0(CMIPS::T0, CCOP_SCU::STATUS); in AssembleInterruptHandler()
777 assembler.ORI(CMIPS::T0, CMIPS::T0, CMIPS::STATUS_IE); in AssembleInterruptHandler()
778 assembler.MTC0(CMIPS::T0, CCOP_SCU::STATUS); in AssembleInterruptHandler()
783 assembler.ADDIU(CMIPS::K0, CMIPS::SP, CMIPS::R0); in AssembleInterruptHandler()
785 assembler.LW(CMIPS::A0, 0x0220, CMIPS::K0); in AssembleInterruptHandler()
787 assembler.ADDIU(CMIPS::V1, CMIPS::R0, SYSCALL_CUSTOM_EXITINTERRUPT); in AssembleInterruptHandler()
799 auto channelCounterRegister = CMIPS::S0; in AssembleDmacHandler()
800 auto interruptStatusRegister = CMIPS::S1; in AssembleDmacHandler()
801 auto nextIdPtrRegister = CMIPS::S2; in AssembleDmacHandler()
803 auto nextIdRegister = CMIPS::T2; in AssembleDmacHandler()
805 assembler.ADDIU(CMIPS::SP, CMIPS::SP, 0xFFE0); in AssembleDmacHandler()
806 assembler.SD(CMIPS::RA, 0x0000, CMIPS::SP); in AssembleDmacHandler()
807 assembler.SD(CMIPS::S0, 0x0008, CMIPS::SP); in AssembleDmacHandler()
808 assembler.SD(CMIPS::S1, 0x0010, CMIPS::SP); in AssembleDmacHandler()
809 assembler.SD(CMIPS::S2, 0x0018, CMIPS::SP); in AssembleDmacHandler()
812 assembler.LI(CMIPS::T1, CINTC::INTC_STAT); in AssembleDmacHandler()
813 assembler.ADDIU(CMIPS::T0, CMIPS::R0, (1 << CINTC::INTC_LINE_DMAC)); in AssembleDmacHandler()
814 assembler.SW(CMIPS::T0, 0x0000, CMIPS::T1); in AssembleDmacHandler()
817 assembler.LI(CMIPS::T0, CDMAC::D_STAT); in AssembleDmacHandler()
818 assembler.LW(CMIPS::T0, 0x0000, CMIPS::T0); in AssembleDmacHandler()
820 assembler.SRL(CMIPS::T1, CMIPS::T0, 16); in AssembleDmacHandler()
821 assembler.AND(interruptStatusRegister, CMIPS::T0, CMIPS::T1); in AssembleDmacHandler()
824 assembler.ADDIU(channelCounterRegister, CMIPS::R0, 0x0009); in AssembleDmacHandler()
829 assembler.ORI(CMIPS::T0, CMIPS::R0, 0x0001); in AssembleDmacHandler()
830 assembler.SLLV(CMIPS::T0, CMIPS::T0, CMIPS::S0); in AssembleDmacHandler()
831 assembler.AND(CMIPS::T0, CMIPS::T0, CMIPS::S1); in AssembleDmacHandler()
832 assembler.BEQ(CMIPS::T0, CMIPS::R0, skipChannelLabel); in AssembleDmacHandler()
836 assembler.LI(CMIPS::T1, CDMAC::D_STAT); in AssembleDmacHandler()
837 assembler.SW(CMIPS::T0, 0x0000, CMIPS::T1); in AssembleDmacHandler()
846 assembler.BEQ(nextIdRegister, CMIPS::R0, skipChannelLabel); in AssembleDmacHandler()
850 assembler.ADDIU(CMIPS::T0, CMIPS::R0, sizeof(DMACHANDLER)); in AssembleDmacHandler()
851 assembler.MULTU(CMIPS::T0, nextIdRegister, CMIPS::T0); in AssembleDmacHandler()
852 assembler.LI(CMIPS::T1, BIOS_ADDRESS_DMACHANDLER_BASE); in AssembleDmacHandler()
853 assembler.ADDU(CMIPS::T0, CMIPS::T0, CMIPS::T1); in AssembleDmacHandler()
856 assembler.ADDIU(nextIdPtrRegister, CMIPS::T0, offsetof(INTCHANDLER, nextId)); in AssembleDmacHandler()
859 assembler.LW(CMIPS::T1, offsetof(DMACHANDLER, channel), CMIPS::T0); in AssembleDmacHandler()
860 assembler.BNE(channelCounterRegister, CMIPS::T1, checkHandlerLabel); in AssembleDmacHandler()
864 assembler.LW(CMIPS::T1, offsetof(DMACHANDLER, address), CMIPS::T0); in AssembleDmacHandler()
865 assembler.ADDU(CMIPS::A0, channelCounterRegister, CMIPS::R0); in AssembleDmacHandler()
866 assembler.LW(CMIPS::A1, offsetof(DMACHANDLER, arg), CMIPS::T0); in AssembleDmacHandler()
867 assembler.LW(CMIPS::GP, offsetof(DMACHANDLER, gp), CMIPS::T0); in AssembleDmacHandler()
870 assembler.JALR(CMIPS::T1); in AssembleDmacHandler()
873 assembler.BGEZ(CMIPS::V0, checkHandlerLabel); in AssembleDmacHandler()
884 assembler.LD(CMIPS::RA, 0x0000, CMIPS::SP); in AssembleDmacHandler()
885 assembler.LD(CMIPS::S0, 0x0008, CMIPS::SP); in AssembleDmacHandler()
886 assembler.LD(CMIPS::S1, 0x0010, CMIPS::SP); in AssembleDmacHandler()
887 assembler.LD(CMIPS::S2, 0x0018, CMIPS::SP); in AssembleDmacHandler()
888 assembler.ADDIU(CMIPS::SP, CMIPS::SP, 0x20); in AssembleDmacHandler()
889 assembler.JR(CMIPS::RA); in AssembleDmacHandler()
900 auto nextIdPtrRegister = CMIPS::S0; in AssembleIntcHandler()
901 auto causeRegister = CMIPS::S1; in AssembleIntcHandler()
903 auto nextIdRegister = CMIPS::T2; in AssembleIntcHandler()
906 assembler.ADDIU(CMIPS::SP, CMIPS::SP, 0xFFE0); in AssembleIntcHandler()
907 assembler.SD(CMIPS::RA, 0x0000, CMIPS::SP); in AssembleIntcHandler()
908 assembler.SD(CMIPS::S0, 0x0008, CMIPS::SP); in AssembleIntcHandler()
909 assembler.SD(CMIPS::S1, 0x0010, CMIPS::SP); in AssembleIntcHandler()
912 assembler.LI(CMIPS::T1, CINTC::INTC_STAT); in AssembleIntcHandler()
913 assembler.ADDIU(CMIPS::T0, CMIPS::R0, 0x0001); in AssembleIntcHandler()
914 assembler.SLLV(CMIPS::T0, CMIPS::T0, CMIPS::A0); in AssembleIntcHandler()
915 assembler.SW(CMIPS::T0, 0x0000, CMIPS::T1); in AssembleIntcHandler()
919 assembler.ADDU(causeRegister, CMIPS::A0, CMIPS::R0); in AssembleIntcHandler()
925 assembler.BEQ(nextIdRegister, CMIPS::R0, finishLoop); in AssembleIntcHandler()
929 assembler.ADDIU(CMIPS::T0, CMIPS::R0, sizeof(INTCHANDLER)); in AssembleIntcHandler()
930 assembler.MULTU(CMIPS::T0, nextIdRegister, CMIPS::T0); in AssembleIntcHandler()
931 assembler.LI(CMIPS::T1, BIOS_ADDRESS_INTCHANDLER_BASE); in AssembleIntcHandler()
932 assembler.ADDU(CMIPS::T0, CMIPS::T0, CMIPS::T1); in AssembleIntcHandler()
935 assembler.ADDIU(nextIdPtrRegister, CMIPS::T0, offsetof(INTCHANDLER, nextId)); in AssembleIntcHandler()
938 assembler.LW(CMIPS::T1, offsetof(INTCHANDLER, cause), CMIPS::T0); in AssembleIntcHandler()
939 assembler.BNE(causeRegister, CMIPS::T1, checkHandlerLabel); in AssembleIntcHandler()
943 assembler.LW(CMIPS::T1, offsetof(INTCHANDLER, address), CMIPS::T0); in AssembleIntcHandler()
944 assembler.ADDU(CMIPS::A0, causeRegister, CMIPS::R0); in AssembleIntcHandler()
945 assembler.LW(CMIPS::A1, offsetof(INTCHANDLER, arg), CMIPS::T0); in AssembleIntcHandler()
946 assembler.LW(CMIPS::GP, offsetof(INTCHANDLER, gp), CMIPS::T0); in AssembleIntcHandler()
949 assembler.JALR(CMIPS::T1); in AssembleIntcHandler()
952 assembler.BGEZ(CMIPS::V0, checkHandlerLabel); in AssembleIntcHandler()
958 assembler.LD(CMIPS::RA, 0x0000, CMIPS::SP); in AssembleIntcHandler()
959 assembler.LD(CMIPS::S0, 0x0008, CMIPS::SP); in AssembleIntcHandler()
960 assembler.LD(CMIPS::S1, 0x0010, CMIPS::SP); in AssembleIntcHandler()
961 assembler.ADDIU(CMIPS::SP, CMIPS::SP, 0x20); in AssembleIntcHandler()
962 assembler.JR(CMIPS::RA); in AssembleIntcHandler()
970 assembler.ADDIU(CMIPS::V1, CMIPS::R0, 0x23); in AssembleThreadEpilog()
978 assembler.ADDIU(CMIPS::V1, CMIPS::R0, SYSCALL_CUSTOM_RESCHEDULE); in AssembleIdleThreadProc()
981 assembler.BEQ(CMIPS::R0, CMIPS::R0, 0xFFFD); in AssembleIdleThreadProc()
995 assembler.ADDIU(CMIPS::SP, CMIPS::SP, 0xFFF0); in AssembleAlarmHandler()
996 assembler.SD(CMIPS::RA, 0x0000, CMIPS::SP); in AssembleAlarmHandler()
997 assembler.SD(CMIPS::S0, 0x0008, CMIPS::SP); in AssembleAlarmHandler()
1000 assembler.ADDU(CMIPS::S0, CMIPS::R0, CMIPS::R0); in AssembleAlarmHandler()
1005 assembler.ADDIU(CMIPS::T0, CMIPS::R0, sizeof(ALARM)); in AssembleAlarmHandler()
1006 assembler.MULTU(CMIPS::T0, CMIPS::S0, CMIPS::T0); in AssembleAlarmHandler()
1007 assembler.LI(CMIPS::T1, BIOS_ADDRESS_ALARM_BASE); in AssembleAlarmHandler()
1008 assembler.ADDU(CMIPS::T0, CMIPS::T0, CMIPS::T1); in AssembleAlarmHandler()
1011 assembler.LW(CMIPS::T1, offsetof(ALARM, isValid), CMIPS::T0); in AssembleAlarmHandler()
1012 assembler.BEQ(CMIPS::T1, CMIPS::R0, moveToNextHandler); in AssembleAlarmHandler()
1016 assembler.LW(CMIPS::T1, offsetof(ALARM, callback), CMIPS::T0); in AssembleAlarmHandler()
1017 assembler.ADDIU(CMIPS::A0, CMIPS::S0, BIOS_ID_BASE); in AssembleAlarmHandler()
1018 assembler.LW(CMIPS::A1, offsetof(ALARM, delay), CMIPS::T0); in AssembleAlarmHandler()
1019 assembler.LW(CMIPS::A2, offsetof(ALARM, callbackParam), CMIPS::T0); in AssembleAlarmHandler()
1020 assembler.LW(CMIPS::GP, offsetof(ALARM, gp), CMIPS::T0); in AssembleAlarmHandler()
1023 assembler.JALR(CMIPS::T1); in AssembleAlarmHandler()
1027 assembler.ADDIU(CMIPS::A0, CMIPS::S0, BIOS_ID_BASE); in AssembleAlarmHandler()
1028 assembler.ADDIU(CMIPS::V1, CMIPS::R0, -0x1F); in AssembleAlarmHandler()
1034 assembler.ADDIU(CMIPS::S0, CMIPS::S0, 0x0001); in AssembleAlarmHandler()
1035 assembler.ADDIU(CMIPS::T0, CMIPS::R0, MAX_ALARM - 1); in AssembleAlarmHandler()
1036 assembler.BNE(CMIPS::S0, CMIPS::T0, checkHandlerLabel); in AssembleAlarmHandler()
1040 assembler.LD(CMIPS::RA, 0x0000, CMIPS::SP); in AssembleAlarmHandler()
1041 assembler.LD(CMIPS::S0, 0x0008, CMIPS::SP); in AssembleAlarmHandler()
1042 assembler.ADDIU(CMIPS::SP, CMIPS::SP, 0x10); in AssembleAlarmHandler()
1043 assembler.JR(CMIPS::RA); in AssembleAlarmHandler()
1077 if(m_ee.m_State.nCOP0[CCOP_SCU::STATUS] & CMIPS::STATUS_EXL) in ThreadShakeAndBake()
1155 thread->contextPtr = m_ee.m_State.nGPR[CMIPS::SP].nV0 - STACKRES; in ThreadSaveContext()
1164 if(i == CMIPS::R0) continue; in ThreadSaveContext()
1165 if(i == CMIPS::K0) continue; in ThreadSaveContext()
1166 if(i == CMIPS::K1) continue; in ThreadSaveContext()
1173 auto& sa = context->gpr[CMIPS::R0].nV0; in ThreadSaveContext()
1174 auto& hi = context->gpr[CMIPS::K0]; in ThreadSaveContext()
1175 auto& lo = context->gpr[CMIPS::K1]; in ThreadSaveContext()
1197 if(i == CMIPS::R0) continue; in ThreadLoadContext()
1198 if(i == CMIPS::K0) continue; in ThreadLoadContext()
1199 if(i == CMIPS::K1) continue; in ThreadLoadContext()
1206 auto& sa = context->gpr[CMIPS::R0].nV0; in ThreadLoadContext()
1207 auto& hi = context->gpr[CMIPS::K0]; in ThreadLoadContext()
1208 auto& lo = context->gpr[CMIPS::K1]; in ThreadLoadContext()
1236 context->gpr[CMIPS::SP].nV0 = stackTop - STACK_FRAME_RESERVE_SIZE; in ThreadReset()
1237 context->gpr[CMIPS::FP].nV0 = stackTop - STACK_FRAME_RESERVE_SIZE; in ThreadReset()
1238 context->gpr[CMIPS::GP].nV0 = thread->gp; in ThreadReset()
1239 context->gpr[CMIPS::RA].nV0 = BIOS_ADDRESS_THREADEPILOG; in ThreadReset()
1452 uint32 CPS2OS::TranslateAddress(CMIPS*, uint32 vaddrLo) in TranslateAddress() argument
1466 uint32 CPS2OS::TranslateAddressTLB(CMIPS* context, uint32 vaddrLo) in TranslateAddressTLB()
1510 uint32 CPS2OS::CheckTLBExceptions(CMIPS* context, uint32 vaddrLo, uint32 isWrite) in CheckTLBExceptions()
1646 m_ee.m_State.nGPR[CMIPS::GP].nD0 = static_cast<int32>(gp); in sc_ExecPS2()
1701 handler->gp = m_ee.m_State.nGPR[CMIPS::GP].nV[0]; in sc_AddIntcHandler()
1766 handler->gp = m_ee.m_State.nGPR[CMIPS::GP].nV[0]; in sc_AddDmacHandler()
1905 alarm->gp = m_ee.m_State.nGPR[CMIPS::GP].nV0; in sc_SetAlarm()
2012 context->gpr[CMIPS::A0].nV0 = arg; in sc_StartThread()
3054 m_ee.m_State.nCOP0[CCOP_SCU::STATUS] &= ~(CMIPS::STATUS_EXL); in HandleSyscall()
3055 m_ee.m_State.nPC = m_ee.m_State.nGPR[CMIPS::A0].nV0; in HandleSyscall()
3099 m_ee.m_State.nCOP0[CCOP_SCU::STATUS] |= CMIPS::STATUS_EXL; in HandleTLBException()
3531 threadInfo.ra = m_ee.m_State.nGPR[CMIPS::RA].nV0; in GetThreadsDebugInfo()
3532 threadInfo.sp = m_ee.m_State.nGPR[CMIPS::SP].nV0; in GetThreadsDebugInfo()
3537 threadInfo.ra = threadContext->gpr[CMIPS::RA].nV0; in GetThreadsDebugInfo()
3538 threadInfo.sp = threadContext->gpr[CMIPS::SP].nV0; in GetThreadsDebugInfo()