Lines Matching refs:MFI
64 SIMachineFunctionInfo *MFI = MF.getInfo<SIMachineFunctionInfo>(); in getVGPRSpillLaneOrTempRegister() local
74 if (MFI->haveFreeLanesForSGPRSpill(MF, 1)) { in getVGPRSpillLaneOrTempRegister()
78 if (!MFI->allocateSGPRSpillToVGPR(MF, NewFI)) in getVGPRSpillLaneOrTempRegister()
83 LLVM_DEBUG(auto Spill = MFI->getSGPRToVGPRSpills(NewFI).front(); in getVGPRSpillLaneOrTempRegister()
98 if (TRI->spillSGPRToVGPR() && MFI->allocateSGPRSpillToVGPR(MF, NewFI)) { in getVGPRSpillLaneOrTempRegister()
104 auto Spill = MFI->getSGPRToVGPRSpills(NewFI).front(); in getVGPRSpillLaneOrTempRegister()
169 const SIMachineFunctionInfo *MFI = MF->getInfo<SIMachineFunctionInfo>(); in buildGitPtr() local
175 if (MFI->getGITPtrHigh() != 0xffffffff) { in buildGitPtr()
177 .addImm(MFI->getGITPtrHigh()) in buildGitPtr()
183 Register GitPtrLo = MFI->getGITPtrLoReg(*MF); in buildGitPtr()
197 const SIMachineFunctionInfo *MFI = MF.getInfo<SIMachineFunctionInfo>(); in emitEntryFunctionFlatScratchInit() local
222 unsigned NumPreloaded = (MFI->getNumPreloadedSGPRs() + 1) / 2; in emitEntryFunctionFlatScratchInit()
225 Register GITPtrLoReg = MFI->getGITPtrLoReg(MF); in emitEntryFunctionFlatScratchInit()
266 MFI->getPreloadedReg(AMDGPUFunctionArgInfo::FLAT_SCRATCH_INIT); in emitEntryFunctionFlatScratchInit()
328 static bool allStackObjectsAreDead(const MachineFrameInfo &MFI) { in allStackObjectsAreDead() argument
329 for (int I = MFI.getObjectIndexBegin(), E = MFI.getObjectIndexEnd(); in allStackObjectsAreDead()
331 if (!MFI.isDeadObjectIndex(I)) in allStackObjectsAreDead()
346 SIMachineFunctionInfo *MFI = MF.getInfo<SIMachineFunctionInfo>(); in getEntryFunctionReservedScratchRsrcReg() local
348 assert(MFI->isEntryFunction()); in getEntryFunctionReservedScratchRsrcReg()
350 Register ScratchRsrcReg = MFI->getScratchRSrcReg(); in getEntryFunctionReservedScratchRsrcReg()
369 unsigned NumPreloaded = (MFI->getNumPreloadedSGPRs() + 3) / 4; in getEntryFunctionReservedScratchRsrcReg()
375 Register GITPtrLoReg = MFI->getGITPtrLoReg(MF); in getEntryFunctionReservedScratchRsrcReg()
383 MFI->setScratchRSrcReg(Reg); in getEntryFunctionReservedScratchRsrcReg()
410 SIMachineFunctionInfo *MFI = MF.getInfo<SIMachineFunctionInfo>(); in emitEntryFunctionPrologue() local
418 assert(MFI->isEntryFunction()); in emitEntryFunctionPrologue()
420 Register PreloadedScratchWaveOffsetReg = MFI->getPreloadedReg( in emitEntryFunctionPrologue()
450 MFI->getPreloadedReg(AMDGPUFunctionArgInfo::PRIVATE_SEGMENT_BUFFER); in emitEntryFunctionPrologue()
472 unsigned NumPreloaded = MFI->getNumPreloadedSGPRs(); in emitEntryFunctionPrologue()
475 Register GITPtrLoReg = MFI->getGITPtrLoReg(MF); in emitEntryFunctionPrologue()
491 Register SPReg = MFI->getStackPtrOffsetReg(); in emitEntryFunctionPrologue()
498 Register FPReg = MFI->getFrameOffsetReg(); in emitEntryFunctionPrologue()
504 MFI->hasFlatScratchInit() && in emitEntryFunctionPrologue()
534 const SIMachineFunctionInfo *MFI = MF.getInfo<SIMachineFunctionInfo>(); in emitEntryFunctionScratchRsrcRegSetup() local
587 if (MFI->hasImplicitBufferPtr()) { in emitEntryFunctionScratchRsrcRegSetup()
594 .addReg(MFI->getImplicitBufferPtrUserSGPR()) in emitEntryFunctionScratchRsrcRegSetup()
606 .addReg(MFI->getImplicitBufferPtrUserSGPR()) in emitEntryFunctionScratchRsrcRegSetup()
612 MF.getRegInfo().addLiveIn(MFI->getImplicitBufferPtrUserSGPR()); in emitEntryFunctionScratchRsrcRegSetup()
613 MBB.addLiveIn(MFI->getImplicitBufferPtrUserSGPR()); in emitEntryFunctionScratchRsrcRegSetup()
731 const MachineFrameInfo &MFI = MF.getFrameInfo(); in spilledToMemory() local
732 return MFI.getStackID(SaveIndex) != TargetStackID::SGPRSpill; in spilledToMemory()
743 const MachineFrameInfo &MFI = MF.getFrameInfo(); in emitPrologue() local
760 uint32_t NumBytes = MFI.getStackSize(); in emitPrologue()
808 assert(!MFI.isDeadObjectIndex(FramePtrFI)); in emitPrologue()
826 assert(!MFI.isDeadObjectIndex(BasePtrFI)); in emitPrologue()
845 assert(!MFI.isDeadObjectIndex(FramePtrFI)); in emitPrologue()
847 assert(MFI.getStackID(FramePtrFI) == TargetStackID::SGPRSpill); in emitPrologue()
862 assert(!MFI.isDeadObjectIndex(BasePtrFI)); in emitPrologue()
864 assert(MFI.getStackID(BasePtrFI) == TargetStackID::SGPRSpill); in emitPrologue()
916 const unsigned Alignment = MFI.getMaxAlign().value(); in emitPrologue()
989 const MachineFrameInfo &MFI = MF.getFrameInfo(); in emitEpilogue() local
990 uint32_t NumBytes = MFI.getStackSize(); in emitEpilogue()
992 ? NumBytes + MFI.getMaxAlign().value() in emitEpilogue()
1023 assert(!MFI.isDeadObjectIndex(FramePtrFI)); in emitEpilogue()
1037 assert(MFI.getStackID(FramePtrFI) == TargetStackID::SGPRSpill); in emitEpilogue()
1049 assert(!MFI.isDeadObjectIndex(BasePtrFI)); in emitEpilogue()
1063 assert(MFI.getStackID(BasePtrFI) == TargetStackID::SGPRSpill); in emitEpilogue()
1111 const MachineFrameInfo &MFI = MF.getFrameInfo(); in allSGPRSpillsAreDead() local
1113 for (int I = MFI.getObjectIndexBegin(), E = MFI.getObjectIndexEnd(); in allSGPRSpillsAreDead()
1115 if (!MFI.isDeadObjectIndex(I) && in allSGPRSpillsAreDead()
1116 MFI.getStackID(I) == TargetStackID::SGPRSpill && in allSGPRSpillsAreDead()
1139 MachineFrameInfo &MFI = MF.getFrameInfo(); in processFunctionBeforeFrameFinalized() local
1152 BitVector SpillFIs(MFI.getObjectIndexEnd(), false); in processFunctionBeforeFrameFinalized()
1209 FuncInfo->removeDeadFrameIndices(MFI); in processFunctionBeforeFrameFinalized()
1216 if (!allStackObjectsAreDead(MFI)) { in processFunctionBeforeFrameFinalized()
1220 RS->addScavengingFrameIndex(FuncInfo->getScavengeFI(MFI, *TRI)); in processFunctionBeforeFrameFinalized()
1229 SIMachineFunctionInfo *MFI = MF.getInfo<SIMachineFunctionInfo>(); in determineCalleeSaves() local
1230 if (MFI->isEntryFunction()) in determineCalleeSaves()
1260 for (auto SSpill : MFI->getSGPRSpillVGPRs()) in determineCalleeSaves()
1267 assert(!MFI->SGPRForFPSaveRestoreCopy && !MFI->FramePointerSaveIndex && in determineCalleeSaves()
1269 getVGPRSpillLaneOrTempRegister(MF, LiveRegs, MFI->SGPRForFPSaveRestoreCopy, in determineCalleeSaves()
1270 MFI->FramePointerSaveIndex, true); in determineCalleeSaves()
1274 if (MFI->SGPRForFPSaveRestoreCopy) in determineCalleeSaves()
1275 LiveRegs.addReg(MFI->SGPRForFPSaveRestoreCopy); in determineCalleeSaves()
1277 assert(!MFI->SGPRForBPSaveRestoreCopy && in determineCalleeSaves()
1278 !MFI->BasePointerSaveIndex && "Re-reserving spill slot for BP"); in determineCalleeSaves()
1279 getVGPRSpillLaneOrTempRegister(MF, LiveRegs, MFI->SGPRForBPSaveRestoreCopy, in determineCalleeSaves()
1280 MFI->BasePointerSaveIndex, false); in determineCalleeSaves()
1288 const SIMachineFunctionInfo *MFI = MF.getInfo<SIMachineFunctionInfo>(); in determineCalleeSavesSGPR() local
1289 if (MFI->isEntryFunction()) in determineCalleeSavesSGPR()
1296 SavedRegs.reset(MFI->getStackPtrOffsetReg()); in determineCalleeSavesSGPR()
1311 SavedRegs.reset(MFI->getFrameOffsetReg()); in determineCalleeSavesSGPR()
1370 const SIMachineFunctionInfo *MFI = MF.getInfo<SIMachineFunctionInfo>(); in eliminateCallFramePseudoInstr() local
1371 Register SPReg = MFI->getStackPtrOffsetReg(); in eliminateCallFramePseudoInstr()
1393 static bool frameTriviallyRequiresSP(const MachineFrameInfo &MFI) { in frameTriviallyRequiresSP() argument
1394 return MFI.hasVarSizedObjects() || MFI.hasStackMap() || MFI.hasPatchPoint(); in frameTriviallyRequiresSP()
1401 const MachineFrameInfo &MFI = MF.getFrameInfo(); in hasFP() local
1405 if (MFI.hasCalls() && in hasFP()
1412 return MFI.getStackSize() != 0; in hasFP()
1415 return frameTriviallyRequiresSP(MFI) || MFI.isFrameAddressTaken() || in hasFP()
1432 const MachineFrameInfo &MFI = MF.getFrameInfo(); in requiresStackPointerReference() local
1437 if (MFI.hasCalls()) in requiresStackPointerReference()
1442 return frameTriviallyRequiresSP(MFI); in requiresStackPointerReference()