56 ls2_icache_sync_range(register_t va, vsize_t size)  in ls2_icache_sync_range()  argument
59 	const vaddr_t eva = round_line(va + size);  in ls2_icache_sync_range()
61 	va = trunc_line(va);  in ls2_icache_sync_range()
63 	if (va + mci->mci_picache_size <= eva) {  in ls2_icache_sync_range()
68 	for (; va + 8 * 32 <= eva; va += 8 * 32) {  in ls2_icache_sync_range()
69 		cache_op_ls2_8line(va, CACHEOP_LS2_D_HIT_WB_INV);  in ls2_icache_sync_range()
70 		cache_op_ls2_8line(va, CACHEOP_LS2_I_INDEX_INV);  in ls2_icache_sync_range()
73 	for (; va < eva; va += 32) {  in ls2_icache_sync_range()
74 		cache_op_ls2_line(va, CACHEOP_LS2_D_HIT_WB_INV);  in ls2_icache_sync_range()
75 		cache_op_ls2_line(va, CACHEOP_LS2_I_INDEX_INV);  in ls2_icache_sync_range()
82 ls2_icache_sync_range_index(vaddr_t va, vsize_t size)  in ls2_icache_sync_range_index()  argument
94 	va = MIPS_PHYS_TO_KSEG0(va & mci->mci_picache_way_mask);  in ls2_icache_sync_range_index()
95 	eva = round_line(va + size);  in ls2_icache_sync_range_index()
96 	va = trunc_line(va);  in ls2_icache_sync_range_index()
98 	if (va + mci->mci_picache_way_size < eva) {  in ls2_icache_sync_range_index()
99 		va = MIPS_PHYS_TO_KSEG0(0);  in ls2_icache_sync_range_index()
103 	for (; va + 8 * 32 <= eva; va += 8 * 32) {  in ls2_icache_sync_range_index()
104 		cache_op_ls2_8line_4way(va, CACHEOP_LS2_D_INDEX_WB_INV);  in ls2_icache_sync_range_index()
105 		cache_op_ls2_8line(va, CACHEOP_LS2_I_INDEX_INV);  in ls2_icache_sync_range_index()
108 	for (; va < eva; va += 32) {  in ls2_icache_sync_range_index()
109 		cache_op_ls2_line_4way(va, CACHEOP_LS2_D_INDEX_WB_INV);  in ls2_icache_sync_range_index()
110 		cache_op_ls2_line(va, CACHEOP_LS2_I_INDEX_INV);  in ls2_icache_sync_range_index()
124 ls2_pdcache_inv_range(register_t va, vsize_t size)  in ls2_pdcache_inv_range()  argument
126 	const vaddr_t eva = round_line(va + size);  in ls2_pdcache_inv_range()
128 	va = trunc_line(va);  in ls2_pdcache_inv_range()
130 	for (; va + 8 * 32 <= eva; va += 8 * 32) {  in ls2_pdcache_inv_range()
131 		cache_op_ls2_8line(va, CACHEOP_LS2_D_HIT_INV);  in ls2_pdcache_inv_range()
134 	for (; va < eva; va += 32) {  in ls2_pdcache_inv_range()
135 		cache_op_ls2_line(va, CACHEOP_LS2_D_HIT_INV);  in ls2_pdcache_inv_range()
142 ls2_pdcache_wbinv_range(register_t va, vsize_t size)  in ls2_pdcache_wbinv_range()  argument
144 	const vaddr_t eva = round_line(va + size);  in ls2_pdcache_wbinv_range()
146 	va = trunc_line(va);  in ls2_pdcache_wbinv_range()
148 	for (; va + 8 * 32 <= eva; va += 8 * 32) {  in ls2_pdcache_wbinv_range()
149 		cache_op_ls2_8line(va, CACHEOP_LS2_D_HIT_WB_INV);  in ls2_pdcache_wbinv_range()
152 	for (; va < eva; va += 32) {  in ls2_pdcache_wbinv_range()
153 		cache_op_ls2_line(va, CACHEOP_LS2_D_HIT_WB_INV);  in ls2_pdcache_wbinv_range()
160 ls2_pdcache_wb_range(register_t va, vsize_t size)  in ls2_pdcache_wb_range()  argument
165 	ls2_pdcache_wbinv_range(va, size);  in ls2_pdcache_wb_range()
169 ls2_pdcache_wbinv_range_index(vaddr_t va, vsize_t size)  in ls2_pdcache_wbinv_range_index()  argument
180 	va = MIPS_PHYS_TO_KSEG0(va & mci->mci_pdcache_way_mask);  in ls2_pdcache_wbinv_range_index()
182 	eva = round_line(va + size);  in ls2_pdcache_wbinv_range_index()
183 	va = trunc_line(va);  in ls2_pdcache_wbinv_range_index()
185 	if (va + mci->mci_pdcache_way_size > eva) {  in ls2_pdcache_wbinv_range_index()
186 		va = MIPS_PHYS_TO_KSEG0(0);  in ls2_pdcache_wbinv_range_index()
190 	for (; va + 8 * 32 <= eva; va += 8 * 32) {  in ls2_pdcache_wbinv_range_index()
191 		cache_op_ls2_8line_4way(va, CACHEOP_LS2_D_INDEX_WB_INV);  in ls2_pdcache_wbinv_range_index()
194 	for (; va < eva; va += 32) {  in ls2_pdcache_wbinv_range_index()
195 		cache_op_ls2_line_4way(va, CACHEOP_LS2_D_INDEX_WB_INV);  in ls2_pdcache_wbinv_range_index()
218 ls2_sdcache_inv_range(register_t va, vsize_t size)  in ls2_sdcache_inv_range()  argument
220 	const vaddr_t eva = round_line(va + size);  in ls2_sdcache_inv_range()
222 	va = trunc_line(va);  in ls2_sdcache_inv_range()
224 	for (; va + 8 * 32 <= eva; va += 8 * 32) {  in ls2_sdcache_inv_range()
225 		cache_op_ls2_8line(va, CACHEOP_LS2_D_HIT_INV);  in ls2_sdcache_inv_range()
226 		cache_op_ls2_8line(va, CACHEOP_LS2_S_HIT_INV);  in ls2_sdcache_inv_range()
229 	for (; va < eva; va += 32) {  in ls2_sdcache_inv_range()
230 		cache_op_ls2_line(va, CACHEOP_LS2_D_HIT_INV);  in ls2_sdcache_inv_range()
231 		cache_op_ls2_line(va, CACHEOP_LS2_S_HIT_INV);  in ls2_sdcache_inv_range()
238 ls2_sdcache_wbinv_range(register_t va, vsize_t size)  in ls2_sdcache_wbinv_range()  argument
240 	const vaddr_t eva = round_line(va + size);  in ls2_sdcache_wbinv_range()
242 	va = trunc_line(va);  in ls2_sdcache_wbinv_range()
244 	for (; va + 8 * 32 <= eva; va += 8 * 32) {  in ls2_sdcache_wbinv_range()
245 		cache_op_ls2_8line(va, CACHEOP_LS2_D_HIT_WB_INV);  in ls2_sdcache_wbinv_range()
246 		cache_op_ls2_8line(va, CACHEOP_LS2_S_HIT_WB_INV);  in ls2_sdcache_wbinv_range()
249 	for (; va < eva; va += 32) {  in ls2_sdcache_wbinv_range()
250 		cache_op_ls2_line(va, CACHEOP_LS2_D_HIT_WB_INV);  in ls2_sdcache_wbinv_range()
251 		cache_op_ls2_line(va, CACHEOP_LS2_S_HIT_WB_INV);  in ls2_sdcache_wbinv_range()
258 ls2_sdcache_wb_range(register_t va, vsize_t size)  in ls2_sdcache_wb_range()  argument
263 	ls2_sdcache_wbinv_range(va, size);  in ls2_sdcache_wb_range()
267 ls2_sdcache_wbinv_range_index(vaddr_t va, vsize_t size)  in ls2_sdcache_wbinv_range_index()  argument
278 	va = MIPS_PHYS_TO_KSEG0(va & mci->mci_sdcache_way_mask);  in ls2_sdcache_wbinv_range_index()
280 	eva = round_line(va + size);  in ls2_sdcache_wbinv_range_index()
281 	va = trunc_line(va);  in ls2_sdcache_wbinv_range_index()
283 	if (va + mci->mci_sdcache_way_size > eva) {  in ls2_sdcache_wbinv_range_index()
284 		va = MIPS_PHYS_TO_KSEG0(0);  in ls2_sdcache_wbinv_range_index()
285 		eva = va + mci->mci_sdcache_way_size;  in ls2_sdcache_wbinv_range_index()
288 	for (; va + 8 * 32 <= eva; va += 8 * 32) {  in ls2_sdcache_wbinv_range_index()
289 		cache_op_ls2_8line_4way(va, CACHEOP_LS2_D_INDEX_WB_INV);  in ls2_sdcache_wbinv_range_index()
290 		cache_op_ls2_8line_4way(va, CACHEOP_LS2_S_INDEX_WB_INV);  in ls2_sdcache_wbinv_range_index()
293 	for (; va < eva; va += 32) {  in ls2_sdcache_wbinv_range_index()
294 		cache_op_ls2_line_4way(va, CACHEOP_LS2_D_INDEX_WB_INV);  in ls2_sdcache_wbinv_range_index()
295 		cache_op_ls2_line_4way(va, CACHEOP_LS2_S_INDEX_WB_INV);  in ls2_sdcache_wbinv_range_index()