Lines Matching +defs:chn +defs:n
55 #define CMN_PMU_EVENTn_ID_SHIFT(n) ((n) * 8) argument
58 #define CMN_DTM_WPn(n) (0x1A0 + (n) * 0x18) argument
59 #define CMN_DTM_WPn_CONFIG(n) (CMN_DTM_WPn(n) + 0x00) argument
65 #define CMN_DTM_WPn_VAL(n) (CMN_DTM_WPn(n) + 0x08) argument
66 #define CMN_DTM_WPn_MASK(n) (CMN_DTM_WPn(n) + 0x10) argument
74 #define CMN__PMEVCNTn_GLOBAL_NUM_SHIFT(n) ((n) * 4) argument
75 #define CMN__PMEVCNT_PAIRED(n) BIT(4 + (n)) argument
91 #define _CMN_DT_CNT_REG(n) ((((n) / 2) * 4 + (n) % 2) * 4) argument
92 #define CMN_DT_PMEVCNT(n) (CMN_PMU_OFFSET + _CMN_DT_CNT_REG(n)) argument
95 #define CMN_DT_PMEVCNTSR(n) (CMN_PMU_OFFSET + 0x50 + _CMN_DT_CNT_REG(n)) argument
107 #define CMN_DT_PMSSR_SS_STATUS(n) BIT(n) argument
639 u32 chn = CMN_EVENT_WP_CHN_SEL(event); in arm_cmn_wp_config() local