113 static void sa1100_update_edge_regs(struct sa1100_gpio_chip *sgc)  in sa1100_update_edge_regs()  argument
115 	void *base = sgc->membase;  in sa1100_update_edge_regs()
118 	grer = sgc->irqrising & sgc->irqmask;  in sa1100_update_edge_regs()
119 	gfer = sgc->irqfalling & sgc->irqmask;  in sa1100_update_edge_regs()
127 	struct sa1100_gpio_chip *sgc = irq_data_get_irq_chip_data(d);  in sa1100_gpio_type()  local
131 		if ((sgc->irqrising | sgc->irqfalling) & mask)  in sa1100_gpio_type()
137 		sgc->irqrising |= mask;  in sa1100_gpio_type()
139 		sgc->irqrising &= ~mask;  in sa1100_gpio_type()
141 		sgc->irqfalling |= mask;  in sa1100_gpio_type()
143 		sgc->irqfalling &= ~mask;  in sa1100_gpio_type()
145 	sa1100_update_edge_regs(sgc);  in sa1100_gpio_type()
155 	struct sa1100_gpio_chip *sgc = irq_data_get_irq_chip_data(d);  in sa1100_gpio_ack()  local
157 	writel_relaxed(BIT(d->hwirq), sgc->membase + R_GEDR);  in sa1100_gpio_ack()
162 	struct sa1100_gpio_chip *sgc = irq_data_get_irq_chip_data(d);  in sa1100_gpio_mask()  local
165 	sgc->irqmask &= ~mask;  in sa1100_gpio_mask()
167 	sa1100_update_edge_regs(sgc);  in sa1100_gpio_mask()
172 	struct sa1100_gpio_chip *sgc = irq_data_get_irq_chip_data(d);  in sa1100_gpio_unmask()  local
175 	sgc->irqmask |= mask;  in sa1100_gpio_unmask()
177 	sa1100_update_edge_regs(sgc);  in sa1100_gpio_unmask()
182 	struct sa1100_gpio_chip *sgc = irq_data_get_irq_chip_data(d);  in sa1100_gpio_wake()  local
186 			sgc->irqwake |= BIT(d->hwirq);  in sa1100_gpio_wake()
188 			sgc->irqwake &= ~BIT(d->hwirq);  in sa1100_gpio_wake()
208 	struct sa1100_gpio_chip *sgc = d->host_data;  in sa1100_gpio_irqdomain_map()  local
210 	irq_set_chip_data(irq, sgc);  in sa1100_gpio_irqdomain_map()
231 	struct sa1100_gpio_chip *sgc = irq_desc_get_handler_data(desc);  in sa1100_gpio_handler()  local
233 	void __iomem *gedr = sgc->membase + R_GEDR;  in sa1100_gpio_handler()
243 		irq = sgc->irqbase;  in sa1100_gpio_handler()
257 	struct sa1100_gpio_chip *sgc = &sa1100_gpio_chip;  in sa1100_gpio_suspend()  local
262 	writel_relaxed(sgc->irqwake & sgc->irqrising, sgc->membase + R_GRER);  in sa1100_gpio_suspend()
263 	writel_relaxed(sgc->irqwake & sgc->irqfalling, sgc->membase + R_GFER);  in sa1100_gpio_suspend()
268 	writel_relaxed(readl_relaxed(sgc->membase + R_GEDR),  in sa1100_gpio_suspend()
269 		       sgc->membase + R_GEDR);  in sa1100_gpio_suspend()
311 	struct sa1100_gpio_chip *sgc = &sa1100_gpio_chip;  in sa1100_init_gpio()  local
315 	writel_relaxed(0, sgc->membase + R_GFER);  in sa1100_init_gpio()
316 	writel_relaxed(0, sgc->membase + R_GRER);  in sa1100_init_gpio()
317 	writel_relaxed(-1, sgc->membase + R_GEDR);  in sa1100_init_gpio()
323 			&sa1100_gpio_irqdomain_ops, sgc);  in sa1100_init_gpio()
327 						 sa1100_gpio_handler, sgc);  in sa1100_init_gpio()