Lines Matching defs:dmfe_board_info
198 struct dmfe_board_info { struct
199 u32 chip_id; /* Chip vendor/Device ID */
200 u8 chip_revision; /* Chip revision */
201 struct net_device *next_dev; /* next device */
202 struct pci_dev *pdev; /* PCI device */
203 spinlock_t lock;
205 void __iomem *ioaddr; /* I/O base address */
206 u32 cr0_data;
207 u32 cr5_data;
208 u32 cr6_data;
209 u32 cr7_data;
210 u32 cr15_data;
213 dma_addr_t buf_pool_dma_ptr; /* Tx buffer pool memory */
214 dma_addr_t buf_pool_dma_start; /* Tx buffer pool align dword */
215 dma_addr_t desc_pool_dma_ptr; /* descriptor pool memory */
216 dma_addr_t first_tx_desc_dma;
217 dma_addr_t first_rx_desc_dma;
220 unsigned char *buf_pool_ptr; /* Tx buffer pool memory */
221 unsigned char *buf_pool_start; /* Tx buffer pool align dword */
222 unsigned char *desc_pool_ptr; /* descriptor pool memory */
223 struct tx_desc *first_tx_desc;
224 struct tx_desc *tx_insert_ptr;
225 struct tx_desc *tx_remove_ptr;
226 struct rx_desc *first_rx_desc;
227 struct rx_desc *rx_insert_ptr;
228 struct rx_desc *rx_ready_ptr; /* packet come pointer */
229 unsigned long tx_packet_cnt; /* transmitted packet count */
230 unsigned long tx_queue_cnt; /* wait to send packet count */
231 unsigned long rx_avail_cnt; /* available rx descriptor count */
232 unsigned long interval_rx_cnt; /* rx packet count a callback time */
234 u16 HPNA_command; /* For HPNA register 16 */
235 u16 HPNA_timer; /* For HPNA remote device check */
236 u16 dbug_cnt;
237 u16 NIC_capability; /* NIC media capability */
238 u16 PHY_reg4; /* Saved Phyxcer register 4 value */
240 u8 HPNA_present; /* 0:none, 1:DM9801, 2:DM9802 */
241 u8 chip_type; /* Keep DM9102A chip type */
242 u8 media_mode; /* user specify media mode */
243 u8 op_mode; /* real work media mode */
244 u8 phy_addr;
245 u8 wait_reset; /* Hardware failed, need to reset */
246 u8 dm910x_chk_mode; /* Operating mode check */
247 u8 first_in_callback; /* Flag to record state */
248 u8 wol_mode; /* user WOL settings */
249 struct timer_list timer;
252 unsigned long tx_fifo_underrun;
253 unsigned long tx_loss_carrier;
254 unsigned long tx_no_carrier;
255 unsigned long tx_late_collision;
256 unsigned long tx_excessive_collision;
257 unsigned long tx_jabber_timeout;
258 unsigned long reset_count;
259 unsigned long reset_cr8;
260 unsigned long reset_fatal;
261 unsigned long reset_TXtimeout;
264 unsigned char srom[128];