Lines Matching refs:__u32
131 __u32 vals[IPU3_UAPI_AE_BINS * IPU3_UAPI_AE_COLORS];
196 __u32 cell0:4;
197 __u32 cell1:4;
198 __u32 cell2:4;
199 __u32 cell3:4;
200 __u32 cell4:4;
201 __u32 cell5:4;
202 __u32 cell6:4;
203 __u32 cell7:4;
333 __u32 y1_sign_vec;
354 __u32 y2_sign_vec;
364 __u32 reserved0:8;
365 __u32 y1_nf:4;
366 __u32 reserved1:4;
367 __u32 y2_nf:4;
368 __u32 reserved2:12;
450 __u32 bayer_sign;
489 __u32 num_of_stripes __attribute__((aligned(32)));
491 __u32 num_sets;
493 __u32 size_of_set;
495 __u32 bubble_size;
521 __u32 awb_en __attribute__((aligned(32)));
523 __u32 ae_en;
525 __u32 af_en;
527 __u32 awb_fr_en;
551 __u32 ae_join_buffers;
645 __u32 cf:13;
646 __u32 reserved0:3;
647 __u32 cg:5;
648 __u32 ci:5;
649 __u32 reserved1:1;
650 __u32 r_nf:5;
684 __u32 reserved0:3;
686 __u32 reserved2:3;
723 __u32 bp_thr_gain:5;
724 __u32 reserved0:2;
725 __u32 defect_mode:1;
726 __u32 bp_gain:6;
727 __u32 reserved1:18;
728 __u32 w0_coeff:4;
729 __u32 reserved2:4;
730 __u32 w1_coeff:4;
731 __u32 reserved3:20;
759 __u32 alpha:4;
760 __u32 beta:4;
761 __u32 gamma:4;
762 __u32 reserved0:4;
763 __u32 max_inf:4;
764 __u32 reserved1:7;
765 __u32 gd_enable:1;
766 __u32 bpc_enable:1;
767 __u32 bnr_enable:1;
768 __u32 ff_enable:1;
769 __u32 reserved2:1;
786 __u32 x_sqr_reset;
787 __u32 y_sqr_reset;
822 __u32 column_size;
856 __u32 gd_red:6;
857 __u32 reserved0:2;
858 __u32 gd_green:6;
859 __u32 reserved1:2;
860 __u32 gd_blue:6;
861 __u32 reserved2:10;
862 __u32 gd_black:14;
863 __u32 reserved3:2;
864 __u32 gd_shading:7;
865 __u32 reserved4:1;
866 __u32 gd_support:2;
867 __u32 reserved5:1;
868 __u32 gd_clip:1;
869 __u32 gd_central_weight:4;
904 __u32 dm_en:1;
905 __u32 ch_ar_en:1;
906 __u32 fcc_en:1;
907 __u32 reserved0:13;
908 __u32 frame_width:16;
910 __u32 gamma_sc:5;
911 __u32 reserved1:3;
912 __u32 lc_ctrl:5;
913 __u32 reserved2:3;
914 __u32 cr_param1:5;
915 __u32 reserved3:3;
916 __u32 cr_param2:5;
917 __u32 reserved4:3;
919 __u32 coring_param:5;
920 __u32 reserved5:27;
969 __u32 enable:1;
970 __u32 reserved:31;
1063 __u32 ds_c00:2;
1064 __u32 ds_c01:2;
1065 __u32 ds_c02:2;
1066 __u32 ds_c03:2;
1067 __u32 ds_c10:2;
1068 __u32 ds_c11:2;
1069 __u32 ds_c12:2;
1070 __u32 ds_c13:2;
1071 __u32 ds_nf:5;
1072 __u32 reserved0:3;
1073 __u32 csc_en:1;
1074 __u32 uv_bin_output:1;
1075 __u32 reserved1:6;
1126 __u32 init_set_vrt_offst_ul:8;
1127 __u32 shd_enable:1;
1128 __u32 gain_factor:2;
1129 __u32 reserved:21;
1230 __u32 x0:9;
1231 __u32 x1:9;
1232 __u32 a01:9;
1233 __u32 b01:5;
1264 __u32 x0:9;
1265 __u32 x1:9;
1266 __u32 x2:9;
1267 __u32 reserved0:5;
1269 __u32 x3:9;
1270 __u32 x4:9;
1271 __u32 x5:9;
1272 __u32 reserved1:5;
1274 __u32 a01:9;
1275 __u32 a12:9;
1276 __u32 a23:9;
1277 __u32 reserved2:5;
1279 __u32 a34:9;
1280 __u32 a45:9;
1281 __u32 reserved3:14;
1283 __u32 b01:9;
1284 __u32 b12:9;
1285 __u32 b23:9;
1286 __u32 reserved4:5;
1288 __u32 b34:9;
1289 __u32 b45:9;
1290 __u32 reserved5:14;
1304 __u32 x0:9;
1305 __u32 x1:9;
1306 __u32 a01:9;
1307 __u32 reserved1:5;
1309 __u32 b01:8;
1310 __u32 reserved2:24;
1333 __u32 x0:9;
1334 __u32 x1:9;
1335 __u32 x2:9;
1336 __u32 reserved0:5;
1338 __u32 x3:9;
1339 __u32 a01:9;
1340 __u32 a12:9;
1341 __u32 reserved1:5;
1343 __u32 a23:9;
1344 __u32 b01:8;
1345 __u32 b12:8;
1346 __u32 reserved2:7;
1348 __u32 b23:8;
1349 __u32 reserved3:24;
1377 __u32 x0:8;
1378 __u32 x1:8;
1379 __u32 x2:8;
1380 __u32 x3:8;
1382 __u32 x4:8;
1383 __u32 x5:8;
1384 __u32 reserved1:16;
1386 __u32 a01:16;
1387 __u32 a12:16;
1389 __u32 a23:16;
1390 __u32 a34:16;
1392 __u32 a45:16;
1393 __u32 reserved2:16;
1395 __u32 b01:10;
1396 __u32 b12:10;
1397 __u32 b23:10;
1398 __u32 reserved4:2;
1400 __u32 b34:10;
1401 __u32 b45:10;
1402 __u32 reserved5:12;
1454 __u32 horver_diag_coeff:7;
1455 __u32 reserved0:1;
1456 __u32 clamp_stitch:6;
1457 __u32 reserved1:2;
1458 __u32 direct_metric_update:5;
1459 __u32 reserved2:3;
1460 __u32 ed_horver_diag_coeff:7;
1461 __u32 reserved3:1;
1475 __u32 iefd_en:1;
1476 __u32 denoise_en:1;
1477 __u32 direct_smooth_en:1;
1478 __u32 rad_en:1;
1479 __u32 vssnlm_en:1;
1480 __u32 reserved:27;
1498 __u32 nega_lmt_txt:13;
1499 __u32 reserved0:19;
1500 __u32 posi_lmt_txt:13;
1501 __u32 reserved1:19;
1502 __u32 nega_lmt_dir:13;
1503 __u32 reserved2:19;
1504 __u32 posi_lmt_dir:13;
1505 __u32 reserved3:19;
1520 __u32 dir_shrp:7;
1521 __u32 reserved0:1;
1522 __u32 dir_dns:7;
1523 __u32 reserved1:1;
1524 __u32 ndir_dns_powr:7;
1525 __u32 reserved2:9;
1539 __u32 unsharp_weight:7;
1540 __u32 reserved0:1;
1541 __u32 unsharp_amount:9;
1542 __u32 reserved1:15;
1572 __u32 c00:9;
1573 __u32 c01:9;
1574 __u32 c02:9;
1575 __u32 reserved:5;
1587 __u32 c11:9;
1588 __u32 c12:9;
1589 __u32 c22:9;
1590 __u32 reserved:5;
1614 __u32 reserved0:3;
1616 __u32 reserved1:3;
1626 __u32 x2:24;
1627 __u32 reserved:8;
1637 __u32 y2:24;
1638 __u32 reserved:8;
1651 __u32 rad_nf:4;
1652 __u32 reserved0:4;
1653 __u32 rad_inv_r2:7;
1654 __u32 reserved1:17;
1669 __u32 rad_dir_far_sharp_w:8;
1670 __u32 rad_dir_far_dns_w:8;
1671 __u32 rad_ndir_far_dns_power:8;
1672 __u32 reserved:8;
1688 __u32 cu6_pow:7;
1689 __u32 reserved0:1;
1690 __u32 cu_unsharp_pow:7;
1691 __u32 reserved1:1;
1692 __u32 rad_cu6_pow:7;
1693 __u32 reserved2:1;
1694 __u32 rad_cu_unsharp_pow:6;
1695 __u32 reserved3:2;
1708 __u32 rad_cu6_x1:9;
1709 __u32 reserved0:1;
1710 __u32 rad_cu_unsharp_x1:9;
1711 __u32 reserved1:13;
1749 __u32 vs_x0:8;
1750 __u32 vs_x1:8;
1751 __u32 vs_x2:8;
1752 __u32 reserved2:8;
1766 __u32 vs_y1:4;
1767 __u32 reserved0:4;
1768 __u32 vs_y2:4;
1769 __u32 reserved1:4;
1770 __u32 vs_y3:4;
1771 __u32 reserved2:12;
1832 __u32 c00:2;
1833 __u32 c01:2;
1834 __u32 c02:2;
1835 __u32 c03:2;
1836 __u32 c10:2;
1837 __u32 c11:2;
1838 __u32 c12:2;
1839 __u32 c13:2;
1840 __u32 norm_factor:5;
1841 __u32 reserved0:4;
1842 __u32 bin_output:1;
1843 __u32 reserved1:6;
1858 __u32 enable:1;
1859 __u32 yuv_mode:1;
1860 __u32 reserved0:14;
1861 __u32 col_size:12;
1862 __u32 reserved1:4;
1874 __u32 u:13;
1875 __u32 reserved0:3;
1876 __u32 v:13;
1877 __u32 reserved1:3;
1895 __u32 vy:8;
1896 __u32 vu:8;
1897 __u32 vv:8;
1898 __u32 reserved0:8;
1900 __u32 hy:8;
1901 __u32 hu:8;
1902 __u32 hv:8;
1903 __u32 reserved1:8;
1918 __u32 fir_0h:6;
1919 __u32 reserved0:2;
1920 __u32 fir_1h:6;
1921 __u32 reserved1:2;
1922 __u32 fir_2h:6;
1923 __u32 dalpha_clip_val:9;
1924 __u32 reserved2:1;
1961 __u32 a_diag:5;
1962 __u32 reserved0:3;
1963 __u32 a_periph:5;
1964 __u32 reserved1:3;
1965 __u32 a_cent:5;
1966 __u32 reserved2:9;
1967 __u32 enable:1;
1986 __u32 edge_sense_0:13;
1987 __u32 reserved0:3;
1988 __u32 delta_edge_sense:13;
1989 __u32 reserved1:3;
1990 __u32 corner_sense_0:13;
1991 __u32 reserved2:3;
1992 __u32 delta_corner_sense:13;
1993 __u32 reserved3:3;
2012 __u32 gain_pos_0:5;
2013 __u32 reserved0:3;
2014 __u32 delta_gain_posi:5;
2015 __u32 reserved1:3;
2016 __u32 gain_neg_0:5;
2017 __u32 reserved2:3;
2018 __u32 delta_gain_neg:5;
2019 __u32 reserved3:3;
2042 __u32 clip_pos_0:5;
2043 __u32 reserved0:3;
2044 __u32 delta_clip_posi:5;
2045 __u32 reserved1:3;
2046 __u32 clip_neg_0:5;
2047 __u32 reserved2:3;
2048 __u32 delta_clip_neg:5;
2049 __u32 reserved3:3;
2069 __u32 gain_exp:4;
2070 __u32 reserved0:28;
2071 __u32 min_edge:13;
2072 __u32 reserved1:3;
2073 __u32 lin_seg_param:4;
2074 __u32 reserved2:4;
2075 __u32 t1:1;
2076 __u32 t2:1;
2077 __u32 reserved3:6;
2099 __u32 diag_disc_g:4;
2100 __u32 reserved0:4;
2101 __u32 hvw_hor:4;
2102 __u32 dw_hor:4;
2103 __u32 hvw_diag:4;
2104 __u32 dw_diag:4;
2105 __u32 reserved1:8;
2126 __u32 pos_0:13;
2127 __u32 reserved0:3;
2128 __u32 pos_delta:13;
2129 __u32 reserved1:3;
2130 __u32 neg_0:13;
2131 __u32 reserved2:3;
2132 __u32 neg_delta:13;
2133 __u32 reserved3:3;
2175 __u32 en:1;
2176 __u32 blend_shift:3;
2177 __u32 gain_according_to_y_only:1;
2178 __u32 reserved0:11;
2180 __u32 reserved1:3;
2182 __u32 reserved2:3;
2200 __u32 reserved0:4;
2202 __u32 reserved1:4;
2204 __u32 reserved2:4;
2206 __u32 reserved3:4;
2354 __u32 enable:1; /* 0 or 1, disabled or enabled */
2355 __u32 adaptive_treshhold_en:1; /* On IPU3, always enabled */
2357 __u32 reserved1:30;
2371 __u32 x_sqr_reset:24;
2372 __u32 r_normfactor:5;
2373 __u32 reserved5:3;
2375 __u32 y_sqr_reset:24;
2376 __u32 gain_scale:8;
2388 __u32 entry0:6;
2389 __u32 entry1:6;
2390 __u32 entry2:6;
2391 __u32 reserved:14;
2410 __u32 anr_stitch_en;
2549 __u32 knee_y1;
2550 __u32 knee_y2;
2551 __u32 maxfb_y;
2552 __u32 maxfb_u;
2553 __u32 maxfb_v;
2554 __u32 round_adj_y;
2555 __u32 round_adj_u;
2556 __u32 round_adj_v;
2557 __u32 ref_buf_select;
2590 __u32 y0;
2591 __u32 u0;
2592 __u32 v0;
2593 __u32 ydiff;
2594 __u32 udiff;
2595 __u32 vdiff;
2608 __u32 u0;
2609 __u32 v0;
2610 __u32 udiff;
2611 __u32 vdiff;
2621 __u32 strength;
2702 __u32 gdc:1;
2703 __u32 obgrid:1;
2704 __u32 reserved1:30;
2706 __u32 acc_bnr:1;
2707 __u32 acc_green_disparity:1;
2708 __u32 acc_dm:1;
2709 __u32 acc_ccm:1;
2710 __u32 acc_gamma:1;
2711 __u32 acc_csc:1;
2712 __u32 acc_cds:1;
2713 __u32 acc_shd:1;
2714 __u32 reserved2:2;
2715 __u32 acc_iefd:1;
2716 __u32 acc_yds_c0:1;
2717 __u32 acc_chnr_c0:1;
2718 __u32 acc_y_ee_nr:1;
2719 __u32 acc_yds:1;
2720 __u32 acc_chnr:1;
2721 __u32 acc_ytm:1;
2722 __u32 acc_yds2:1;
2723 __u32 acc_tcc:1;
2724 __u32 acc_dpc:1;
2725 __u32 acc_bds:1;
2726 __u32 acc_anr:1;
2727 __u32 acc_awb_fr:1;
2728 __u32 acc_ae:1;
2729 __u32 acc_af:1;
2730 __u32 acc_awb:1;
2731 __u32 reserved3:4;
2733 __u32 lin_vmem_params:1;
2734 __u32 tnr3_vmem_params:1;
2735 __u32 xnr3_vmem_params:1;
2736 __u32 tnr3_dmem_params:1;
2737 __u32 xnr3_dmem_params:1;
2738 __u32 reserved4:1;
2739 __u32 obgrid_param:1;
2740 __u32 reserved5:25;