Lines Matching refs:__ADC_PTR_REG_OFFSET

384 #define __ADC_PTR_REG_OFFSET(__REG__, __REG_OFFFSET__)                         \  macro
2993 …register uint32_t *preg = __ADC_PTR_REG_OFFSET(ADCx->SQR1, __ADC_MASK_SHIFT(Rank, ADC_REG_SQRX_REG…  in LL_ADC_REG_SetSequencerRanks()
3131 …register uint32_t *preg = __ADC_PTR_REG_OFFSET(ADCx->SQR1, __ADC_MASK_SHIFT(Rank, ADC_REG_SQRX_REG…  in LL_ADC_REG_GetSequencerRanks()
3722 …register uint32_t *preg = __ADC_PTR_REG_OFFSET(ADCx->JOFR1, __ADC_MASK_SHIFT(Rank, ADC_INJ_JOFRX_R…  in LL_ADC_INJ_SetOffset()
3749 …register uint32_t *preg = __ADC_PTR_REG_OFFSET(ADCx->JOFR1, __ADC_MASK_SHIFT(Rank, ADC_INJ_JOFRX_R…  in LL_ADC_INJ_GetOffset()
3878 …register uint32_t *preg = __ADC_PTR_REG_OFFSET(ADCx->SMPR1, __ADC_MASK_SHIFT(Channel, ADC_CHANNEL_…  in LL_ADC_SetChannelSamplingTime()
3983 …register uint32_t *preg = __ADC_PTR_REG_OFFSET(ADCx->SMPR1, __ADC_MASK_SHIFT(Channel, ADC_CHANNEL_…  in LL_ADC_GetChannelSamplingTime()
4391   register uint32_t *preg = __ADC_PTR_REG_OFFSET(ADCx->HTR, AWDThresholdsHighLow);  in LL_ADC_SetAnalogWDThresholds()
4414   register uint32_t *preg = __ADC_PTR_REG_OFFSET(ADCx->HTR, AWDThresholdsHighLow);  in LL_ADC_GetAnalogWDThresholds()
4711 …register uint32_t *preg = __ADC_PTR_REG_OFFSET(ADCx->JDR1, __ADC_MASK_SHIFT(Rank, ADC_INJ_JDRX_REG…  in LL_ADC_INJ_ReadConversionData32()
4738 …register uint32_t *preg = __ADC_PTR_REG_OFFSET(ADCx->JDR1, __ADC_MASK_SHIFT(Rank, ADC_INJ_JDRX_REG…  in LL_ADC_INJ_ReadConversionData12()
4765 …register uint32_t *preg = __ADC_PTR_REG_OFFSET(ADCx->JDR1, __ADC_MASK_SHIFT(Rank, ADC_INJ_JDRX_REG…  in LL_ADC_INJ_ReadConversionData10()
4792 …register uint32_t *preg = __ADC_PTR_REG_OFFSET(ADCx->JDR1, __ADC_MASK_SHIFT(Rank, ADC_INJ_JDRX_REG…  in LL_ADC_INJ_ReadConversionData8()
4819 …register uint32_t *preg = __ADC_PTR_REG_OFFSET(ADCx->JDR1, __ADC_MASK_SHIFT(Rank, ADC_INJ_JDRX_REG…  in LL_ADC_INJ_ReadConversionData6()