Lines Matching refs:rank_mask
175 void oct3_ddr3_seq(struct ddr_priv *priv, int rank_mask, int if_num, in oct3_ddr3_seq() argument
225 lmc_config.s.rankmask = rank_mask; in oct3_ddr3_seq()
235 rank_mask, sequence, sequence_str[sequence]); in oct3_ddr3_seq()
239 rank_mask); in oct3_ddr3_seq()
513 static void set_mpr_mode(struct ddr_priv *priv, int rank_mask, in set_mpr_mode() argument
522 if (!(rank_mask & (1 << rankx))) in set_mpr_mode()
586 static void display_mpr_page(struct ddr_priv *priv, int rank_mask, in display_mpr_page() argument
593 if (!(rank_mask & (1 << rankx))) in display_mpr_page()
673 int dimm_count, int rank_mask, in set_dram_output_inversion() argument
708 oct3_ddr3_seq(priv, rank_mask, if_num, 0x7); /* Init RCW */ in set_dram_output_inversion()
711 static void write_mpr_page0_pattern(struct ddr_priv *priv, int rank_mask, in write_mpr_page0_pattern() argument
719 if (!(rank_mask & (1 << rankx))) in write_mpr_page0_pattern()
732 static void change_rdimm_mpr_pattern(struct ddr_priv *priv, int rank_mask, in change_rdimm_mpr_pattern() argument
787 set_mpr_mode(priv, rank_mask, if_num, dimm_count, 1, 0); in change_rdimm_mpr_pattern()
789 set_mpr_mode(priv, rank_mask, if_num, dimm_count, 1, 1); in change_rdimm_mpr_pattern()
814 set_dram_output_inversion(priv, if_num, dimm_count, rank_mask, 1); in change_rdimm_mpr_pattern()
834 write_mpr_page0_pattern(priv, rank_mask, if_num, dimm_count, 0x55, 0x8); in change_rdimm_mpr_pattern()
846 set_dram_output_inversion(priv, if_num, dimm_count, rank_mask, 0); in change_rdimm_mpr_pattern()
861 set_mpr_mode(priv, rank_mask, if_num, dimm_count, in change_rdimm_mpr_pattern()
1128 int rank_mask, struct dac_data *dacdat) in process_by_rank_dac() argument
1145 if (!(rank_mask & (1 << rankx))) in process_by_rank_dac()
1189 int rank_mask, struct deskew_data *dskdat) in process_by_rank_dsk() argument
1204 if (!(rank_mask & (1 << rankx))) in process_by_rank_dsk()
1261 static void validate_deskew_training(struct ddr_priv *priv, int rank_mask, in validate_deskew_training() argument
1541 static void perform_offset_training(struct ddr_priv *priv, int rank_mask, in perform_offset_training() argument
1578 oct3_ddr3_seq(priv, rank_mask, if_num, 0x0B); in perform_offset_training()
1582 int rank_mask, int if_num) in perform_internal_vref_training() argument
1622 oct3_ddr3_seq(priv, rank_mask, if_num, 0x0A); in perform_internal_vref_training()
1683 static int perform_deskew_training(struct ddr_priv *priv, int rank_mask, in perform_deskew_training() argument
1752 oct3_ddr3_seq(priv, rank_mask, if_num, 0x0A); in perform_deskew_training()
1763 oct3_ddr3_seq(priv, rank_mask, if_num, 0x0A); in perform_deskew_training()
1770 validate_deskew_training(priv, rank_mask, if_num, &dsk_counts, in perform_deskew_training()
1827 validate_deskew_training(priv, rank_mask, if_num, in perform_deskew_training()
2600 static int rank_mask __section(".data");
2805 cfg.cn78xx.rankmask = rank_mask; /* Set later */ in lmc_config()
2807 rank_mask; in lmc_config()
2809 cfg.cn78xx.init_status = rank_mask; in lmc_config()
3321 if (rank_mask == 0x7) { /* 2-Rank, 1-Rank */ in lmc_modereg_params1()
3572 if (rank_mask & 0x1) in lmc_nxm()
3574 if (rank_mask & 0x2) in lmc_nxm()
3576 if (rank_mask & 0x4) in lmc_nxm()
3578 if (rank_mask & 0x8) in lmc_nxm()
3582 lmc_nxm.cn78xx.cs_mask = ~rank_mask & 0xff; in lmc_nxm()
3626 if (!(rank_mask & (1 << rankx))) in lmc_rodt_mask()
4128 oct3_ddr3_seq(priv, rank_mask, if_num, 0x7); in lmc_dimm01_params()
4144 oct3_ddr3_seq(priv, rank_mask, if_num, 0x7); in lmc_dimm01_params()
4186 oct3_ddr3_seq(priv, rank_mask, if_num, 0x7); in lmc_dimm01_params()
4206 saved_rank_mask = rank_mask; in lmc_rank_init()
4212 rank_mask = (1 << by_rank); in lmc_rank_init()
4213 if (!(rank_mask & saved_rank_mask)) in lmc_rank_init()
4216 rank_mask = saved_rank_mask; in lmc_rank_init()
4219 by_rank, rank_mask); in lmc_rank_init()
4233 oct3_ddr3_seq(priv, rank_mask, if_num, 3); in lmc_rank_init()
4240 ddr_init_seq(priv, rank_mask, if_num); in lmc_rank_init()
4248 change_rdimm_mpr_pattern(priv, rank_mask, if_num, dimm_count); in lmc_rank_init()
4284 perform_offset_training(priv, rank_mask, if_num); in lmc_rank_init()
4290 perform_internal_vref_training(priv, rank_mask, if_num); in lmc_rank_init()
4397 perform_deskew_training(priv, rank_mask, if_num, in lmc_rank_init()
4425 validate_deskew_training(priv, rank_mask, if_num, in lmc_rank_init()
4430 validate_deskew_training(priv, rank_mask, if_num, in lmc_rank_init()
4450 rank_mask = saved_rank_mask; in lmc_rank_init()
4451 ddr_init_seq(priv, rank_mask, if_num); in lmc_rank_init()
4453 process_by_rank_dac(priv, if_num, rank_mask, rank_dac); in lmc_rank_init()
4454 process_by_rank_dsk(priv, if_num, rank_mask, rank_dsk); in lmc_rank_init()
4548 if (!(rank_mask & (1 << rankx))) in lmc_write_leveling_loop()
5095 validate_deskew_training(priv, rank_mask, if_num, in lmc_write_leveling()
5107 perform_deskew_training(priv, rank_mask, if_num, in lmc_write_leveling()
5149 if (!(rank_mask & (1 << rankx))) in lmc_workaround()
5165 validate_deskew_training(priv, rank_mask, if_num, &dsk_counts, in lmc_workaround()
5787 if (!(rank_mask & (1 << rankx))) in lmc_sw_write_leveling()
6080 if (!(rank_mask & (1 << rankx))) in lmc_sw_write_leveling()
6112 if ((rank_mask & 0x0F) != 0x0F) { in lmc_sw_write_leveling()
6120 if (!(rank_mask & (1 << 1))) { in lmc_sw_write_leveling()
6130 if (!(rank_mask & (1 << 2))) { in lmc_sw_write_leveling()
6142 if (!(rank_mask & (1 << 3))) { in lmc_sw_write_leveling()
6896 if (!(rank_mask & (1 << rankx))) in rank_major_loop()
6903 dimm_rank_mask = rank_mask; // should be 1111 in rank_major_loop()
6905 dimm_rank_mask = rank_mask & 3; // should be 01 or 11 in rank_major_loop()
6913 dimm_rank_mask, rank_mask, rankx); in rank_major_loop()
7701 if ((rank_mask & 0x0f) != 0x0f) { in rank_major_loop()
7722 if (!(rank_mask & (1 << 1))) { in rank_major_loop()
7732 if (!(rank_mask & (1 << 2))) { in rank_major_loop()
7744 if (!(rank_mask & (1 << 3))) { in rank_major_loop()
8050 if (!(rank_mask & (1 << rankx))) in lmc_read_leveling()
8176 ddr_init_seq(priv, rank_mask, if_num); in lmc_read_leveling()
8180 if (!(rank_mask & (1 << rankx))) in lmc_read_leveling()
8295 if (!(rank_mask & (1 << rankx))) in lmc_read_leveling()
8455 ddr_init_seq(priv, rank_mask, if_num); in lmc_read_leveling()
8461 if (!(rank_mask & (1 << rankx))) in lmc_read_leveling()
9058 rank_mask = 0x1; in init_octeon3_ddr3_interface()
9060 rank_mask = 0x3; in init_octeon3_ddr3_interface()
9062 rank_mask = 0xf; in init_octeon3_ddr3_interface()
9065 rank_mask |= ((rank_mask & 0x3) << (2 * i)); in init_octeon3_ddr3_interface()
9720 display_mpr_page(priv, rank_mask, if_num, i); in init_octeon3_ddr3_interface()
10291 int rank_mask, rankx, active_ranks; in hw_assist_test_dll_offset() local
10317 rank_mask = lmcx_config.s.init_status; in hw_assist_test_dll_offset()
10374 if (!(rank_mask & (1 << rankx))) in hw_assist_test_dll_offset()
10479 if (!(rank_mask & (1 << rankx))) in hw_assist_test_dll_offset()
10779 int rank_mask, rankx, active_ranks; in cvmx_dbi_switchover_interface() local
10790 rank_mask = lmcx_config.s.init_status; in cvmx_dbi_switchover_interface()
10807 node, lmc, rank_mask, (unsigned long long)rank_offset); in cvmx_dbi_switchover_interface()
10935 if (!(rank_mask & (1 << rankx))) in cvmx_dbi_switchover_interface()
10967 if (!(rank_mask & (1 << rankx))) in cvmx_dbi_switchover_interface()