Lines Matching refs:bias

39 #define MMI_LWX(reg, addr, stride, bias)                                    \  argument
41 "lw "#reg", "#bias"(%[addrt]) \n\t"
43 #define MMI_SWX(reg, addr, stride, bias) \ argument
45 "sw "#reg", "#bias"(%[addrt]) \n\t"
47 #define MMI_LDX(reg, addr, stride, bias) \ argument
49 "ld "#reg", "#bias"(%[addrt]) \n\t"
51 #define MMI_SDX(reg, addr, stride, bias) \ argument
53 "sd "#reg", "#bias"(%[addrt]) \n\t"
55 #define MMI_LWC1(fp, addr, bias) \ argument
56 "lwc1 "#fp", "#bias"("#addr") \n\t"
58 #define MMI_ULWC1(fp, addr, bias) \ argument
59 "ulw %[low32], "#bias"("#addr") \n\t" \
62 #define MMI_LWXC1(fp, addr, stride, bias) \ argument
64 MMI_LWC1(fp, %[addrt], bias)
66 #define MMI_SWC1(fp, addr, bias) \ argument
67 "swc1 "#fp", "#bias"("#addr") \n\t"
69 #define MMI_USWC1(fp, addr, bias) \ argument
71 "usw %[low32], "#bias"("#addr") \n\t"
73 #define MMI_SWXC1(fp, addr, stride, bias) \ argument
75 MMI_SWC1(fp, %[addrt], bias)
77 #define MMI_LDC1(fp, addr, bias) \ argument
78 "ldc1 "#fp", "#bias"("#addr") \n\t"
80 #define MMI_ULDC1(fp, addr, bias) \ argument
81 "uld %[all64], "#bias"("#addr") \n\t" \
84 #define MMI_LDXC1(fp, addr, stride, bias) \ argument
86 MMI_LDC1(fp, %[addrt], bias)
88 #define MMI_SDC1(fp, addr, bias) \ argument
89 "sdc1 "#fp", "#bias"("#addr") \n\t"
91 #define MMI_USDC1(fp, addr, bias) \ argument
93 "usd %[all64], "#bias"("#addr") \n\t"
95 #define MMI_SDXC1(fp, addr, stride, bias) \ argument
97 MMI_SDC1(fp, %[addrt], bias)
99 #define MMI_LQ(reg1, reg2, addr, bias) \ argument
100 "ld "#reg1", "#bias"("#addr") \n\t" \
101 "ld "#reg2", 8+"#bias"("#addr") \n\t"
103 #define MMI_SQ(reg1, reg2, addr, bias) \ argument
104 "sd "#reg1", "#bias"("#addr") \n\t" \
105 "sd "#reg2", 8+"#bias"("#addr") \n\t"
107 #define MMI_LQC1(fp1, fp2, addr, bias) \ argument
108 "ldc1 "#fp1", "#bias"("#addr") \n\t" \
109 "ldc1 "#fp2", 8+"#bias"("#addr") \n\t"
111 #define MMI_SQC1(fp1, fp2, addr, bias) \ argument
112 "sdc1 "#fp1", "#bias"("#addr") \n\t" \
113 "sdc1 "#fp2", 8+"#bias"("#addr") \n\t"
122 #define MMI_LWX(reg, addr, stride, bias) \ argument
123 "gslwx "#reg", "#bias"("#addr", "#stride") \n\t"
125 #define MMI_SWX(reg, addr, stride, bias) \ argument
126 "gsswx "#reg", "#bias"("#addr", "#stride") \n\t"
128 #define MMI_LDX(reg, addr, stride, bias) \ argument
129 "gsldx "#reg", "#bias"("#addr", "#stride") \n\t"
131 #define MMI_SDX(reg, addr, stride, bias) \ argument
132 "gssdx "#reg", "#bias"("#addr", "#stride") \n\t"
134 #define MMI_LWC1(fp, addr, bias) \ argument
135 "lwc1 "#fp", "#bias"("#addr") \n\t"
142 #define MMI_ULWC1(fp, addr, bias) \ argument
143 "ulw %[low32], "#bias"("#addr") \n\t" \
151 #define MMI_ULWC1(fp, addr, bias) \ argument
152 "gslwlc1 "#fp", 3+"#bias"("#addr") \n\t" \
153 "gslwrc1 "#fp", "#bias"("#addr") \n\t"
157 #define MMI_LWXC1(fp, addr, stride, bias) \ argument
158 "gslwxc1 "#fp", "#bias"("#addr", "#stride") \n\t"
160 #define MMI_SWC1(fp, addr, bias) \ argument
161 "swc1 "#fp", "#bias"("#addr") \n\t"
163 #define MMI_USWC1(fp, addr, bias) \ argument
164 "gsswlc1 "#fp", 3+"#bias"("#addr") \n\t" \
165 "gsswrc1 "#fp", "#bias"("#addr") \n\t"
167 #define MMI_SWXC1(fp, addr, stride, bias) \ argument
168 "gsswxc1 "#fp", "#bias"("#addr", "#stride") \n\t"
170 #define MMI_LDC1(fp, addr, bias) \ argument
171 "ldc1 "#fp", "#bias"("#addr") \n\t"
173 #define MMI_ULDC1(fp, addr, bias) \ argument
174 "gsldlc1 "#fp", 7+"#bias"("#addr") \n\t" \
175 "gsldrc1 "#fp", "#bias"("#addr") \n\t"
177 #define MMI_LDXC1(fp, addr, stride, bias) \ argument
178 "gsldxc1 "#fp", "#bias"("#addr", "#stride") \n\t"
180 #define MMI_SDC1(fp, addr, bias) \ argument
181 "sdc1 "#fp", "#bias"("#addr") \n\t"
183 #define MMI_USDC1(fp, addr, bias) \ argument
184 "gssdlc1 "#fp", 7+"#bias"("#addr") \n\t" \
185 "gssdrc1 "#fp", "#bias"("#addr") \n\t"
187 #define MMI_SDXC1(fp, addr, stride, bias) \ argument
188 "gssdxc1 "#fp", "#bias"("#addr", "#stride") \n\t"
190 #define MMI_LQ(reg1, reg2, addr, bias) \ argument
191 "gslq "#reg1", "#reg2", "#bias"("#addr") \n\t"
193 #define MMI_SQ(reg1, reg2, addr, bias) \ argument
194 "gssq "#reg1", "#reg2", "#bias"("#addr") \n\t"
196 #define MMI_LQC1(fp1, fp2, addr, bias) \ argument
197 "gslqc1 "#fp1", "#fp2", "#bias"("#addr") \n\t"
199 #define MMI_SQC1(fp1, fp2, addr, bias) \ argument
200 "gssqc1 "#fp1", "#fp2", "#bias"("#addr") \n\t"