Lines Matching refs:moutb
367 #define moutb(p,v) MMIO_OUT8(hwp->MMIOBase, (hwp->MMIOOffset + (p)),(v)) macro
372 moutb(hwp->IOBase + VGA_CRTC_INDEX_OFFSET, index); in mmioWriteCrtc()
373 moutb(hwp->IOBase + VGA_CRTC_DATA_OFFSET, value); in mmioWriteCrtc()
379 moutb(hwp->IOBase + VGA_CRTC_INDEX_OFFSET, index); in mmioReadCrtc()
386 moutb(VGA_GRAPH_INDEX, index); in mmioWriteGr()
387 moutb(VGA_GRAPH_DATA, value); in mmioWriteGr()
393 moutb(VGA_GRAPH_INDEX, index); in mmioReadGr()
400 moutb(VGA_SEQ_INDEX, index); in mmioWriteSeq()
401 moutb(VGA_SEQ_DATA, value); in mmioWriteSeq()
407 moutb(VGA_SEQ_INDEX, index); in mmioReadSeq()
432 moutb(hwp->IOBase + VGA_FEATURE_W_OFFSET, value); in mmioWriteFCR()
444 moutb(VGA_ATTR_INDEX, index); in mmioWriteAttr()
445 moutb(VGA_ATTR_DATA_W, value); in mmioWriteAttr()
457 moutb(VGA_ATTR_INDEX, index); in mmioReadAttr()
464 moutb(VGA_MISC_OUT_W, value); in mmioWriteMiscOut()
477 moutb(VGA_ATTR_INDEX, 0x00); in mmioEnablePalette()
485 moutb(VGA_ATTR_INDEX, 0x20); in mmioDisablePalette()
492 moutb(VGA_DAC_MASK, value); in mmioWriteDacMask()
504 moutb(VGA_DAC_READ_ADDR, value); in mmioWriteDacReadAddr()
510 moutb(VGA_DAC_WRITE_ADDR, value); in mmioWriteDacWriteAddr()
516 moutb(VGA_DAC_DATA, value); in mmioWriteDacData()
534 moutb(VGA_ENABLE, value); in mmioWriteEnable()