config/i386/sse.md

3049   rtx tmp0, tmp1;
3053       tmp0 = gen_reg_rtx (V4DFmode);
3056       emit_insn (gen_avx_vec_concatv4df (tmp0, tmp1, operands[2]));
3057       emit_insn (gen_avx_cvtpd2ps256 (operands[0], tmp0));
3061       tmp0 = gen_reg_rtx (V4SFmode);
3064       emit_insn (gen_sse2_cvtpd2ps (tmp0, operands[1]));
3066       emit_insn (gen_sse_movlhps (operands[0], tmp0, tmp1));
3094   rtx tmp0, tmp1;
3098       tmp0 = gen_reg_rtx (V4DFmode);
3101       emit_insn (gen_avx_vec_concatv4df (tmp0, tmp1, operands[2]));
3102       emit_insn (gen_fix_truncv4dfv4si2 (operands[0], tmp0));
3106       tmp0 = gen_reg_rtx (V4SImode);
3109       emit_insn (gen_sse2_cvttpd2dq (tmp0, operands[1]));
3113 				    gen_lowpart (V2DImode, tmp0),
3175   rtx tmp0, tmp1;
3179       tmp0 = gen_reg_rtx (V4DFmode);
3182       emit_insn (gen_avx_vec_concatv4df (tmp0, tmp1, operands[2]));
3183       emit_insn (gen_avx_cvtpd2dq256 (operands[0], tmp0));
3187       tmp0 = gen_reg_rtx (V4SImode);
3190       emit_insn (gen_sse2_cvtpd2dq (tmp0, operands[1]));
3194 				    gen_lowpart (V2DImode, tmp0),
9920   rtx tmp0, tmp1;
9927       tmp0 = gen_reg_rtx (V4DFmode);
9930       emit_insn (gen_avx_vec_concatv4df (tmp0, tmp1, operands[2]));
9931       emit_insn (gen_avx_roundpd256 (tmp2, tmp0, operands[3]));
9936       tmp0 = gen_reg_rtx (<MODE>mode);
9940        (gen_<sse4_1>_round<ssemodesuffix><avxsizesuffix> (tmp0, operands[1],
9946        (gen_vec_pack_sfix_trunc_<mode> (operands[0], tmp0, tmp1));
10026   rtx tmp0, tmp1;
10033       tmp0 = gen_reg_rtx (V4DFmode);
10036       emit_insn (gen_avx_vec_concatv4df (tmp0, tmp1, operands[2]));
10037       emit_insn (gen_roundv4df2 (tmp2, tmp0));
10042       tmp0 = gen_reg_rtx (<MODE>mode);
10045       emit_insn (gen_round<mode>2 (tmp0, operands[1]));
10049        (gen_vec_pack_sfix_trunc_<mode> (operands[0], tmp0, tmp1));