Lines Matching refs:v3

311         U32 v3 = seed + 0;  in XXH32_endian_align()  local
317 v3 = XXH32_round(v3, XXH_get32bits(p)); p+=4; in XXH32_endian_align()
321 h32 = XXH_rotl32(v1, 1) + XXH_rotl32(v2, 7) + XXH_rotl32(v3, 12) + XXH_rotl32(v4, 18); in XXH32_endian_align()
411 U64 v3 = seed + 0; in XXH64_endian_align() local
417 v3 = XXH64_round(v3, XXH_get64bits(p)); p+=8; in XXH64_endian_align()
421 h64 = XXH_rotl64(v1, 1) + XXH_rotl64(v2, 7) + XXH_rotl64(v3, 12) + XXH_rotl64(v4, 18); in XXH64_endian_align()
424 h64 = XXH64_mergeRound(h64, v3); in XXH64_endian_align()
522 state.v3 = seed + 0; in XXH32_reset()
535 state.v3 = seed + 0; in XXH64_reset()
565 state->v3 = XXH32_round(state->v3, XXH_readLE32(p32, endian)); p32++; in XXH32_update_endian()
576 U32 v3 = state->v3; in XXH32_update_endian() local
582 v3 = XXH32_round(v3, XXH_readLE32(p, endian)); p+=4; in XXH32_update_endian()
588 state->v3 = v3; in XXH32_update_endian()
619 …h32 = XXH_rotl32(state->v1, 1) + XXH_rotl32(state->v2, 7) + XXH_rotl32(state->v3, 12) + XXH_rotl32… in XXH32_digest_endian()
621 h32 = state->v3 /* == seed */ + PRIME32_5; in XXH32_digest_endian()
685 state->v3 = XXH64_round(state->v3, XXH_readLE64(state->mem64+2, endian)); in XXH64_update_endian()
695 U64 v3 = state->v3; in XXH64_update_endian() local
701 v3 = XXH64_round(v3, XXH_readLE64(p, endian)); p+=8; in XXH64_update_endian()
707 state->v3 = v3; in XXH64_update_endian()
740 U64 const v3 = state->v3; in XXH64_digest_endian() local
743 h64 = XXH_rotl64(v1, 1) + XXH_rotl64(v2, 7) + XXH_rotl64(v3, 12) + XXH_rotl64(v4, 18); in XXH64_digest_endian()
746 h64 = XXH64_mergeRound(h64, v3); in XXH64_digest_endian()
749 h64 = state->v3 + PRIME64_5; in XXH64_digest_endian()