bus/firewire/fwohci.c

642 	sc->arrq.ndesc = 1;
643 	sc->arrs.ndesc = 1;
644 	sc->atrq.ndesc = 8;	/* equal to maximum of mbuf chains */
645 	sc->atrs.ndesc = 2;
1203 			/*nsegments*/ dbch->ndesc > 3 ? dbch->ndesc - 2 : 1,
1220 #define DB_SIZE(x) (sizeof(struct fwohcidb) * (x)->ndesc)
1318 	z = dbch->ndesc;
1373 	z = dbch->ndesc;
1486 		dbch->ndesc = 3;
1495 	ldesc = dbch->ndesc - 1;
1513 				(chunk->start))->bus_addr | dbch->ndesc;
1515 			FWOHCI_DMA_SET(db[0].db.desc.depend, dbch->ndesc);
1516 			FWOHCI_DMA_SET(db[ldesc].db.desc.depend, dbch->ndesc);
1543 		((struct fwohcidb_tr *)(first->start))->bus_addr | dbch->ndesc);
1607 		dbch->ndesc = 2;
1622 	ldesc = dbch->ndesc - 1;
1645 			FWOHCI_DMA_SET(db[ldesc].db.desc.depend, dbch->ndesc);
1671 							| dbch->ndesc);
2096 	ldesc = sc->it[dmach].ndesc - 1;
2142 	ldesc = sc->ir[dmach].ndesc - 1;
2286 		for(jdb = 0 ; jdb < dbch->ndesc ; jdb ++ ){
2308 		print_db(pp, prev, ch, dbch->ndesc);
2311 		print_db(cp, curr, ch, dbch->ndesc);
2314 		print_db(np, next, ch, dbch->ndesc);
2475 			= db[dbch->ndesc - 1].db.desc.depend
2476 			= STAILQ_NEXT(db_tr, link)->bus_addr | dbch->ndesc;
2478 		FWOHCI_DMA_SET(db[0].db.desc.depend, dbch->ndesc);
2479 		FWOHCI_DMA_SET(db[dbch->ndesc - 1].db.desc.depend, dbch->ndesc);
2486 	FWOHCI_DMA_CLEAR(db[dbch->ndesc - 1].db.desc.depend, 0xf);
2488 	db[dbch->ndesc - 1].db.desc.control |= OHCI_INTERRUPT_ALWAYS;