449 			SMU75_Discrete_DpmTable *table)  in vegam_populate_smc_mvdd_table()  argument
459 			table->SmioTable2.Pattern[level].Voltage = PP_HOST_TO_SMC_US(  in vegam_populate_smc_mvdd_table()
462 			table->SmioTable2.Pattern[level].Smio =  in vegam_populate_smc_mvdd_table()
464 			table->Smio[level] |=  in vegam_populate_smc_mvdd_table()
467 		table->SmioMask2 = data->mvdd_voltage_table.mask_low;  in vegam_populate_smc_mvdd_table()
469 		table->MvddLevelCount = (uint32_t) PP_HOST_TO_SMC_UL(count);  in vegam_populate_smc_mvdd_table()
476 					struct SMU75_Discrete_DpmTable *table)  in vegam_populate_smc_vddci_table()  argument
487 			table->SmioTable1.Pattern[level].Voltage = PP_HOST_TO_SMC_US(  in vegam_populate_smc_vddci_table()
489 			table->SmioTable1.Pattern[level].Smio = (uint8_t) level;  in vegam_populate_smc_vddci_table()
491 			table->Smio[level] |= data->vddci_voltage_table.entries[level].smio_low;  in vegam_populate_smc_vddci_table()
495 	table->SmioMask1 = data->vddci_voltage_table.mask_low;  in vegam_populate_smc_vddci_table()
501 		struct SMU75_Discrete_DpmTable *table)  in vegam_populate_cac_table()  argument
518 		table->BapmVddcVidLoSidd[count] =  in vegam_populate_cac_table()
520 		table->BapmVddcVidHiSidd[count] =  in vegam_populate_cac_table()
522 		table->BapmVddcVidHiSidd2[count] =  in vegam_populate_cac_table()
530 		struct SMU75_Discrete_DpmTable *table)  in vegam_populate_smc_voltage_tables()  argument
532 	vegam_populate_smc_vddci_table(hwmgr, table);  in vegam_populate_smc_voltage_tables()
533 	vegam_populate_smc_mvdd_table(hwmgr, table);  in vegam_populate_smc_voltage_tables()
534 	vegam_populate_cac_table(hwmgr, table);  in vegam_populate_smc_voltage_tables()
563 		struct SMU75_Discrete_DpmTable *table)  in vegam_populate_ulv_state()  argument
565 	return vegam_populate_ulv_level(hwmgr, &table->Ulv);  in vegam_populate_ulv_state()
569 		struct SMU75_Discrete_DpmTable *table)  in vegam_populate_smc_link_level()  argument
580 		table->LinkLevel[i].PcieGenSpeed  =  in vegam_populate_smc_link_level()
582 		table->LinkLevel[i].PcieLaneCount = (uint8_t)encode_pcie_lane_width(  in vegam_populate_smc_link_level()
584 		table->LinkLevel[i].EnabledForActivity = 1;  in vegam_populate_smc_link_level()
585 		table->LinkLevel[i].SPC = (uint8_t)(data->pcie_spc_cap & 0xff);  in vegam_populate_smc_link_level()
586 		table->LinkLevel[i].DownThreshold = PP_HOST_TO_SMC_UL(5);  in vegam_populate_smc_link_level()
587 		table->LinkLevel[i].UpThreshold = PP_HOST_TO_SMC_UL(30);  in vegam_populate_smc_link_level()
670 				   SMU75_Discrete_DpmTable  *table)  in vegam_get_sclk_range_table()  argument
681 			table->SclkFcwRangeTable[i].vco_setting =  in vegam_get_sclk_range_table()
683 			table->SclkFcwRangeTable[i].postdiv =  in vegam_get_sclk_range_table()
685 			table->SclkFcwRangeTable[i].fcw_pcc =  in vegam_get_sclk_range_table()
688 			table->SclkFcwRangeTable[i].fcw_trans_upper =  in vegam_get_sclk_range_table()
690 			table->SclkFcwRangeTable[i].fcw_trans_lower =  in vegam_get_sclk_range_table()
693 			CONVERT_FROM_HOST_TO_SMC_US(table->SclkFcwRangeTable[i].fcw_pcc);  in vegam_get_sclk_range_table()
694 			CONVERT_FROM_HOST_TO_SMC_US(table->SclkFcwRangeTable[i].fcw_trans_upper);  in vegam_get_sclk_range_table()
695 			CONVERT_FROM_HOST_TO_SMC_US(table->SclkFcwRangeTable[i].fcw_trans_lower);  in vegam_get_sclk_range_table()
706 		table->SclkFcwRangeTable[i].vco_setting = Range_Table[i].vco_setting;  in vegam_get_sclk_range_table()
707 		table->SclkFcwRangeTable[i].postdiv = Range_Table[i].postdiv;  in vegam_get_sclk_range_table()
708 		table->SclkFcwRangeTable[i].fcw_pcc = Range_Table[i].fcw_pcc;  in vegam_get_sclk_range_table()
710 		table->SclkFcwRangeTable[i].fcw_trans_upper = Range_Table[i].fcw_trans_upper;  in vegam_get_sclk_range_table()
711 		table->SclkFcwRangeTable[i].fcw_trans_lower = Range_Table[i].fcw_trans_lower;  in vegam_get_sclk_range_table()
713 		CONVERT_FROM_HOST_TO_SMC_US(table->SclkFcwRangeTable[i].fcw_pcc);  in vegam_get_sclk_range_table()
714 		CONVERT_FROM_HOST_TO_SMC_US(table->SclkFcwRangeTable[i].fcw_trans_upper);  in vegam_get_sclk_range_table()
715 		CONVERT_FROM_HOST_TO_SMC_US(table->SclkFcwRangeTable[i].fcw_trans_lower);  in vegam_get_sclk_range_table()
723 	const SMU75_Discrete_DpmTable *table = &(smu_data->smc_state_table);  in vegam_calculate_sclk_params()  local
760 			((clock << table->SclkFcwRangeTable[sclk_setting->PllRange].postdiv) /  in vegam_calculate_sclk_params()
762 	temp = clock << table->SclkFcwRangeTable[sclk_setting->PllRange].postdiv;  in vegam_calculate_sclk_params()
770 			((pcc_target_freq << table->SclkFcwRangeTable[sclk_setting->PllRange].postdiv) /  in vegam_calculate_sclk_params()
779 				((ss_target_freq << table->SclkFcwRangeTable[sclk_setting->PllRange].postdiv) /  in vegam_calculate_sclk_params()
781 		temp = ss_target_freq << table->SclkFcwRangeTable[sclk_setting->PllRange].postdiv;  in vegam_calculate_sclk_params()
1110 		SMU75_Discrete_DpmTable *table)  in vegam_populate_smc_acpi_level()  argument
1121 	table->ACPILevel.Flags &= ~PPSMC_SWSTATE_FLAG_DC;  in vegam_populate_smc_acpi_level()
1129 			&table->ACPILevel.MinVoltage, &mvdd);  in vegam_populate_smc_acpi_level()
1136 			&(table->ACPILevel.SclkSetting));  in vegam_populate_smc_acpi_level()
1141 	table->ACPILevel.DeepSleepDivId = 0;  in vegam_populate_smc_acpi_level()
1142 	table->ACPILevel.CcPwrDynRm = 0;  in vegam_populate_smc_acpi_level()
1143 	table->ACPILevel.CcPwrDynRm1 = 0;  in vegam_populate_smc_acpi_level()
1145 	CONVERT_FROM_HOST_TO_SMC_UL(table->ACPILevel.Flags);  in vegam_populate_smc_acpi_level()
1146 	CONVERT_FROM_HOST_TO_SMC_UL(table->ACPILevel.MinVoltage);  in vegam_populate_smc_acpi_level()
1147 	CONVERT_FROM_HOST_TO_SMC_UL(table->ACPILevel.CcPwrDynRm);  in vegam_populate_smc_acpi_level()
1148 	CONVERT_FROM_HOST_TO_SMC_UL(table->ACPILevel.CcPwrDynRm1);  in vegam_populate_smc_acpi_level()
1150 	CONVERT_FROM_HOST_TO_SMC_UL(table->ACPILevel.SclkSetting.SclkFrequency);  in vegam_populate_smc_acpi_level()
1151 	CONVERT_FROM_HOST_TO_SMC_US(table->ACPILevel.SclkSetting.Fcw_int);  in vegam_populate_smc_acpi_level()
1152 	CONVERT_FROM_HOST_TO_SMC_US(table->ACPILevel.SclkSetting.Fcw_frac);  in vegam_populate_smc_acpi_level()
1153 	CONVERT_FROM_HOST_TO_SMC_US(table->ACPILevel.SclkSetting.Pcc_fcw_int);  in vegam_populate_smc_acpi_level()
1154 	CONVERT_FROM_HOST_TO_SMC_US(table->ACPILevel.SclkSetting.Sclk_slew_rate);  in vegam_populate_smc_acpi_level()
1155 	CONVERT_FROM_HOST_TO_SMC_US(table->ACPILevel.SclkSetting.Pcc_up_slew_rate);  in vegam_populate_smc_acpi_level()
1156 	CONVERT_FROM_HOST_TO_SMC_US(table->ACPILevel.SclkSetting.Pcc_down_slew_rate);  in vegam_populate_smc_acpi_level()
1157 	CONVERT_FROM_HOST_TO_SMC_US(table->ACPILevel.SclkSetting.Fcw1_int);  in vegam_populate_smc_acpi_level()
1158 	CONVERT_FROM_HOST_TO_SMC_US(table->ACPILevel.SclkSetting.Fcw1_frac);  in vegam_populate_smc_acpi_level()
1159 	CONVERT_FROM_HOST_TO_SMC_US(table->ACPILevel.SclkSetting.Sclk_ss_slew_rate);  in vegam_populate_smc_acpi_level()
1163 	table->MemoryACPILevel.MclkFrequency = data->vbios_boot_state.mclk_bootup_value;  in vegam_populate_smc_acpi_level()
1166 			table->MemoryACPILevel.MclkFrequency,  in vegam_populate_smc_acpi_level()
1167 			&table->MemoryACPILevel.MinVoltage, &mvdd);  in vegam_populate_smc_acpi_level()
1185 		table->MemoryACPILevel.MinMvdd = PP_HOST_TO_SMC_UL(vol_level.Voltage);  in vegam_populate_smc_acpi_level()
1187 		table->MemoryACPILevel.MinMvdd = 0;  in vegam_populate_smc_acpi_level()
1189 	table->MemoryACPILevel.StutterEnable = false;  in vegam_populate_smc_acpi_level()
1191 	table->MemoryACPILevel.EnabledForThrottle = 0;  in vegam_populate_smc_acpi_level()
1192 	table->MemoryACPILevel.EnabledForActivity = 0;  in vegam_populate_smc_acpi_level()
1193 	table->MemoryACPILevel.UpHyst = 0;  in vegam_populate_smc_acpi_level()
1194 	table->MemoryACPILevel.DownHyst = 100;  in vegam_populate_smc_acpi_level()
1195 	table->MemoryACPILevel.VoltageDownHyst = 0;  in vegam_populate_smc_acpi_level()
1196 	table->MemoryACPILevel.ActivityLevel =  in vegam_populate_smc_acpi_level()
1199 	CONVERT_FROM_HOST_TO_SMC_UL(table->MemoryACPILevel.MclkFrequency);  in vegam_populate_smc_acpi_level()
1200 	CONVERT_FROM_HOST_TO_SMC_UL(table->MemoryACPILevel.MinVoltage);  in vegam_populate_smc_acpi_level()
1206 		SMU75_Discrete_DpmTable *table)  in vegam_populate_smc_vce_level()  argument
1218 	table->VceLevelCount = (uint8_t)(mm_table->count);  in vegam_populate_smc_vce_level()
1219 	table->VceBootLevel = 0;  in vegam_populate_smc_vce_level()
1221 	for (count = 0; count < table->VceLevelCount; count++) {  in vegam_populate_smc_vce_level()
1222 		table->VceLevel[count].Frequency = mm_table->entries[count].eclk;  in vegam_populate_smc_vce_level()
1223 		table->VceLevel[count].MinVoltage = 0;  in vegam_populate_smc_vce_level()
1224 		table->VceLevel[count].MinVoltage |=  in vegam_populate_smc_vce_level()
1236 		table->VceLevel[count].MinVoltage |=  in vegam_populate_smc_vce_level()
1238 		table->VceLevel[count].MinVoltage |= 1 << PHASES_SHIFT;  in vegam_populate_smc_vce_level()
1242 				table->VceLevel[count].Frequency, &dividers);  in vegam_populate_smc_vce_level()
1247 		table->VceLevel[count].Divider = (uint8_t)dividers.pll_post_divider;  in vegam_populate_smc_vce_level()
1249 		CONVERT_FROM_HOST_TO_SMC_UL(table->VceLevel[count].Frequency);  in vegam_populate_smc_vce_level()
1250 		CONVERT_FROM_HOST_TO_SMC_UL(table->VceLevel[count].MinVoltage);  in vegam_populate_smc_vce_level()
1319 		struct SMU75_Discrete_DpmTable *table)  in vegam_populate_smc_uvd_level()  argument
1331 	table->UvdLevelCount = (uint8_t)(mm_table->count);  in vegam_populate_smc_uvd_level()
1332 	table->UvdBootLevel = 0;  in vegam_populate_smc_uvd_level()
1334 	for (count = 0; count < table->UvdLevelCount; count++) {  in vegam_populate_smc_uvd_level()
1335 		table->UvdLevel[count].MinVoltage = 0;  in vegam_populate_smc_uvd_level()
1336 		table->UvdLevel[count].VclkFrequency = mm_table->entries[count].vclk;  in vegam_populate_smc_uvd_level()
1337 		table->UvdLevel[count].DclkFrequency = mm_table->entries[count].dclk;  in vegam_populate_smc_uvd_level()
1338 		table->UvdLevel[count].MinVoltage |=  in vegam_populate_smc_uvd_level()
1349 		table->UvdLevel[count].MinVoltage |= (vddci * VOLTAGE_SCALE) << VDDCI_SHIFT;  in vegam_populate_smc_uvd_level()
1350 		table->UvdLevel[count].MinVoltage |= 1 << PHASES_SHIFT;  in vegam_populate_smc_uvd_level()
1354 				table->UvdLevel[count].VclkFrequency, &dividers);  in vegam_populate_smc_uvd_level()
1358 		table->UvdLevel[count].VclkDivider = (uint8_t)dividers.pll_post_divider;  in vegam_populate_smc_uvd_level()
1361 				table->UvdLevel[count].DclkFrequency, &dividers);  in vegam_populate_smc_uvd_level()
1365 		table->UvdLevel[count].DclkDivider = (uint8_t)dividers.pll_post_divider;  in vegam_populate_smc_uvd_level()
1367 		CONVERT_FROM_HOST_TO_SMC_UL(table->UvdLevel[count].VclkFrequency);  in vegam_populate_smc_uvd_level()
1368 		CONVERT_FROM_HOST_TO_SMC_UL(table->UvdLevel[count].DclkFrequency);  in vegam_populate_smc_uvd_level()
1369 		CONVERT_FROM_HOST_TO_SMC_UL(table->UvdLevel[count].MinVoltage);  in vegam_populate_smc_uvd_level()
1376 		struct SMU75_Discrete_DpmTable *table)  in vegam_populate_smc_boot_level()  argument
1381 	table->GraphicsBootLevel = 0;  in vegam_populate_smc_boot_level()
1382 	table->MemoryBootLevel = 0;  in vegam_populate_smc_boot_level()
1387 			(uint32_t *)&(table->GraphicsBootLevel));  in vegam_populate_smc_boot_level()
1391 			(uint32_t *)&(table->MemoryBootLevel));  in vegam_populate_smc_boot_level()
1393 	table->BootVddc  = data->vbios_boot_state.vddc_bootup_value *  in vegam_populate_smc_boot_level()
1395 	table->BootVddci = data->vbios_boot_state.vddci_bootup_value *  in vegam_populate_smc_boot_level()
1397 	table->BootMVdd  = data->vbios_boot_state.mvdd_bootup_value *  in vegam_populate_smc_boot_level()
1400 	CONVERT_FROM_HOST_TO_SMC_US(table->BootVddc);  in vegam_populate_smc_boot_level()
1401 	CONVERT_FROM_HOST_TO_SMC_US(table->BootVddci);  in vegam_populate_smc_boot_level()
1402 	CONVERT_FROM_HOST_TO_SMC_US(table->BootMVdd);  in vegam_populate_smc_boot_level()
1449 	SMU75_Discrete_DpmTable  *table = &(smu_data->smc_state_table);  in vegam_populate_bapm_parameters_in_dpm_table()  local
1459 	table->DefaultTdp = PP_HOST_TO_SMC_US((uint16_t)(cac_dtp_table->usTDP * 128));  in vegam_populate_bapm_parameters_in_dpm_table()
1460 	table->TargetTdp  = PP_HOST_TO_SMC_US((uint16_t)(cac_dtp_table->usTDP * 128));  in vegam_populate_bapm_parameters_in_dpm_table()
1466 	table->TemperatureLimitEdge = PP_HOST_TO_SMC_US(  in vegam_populate_bapm_parameters_in_dpm_table()
1468 	table->TemperatureLimitHotspot = PP_HOST_TO_SMC_US(  in vegam_populate_bapm_parameters_in_dpm_table()
1470 	table->FanGainEdge = PP_HOST_TO_SMC_US(  in vegam_populate_bapm_parameters_in_dpm_table()
1472 	table->FanGainHotspot = PP_HOST_TO_SMC_US(  in vegam_populate_bapm_parameters_in_dpm_table()
1481 				table->BAPMTI_R[i][j][k] = PP_HOST_TO_SMC_US(*pdef1);  in vegam_populate_bapm_parameters_in_dpm_table()
1482 				table->BAPMTI_RC[i][j][k] = PP_HOST_TO_SMC_US(*pdef2);  in vegam_populate_bapm_parameters_in_dpm_table()
1575 	SMU75_Discrete_DpmTable  *table = &(smu_data->smc_state_table);  in vegam_populate_avfs_parameters()  local
1593 		table->BTCGB_VDROOP_TABLE[0].a0 =  in vegam_populate_avfs_parameters()
1595 		table->BTCGB_VDROOP_TABLE[0].a1 =  in vegam_populate_avfs_parameters()
1597 		table->BTCGB_VDROOP_TABLE[0].a2 =  in vegam_populate_avfs_parameters()
1599 		table->BTCGB_VDROOP_TABLE[1].a0 =  in vegam_populate_avfs_parameters()
1601 		table->BTCGB_VDROOP_TABLE[1].a1 =  in vegam_populate_avfs_parameters()
1603 		table->BTCGB_VDROOP_TABLE[1].a2 =  in vegam_populate_avfs_parameters()
1605 		table->AVFSGB_FUSE_TABLE[0].m1 =  in vegam_populate_avfs_parameters()
1607 		table->AVFSGB_FUSE_TABLE[0].m2 =  in vegam_populate_avfs_parameters()
1609 		table->AVFSGB_FUSE_TABLE[0].b =  in vegam_populate_avfs_parameters()
1611 		table->AVFSGB_FUSE_TABLE[0].m1_shift = 24;  in vegam_populate_avfs_parameters()
1612 		table->AVFSGB_FUSE_TABLE[0].m2_shift = 12;  in vegam_populate_avfs_parameters()
1613 		table->AVFSGB_FUSE_TABLE[1].m1 =  in vegam_populate_avfs_parameters()
1615 		table->AVFSGB_FUSE_TABLE[1].m2 =  in vegam_populate_avfs_parameters()
1617 		table->AVFSGB_FUSE_TABLE[1].b =  in vegam_populate_avfs_parameters()
1619 		table->AVFSGB_FUSE_TABLE[1].m1_shift = 24;  in vegam_populate_avfs_parameters()
1620 		table->AVFSGB_FUSE_TABLE[1].m2_shift = 12;  in vegam_populate_avfs_parameters()
1621 		table->MaxVoltage = PP_HOST_TO_SMC_US(avfs_params.usMaxVoltage_0_25mv);  in vegam_populate_avfs_parameters()
1677 		struct SMU75_Discrete_DpmTable *table)  in vegam_populate_vr_config()  argument
1685 	table->VRConfig |= (config << VRCONF_VDDGFX_SHIFT);  in vegam_populate_vr_config()
1690 		table->VRConfig |= config;  in vegam_populate_vr_config()
1699 		table->VRConfig |= (config << VRCONF_VDDCI_SHIFT);  in vegam_populate_vr_config()
1702 		table->VRConfig |= (config << VRCONF_VDDCI_SHIFT);  in vegam_populate_vr_config()
1705 		table->VRConfig |= (config << VRCONF_VDDCI_SHIFT);  in vegam_populate_vr_config()
1711 			table->VRConfig |= (config << VRCONF_MVDD_SHIFT);  in vegam_populate_vr_config()
1721 			table->VRConfig = (config << VRCONF_MVDD_SHIFT);  in vegam_populate_vr_config()
1725 		table->VRConfig = (config << VRCONF_MVDD_SHIFT);  in vegam_populate_vr_config()
1733 		table->VRConfig |= (config << VRCONF_MVDD_SHIFT);  in vegam_populate_vr_config()
1933 	struct SMU75_Discrete_DpmTable *table = &(smu_data->smc_state_table);  in vegam_init_smc_table()  local
1946 		vegam_populate_smc_voltage_tables(hwmgr, table);  in vegam_init_smc_table()
1948 	table->SystemFlags = 0;  in vegam_init_smc_table()
1951 		table->SystemFlags |= PPSMC_SYSTEMFLAG_GPIO_DC;  in vegam_init_smc_table()
1955 		table->SystemFlags |= PPSMC_SYSTEMFLAG_STEPVDDC;  in vegam_init_smc_table()
1958 		table->SystemFlags |= PPSMC_SYSTEMFLAG_GDDR5;  in vegam_init_smc_table()
1961 		result = vegam_populate_ulv_state(hwmgr, table);  in vegam_init_smc_table()
1968 	result = vegam_populate_smc_link_level(hwmgr, table);  in vegam_init_smc_table()
1980 	result = vegam_populate_smc_acpi_level(hwmgr, table);  in vegam_init_smc_table()
1984 	result = vegam_populate_smc_vce_level(hwmgr, table);  in vegam_init_smc_table()
1996 	result = vegam_populate_smc_uvd_level(hwmgr, table);  in vegam_init_smc_table()
2000 	result = vegam_populate_smc_boot_level(hwmgr, table);  in vegam_init_smc_table()
2024 	table->CurrSclkPllRange = 0xff;  in vegam_init_smc_table()
2025 	table->GraphicsVoltageChangeEnable  = 1;  in vegam_init_smc_table()
2026 	table->GraphicsThermThrottleEnable  = 1;  in vegam_init_smc_table()
2027 	table->GraphicsInterval = 1;  in vegam_init_smc_table()
2028 	table->VoltageInterval  = 1;  in vegam_init_smc_table()
2029 	table->ThermalInterval  = 1;  in vegam_init_smc_table()
2030 	table->TemperatureLimitHigh =  in vegam_init_smc_table()
2033 	table->TemperatureLimitLow  =  in vegam_init_smc_table()
2036 	table->MemoryVoltageChangeEnable = 1;  in vegam_init_smc_table()
2037 	table->MemoryInterval = 1;  in vegam_init_smc_table()
2038 	table->VoltageResponseTime = 0;  in vegam_init_smc_table()
2039 	table->PhaseResponseTime = 0;  in vegam_init_smc_table()
2040 	table->MemoryThermThrottleEnable = 1;  in vegam_init_smc_table()
2045 	table->PCIeBootLinkLevel =  in vegam_init_smc_table()
2047 	table->PCIeGenInterval = 1;  in vegam_init_smc_table()
2048 	table->VRConfig = 0;  in vegam_init_smc_table()
2050 	result = vegam_populate_vr_config(hwmgr, table);  in vegam_init_smc_table()
2054 	table->ThermGpio = 17;  in vegam_init_smc_table()
2055 	table->SclkStepSize = 0x4000;  in vegam_init_smc_table()
2059 		table->VRHotGpio = gpio_pin.uc_gpio_pin_bit_shift;  in vegam_init_smc_table()
2061 			table->VRHotLevel =  in vegam_init_smc_table()
2064 		table->VRHotGpio = SMU7_UNUSED_GPIO_PIN;  in vegam_init_smc_table()
2071 		table->AcDcGpio = gpio_pin.uc_gpio_pin_bit_shift;  in vegam_init_smc_table()
2078 		table->AcDcGpio = SMU7_UNUSED_GPIO_PIN;  in vegam_init_smc_table()
2086 		table->ThermOutGpio = gpio_pin.uc_gpio_pin_bit_shift;  in vegam_init_smc_table()
2093 		table->ThermOutPolarity =  in vegam_init_smc_table()
2096 		table->ThermOutMode = SMU7_THERM_OUT_MODE_THERM_ONLY;  in vegam_init_smc_table()
2103 			table->ThermOutMode = SMU7_THERM_OUT_MODE_THERM_VRHOT;  in vegam_init_smc_table()
2105 		table->ThermOutGpio = 17;  in vegam_init_smc_table()
2106 		table->ThermOutPolarity = 1;  in vegam_init_smc_table()
2107 		table->ThermOutMode = SMU7_THERM_OUT_MODE_DISABLE;  in vegam_init_smc_table()
2119 			table->Ulv.BifSclkDfs =  in vegam_init_smc_table()
2122 			table->LinkLevel[i - 1].BifSclkDfs =  in vegam_init_smc_table()
2127 		table->Smio[i] = PP_HOST_TO_SMC_UL(table->Smio[i]);  in vegam_init_smc_table()
2129 	CONVERT_FROM_HOST_TO_SMC_UL(table->SystemFlags);  in vegam_init_smc_table()
2130 	CONVERT_FROM_HOST_TO_SMC_UL(table->VRConfig);  in vegam_init_smc_table()
2131 	CONVERT_FROM_HOST_TO_SMC_UL(table->SmioMask1);  in vegam_init_smc_table()
2132 	CONVERT_FROM_HOST_TO_SMC_UL(table->SmioMask2);  in vegam_init_smc_table()
2133 	CONVERT_FROM_HOST_TO_SMC_UL(table->SclkStepSize);  in vegam_init_smc_table()
2134 	CONVERT_FROM_HOST_TO_SMC_UL(table->CurrSclkPllRange);  in vegam_init_smc_table()
2135 	CONVERT_FROM_HOST_TO_SMC_US(table->TemperatureLimitHigh);  in vegam_init_smc_table()
2136 	CONVERT_FROM_HOST_TO_SMC_US(table->TemperatureLimitLow);  in vegam_init_smc_table()
2137 	CONVERT_FROM_HOST_TO_SMC_US(table->VoltageResponseTime);  in vegam_init_smc_table()
2138 	CONVERT_FROM_HOST_TO_SMC_US(table->PhaseResponseTime);  in vegam_init_smc_table()
2144 			(uint8_t *)&(table->SystemFlags),  in vegam_init_smc_table()