416 	int ddc_line = 0;  in combios_setup_i2c_bus()  local
443 		ddc_line = 0;  in combios_setup_i2c_bus()
446 		ddc_line = RADEON_GPIO_DVI_DDC;  in combios_setup_i2c_bus()
449 		ddc_line = RADEON_GPIO_VGA_DDC;  in combios_setup_i2c_bus()
452 		ddc_line = RADEON_GPIOPAD_MASK;  in combios_setup_i2c_bus()
455 		ddc_line = RADEON_MDGPIO_MASK;  in combios_setup_i2c_bus()
461 			ddc_line = RADEON_GPIOPAD_MASK;  in combios_setup_i2c_bus()
464 			ddc_line = RADEON_GPIO_DVI_DDC;  in combios_setup_i2c_bus()
467 			ddc_line = RADEON_GPIO_MONID;  in combios_setup_i2c_bus()
473 			ddc_line = RADEON_GPIO_DVI_DDC;  in combios_setup_i2c_bus()
478 			ddc_line = RADEON_GPIO_MONID;  in combios_setup_i2c_bus()
480 			ddc_line = RADEON_GPIO_MONID;  in combios_setup_i2c_bus()
483 			ddc_line = RADEON_GPIO_CRT2_DDC;  in combios_setup_i2c_bus()
487 	if (ddc_line == RADEON_GPIOPAD_MASK) {  in combios_setup_i2c_bus()
496 	} else if (ddc_line == RADEON_MDGPIO_MASK) {  in combios_setup_i2c_bus()
506 		i2c.mask_clk_reg = ddc_line;  in combios_setup_i2c_bus()
507 		i2c.mask_data_reg = ddc_line;  in combios_setup_i2c_bus()
508 		i2c.a_clk_reg = ddc_line;  in combios_setup_i2c_bus()
509 		i2c.a_data_reg = ddc_line;  in combios_setup_i2c_bus()
510 		i2c.en_clk_reg = ddc_line;  in combios_setup_i2c_bus()
511 		i2c.en_data_reg = ddc_line;  in combios_setup_i2c_bus()
512 		i2c.y_clk_reg = ddc_line;  in combios_setup_i2c_bus()
513 		i2c.y_data_reg = ddc_line;  in combios_setup_i2c_bus()
526 	} else if ((ddc_line == RADEON_GPIOPAD_MASK) ||  in combios_setup_i2c_bus()
527 		   (ddc_line == RADEON_MDGPIO_MASK)) {  in combios_setup_i2c_bus()
556 		switch (ddc_line) {  in combios_setup_i2c_bus()
566 		switch (ddc_line) {  in combios_setup_i2c_bus()
578 		switch (ddc_line) {  in combios_setup_i2c_bus()
591 		switch (ddc_line) {  in combios_setup_i2c_bus()
605 		switch (ddc_line) {  in combios_setup_i2c_bus()
630 	if (ddc_line)  in combios_setup_i2c_bus()