Lines Matching refs:tv_dac

240 	struct radeon_encoder_tv_dac *tv_dac = radeon_encoder->enc_priv;  in radeon_legacy_tv_get_std_mode()  local
253 if (tv_dac->tv_std == TV_STD_NTSC || in radeon_legacy_tv_get_std_mode()
254 tv_dac->tv_std == TV_STD_NTSC_J || in radeon_legacy_tv_get_std_mode()
255 tv_dac->tv_std == TV_STD_PAL_M) { in radeon_legacy_tv_get_std_mode()
388 struct radeon_encoder_tv_dac *tv_dac = radeon_encoder->enc_priv; in radeon_restore_tv_timing_tables() local
393 WREG32(RADEON_TV_UV_ADR, tv_dac->tv.tv_uv_adr); in radeon_restore_tv_timing_tables()
394 h_table = radeon_get_htiming_tables_addr(tv_dac->tv.tv_uv_adr); in radeon_restore_tv_timing_tables()
395 v_table = radeon_get_vtiming_tables_addr(tv_dac->tv.tv_uv_adr); in radeon_restore_tv_timing_tables()
398 tmp = ((uint32_t)tv_dac->tv.h_code_timing[i] << 14) | ((uint32_t)tv_dac->tv.h_code_timing[i+1]); in radeon_restore_tv_timing_tables()
400 if (tv_dac->tv.h_code_timing[i] == 0 || tv_dac->tv.h_code_timing[i + 1] == 0) in radeon_restore_tv_timing_tables()
404 tmp = ((uint32_t)tv_dac->tv.v_code_timing[i+1] << 14) | ((uint32_t)tv_dac->tv.v_code_timing[i]); in radeon_restore_tv_timing_tables()
406 if (tv_dac->tv.v_code_timing[i] == 0 || tv_dac->tv.v_code_timing[i + 1] == 0) in radeon_restore_tv_timing_tables()
415 struct radeon_encoder_tv_dac *tv_dac = radeon_encoder->enc_priv; in radeon_legacy_write_tv_restarts() local
416 WREG32(RADEON_TV_FRESTART, tv_dac->tv.frestart); in radeon_legacy_write_tv_restarts()
417 WREG32(RADEON_TV_HRESTART, tv_dac->tv.hrestart); in radeon_legacy_write_tv_restarts()
418 WREG32(RADEON_TV_VRESTART, tv_dac->tv.vrestart); in radeon_legacy_write_tv_restarts()
426 struct radeon_encoder_tv_dac *tv_dac = radeon_encoder->enc_priv; in radeon_legacy_tv_init_restarts() local
449 if (tv_dac->tv_std == TV_STD_NTSC || in radeon_legacy_tv_init_restarts()
450 tv_dac->tv_std == TV_STD_NTSC_J || in radeon_legacy_tv_init_restarts()
451 tv_dac->tv_std == TV_STD_PAL_M || in radeon_legacy_tv_init_restarts()
452 tv_dac->tv_std == TV_STD_PAL_60) in radeon_legacy_tv_init_restarts()
458 h_offset = tv_dac->h_pos * H_POS_UNIT; in radeon_legacy_tv_init_restarts()
460 if (tv_dac->tv_std == TV_STD_NTSC || in radeon_legacy_tv_init_restarts()
461 tv_dac->tv_std == TV_STD_NTSC_J || in radeon_legacy_tv_init_restarts()
462 tv_dac->tv_std == TV_STD_PAL_M) { in radeon_legacy_tv_init_restarts()
474 h_changed = (p1 != tv_dac->tv.h_code_timing[H_TABLE_POS1] || in radeon_legacy_tv_init_restarts()
475 p2 != tv_dac->tv.h_code_timing[H_TABLE_POS2]); in radeon_legacy_tv_init_restarts()
477 tv_dac->tv.h_code_timing[H_TABLE_POS1] = p1; in radeon_legacy_tv_init_restarts()
478 tv_dac->tv.h_code_timing[H_TABLE_POS2] = p2; in radeon_legacy_tv_init_restarts()
489 if (tv_dac->tv_std == TV_STD_NTSC || in radeon_legacy_tv_init_restarts()
490 tv_dac->tv_std == TV_STD_NTSC_J || in radeon_legacy_tv_init_restarts()
491 tv_dac->tv_std == TV_STD_PAL_M || in radeon_legacy_tv_init_restarts()
492 tv_dac->tv_std == TV_STD_PAL_60) in radeon_legacy_tv_init_restarts()
493 v_offset = ((int)(v_total * h_total) * 2 * tv_dac->v_pos) / (int)(NTSC_TV_LINES_PER_FRAME); in radeon_legacy_tv_init_restarts()
495 v_offset = ((int)(v_total * h_total) * 2 * tv_dac->v_pos) / (int)(PAL_TV_LINES_PER_FRAME); in radeon_legacy_tv_init_restarts()
500 const_ptr->def_restart, tv_dac->h_pos, tv_dac->v_pos, p1, p2, restart); in radeon_legacy_tv_init_restarts()
502 tv_dac->tv.hrestart = restart % h_total; in radeon_legacy_tv_init_restarts()
504 tv_dac->tv.vrestart = restart % v_total; in radeon_legacy_tv_init_restarts()
506 tv_dac->tv.frestart = restart % f_total; in radeon_legacy_tv_init_restarts()
509 (unsigned)tv_dac->tv.frestart, in radeon_legacy_tv_init_restarts()
510 (unsigned)tv_dac->tv.vrestart, in radeon_legacy_tv_init_restarts()
511 (unsigned)tv_dac->tv.hrestart); in radeon_legacy_tv_init_restarts()
514 if (tv_dac->tv_std == TV_STD_NTSC || in radeon_legacy_tv_init_restarts()
515 tv_dac->tv_std == TV_STD_NTSC_J || in radeon_legacy_tv_init_restarts()
516 tv_dac->tv_std == TV_STD_PAL_M) in radeon_legacy_tv_init_restarts()
518 (tv_dac->h_size * (int)(NTSC_TV_H_SIZE_UNIT) + (int)(NTSC_TV_ZERO_H_SIZE))); in radeon_legacy_tv_init_restarts()
521 (tv_dac->h_size * (int)(PAL_TV_H_SIZE_UNIT) + (int)(PAL_TV_ZERO_H_SIZE))); in radeon_legacy_tv_init_restarts()
523 tv_dac->tv.timing_cntl = (tv_dac->tv.timing_cntl & ~RADEON_H_INC_MASK) | in radeon_legacy_tv_init_restarts()
526 DRM_DEBUG_KMS("compute_restart: h_size = %d h_inc = %d\n", tv_dac->h_size, h_inc); in radeon_legacy_tv_init_restarts()
538 struct radeon_encoder_tv_dac *tv_dac = radeon_encoder->enc_priv; in radeon_legacy_tv_mode_set() local
567 if (tv_dac->tv_std == TV_STD_NTSC || in radeon_legacy_tv_mode_set()
568 tv_dac->tv_std == TV_STD_NTSC_J) in radeon_legacy_tv_mode_set()
577 if (tv_dac->tv_std == TV_STD_NTSC || in radeon_legacy_tv_mode_set()
578 tv_dac->tv_std == TV_STD_NTSC_J) { in radeon_legacy_tv_mode_set()
583 } else if (tv_dac->tv_std == TV_STD_SCART_PAL) { in radeon_legacy_tv_mode_set()
612 if (tv_dac->tv_std == TV_STD_NTSC || in radeon_legacy_tv_mode_set()
613 tv_dac->tv_std == TV_STD_NTSC_J || in radeon_legacy_tv_mode_set()
614 tv_dac->tv_std == TV_STD_PAL_M || in radeon_legacy_tv_mode_set()
615 tv_dac->tv_std == TV_STD_PAL_60) in radeon_legacy_tv_mode_set()
635 if (tv_dac->tv_std == TV_STD_NTSC || in radeon_legacy_tv_mode_set()
636 tv_dac->tv_std == TV_STD_NTSC_J || in radeon_legacy_tv_mode_set()
637 tv_dac->tv_std == TV_STD_PAL_M || in radeon_legacy_tv_mode_set()
638 tv_dac->tv_std == TV_STD_PAL_60) { in radeon_legacy_tv_mode_set()
672 tv_dac->tv.timing_cntl = tmp; in radeon_legacy_tv_mode_set()
674 if (tv_dac->tv_std == TV_STD_NTSC || in radeon_legacy_tv_mode_set()
675 tv_dac->tv_std == TV_STD_NTSC_J || in radeon_legacy_tv_mode_set()
676 tv_dac->tv_std == TV_STD_PAL_M || in radeon_legacy_tv_mode_set()
677 tv_dac->tv_std == TV_STD_PAL_60) in radeon_legacy_tv_mode_set()
678 tv_dac_cntl = tv_dac->ntsc_tvdac_adj; in radeon_legacy_tv_mode_set()
680 tv_dac_cntl = tv_dac->pal_tvdac_adj; in radeon_legacy_tv_mode_set()
684 if (tv_dac->tv_std == TV_STD_NTSC || in radeon_legacy_tv_mode_set()
685 tv_dac->tv_std == TV_STD_NTSC_J) in radeon_legacy_tv_mode_set()
690 if (tv_dac->tv_std == TV_STD_NTSC || in radeon_legacy_tv_mode_set()
691 tv_dac->tv_std == TV_STD_NTSC_J) { in radeon_legacy_tv_mode_set()
725 tv_dac->tv.tv_uv_adr = 0xc8; in radeon_legacy_tv_mode_set()
727 if (tv_dac->tv_std == TV_STD_NTSC || in radeon_legacy_tv_mode_set()
728 tv_dac->tv_std == TV_STD_NTSC_J || in radeon_legacy_tv_mode_set()
729 tv_dac->tv_std == TV_STD_PAL_M || in radeon_legacy_tv_mode_set()
730 tv_dac->tv_std == TV_STD_PAL_60) { in radeon_legacy_tv_mode_set()
741 if ((tv_dac->tv.h_code_timing[i] = hor_timing[i]) == 0) in radeon_legacy_tv_mode_set()
746 if ((tv_dac->tv.v_code_timing[i] = vert_timing[i]) == 0) in radeon_legacy_tv_mode_set()
816 WREG32(RADEON_TV_TIMING_CNTL, tv_dac->tv.timing_cntl); in radeon_legacy_tv_mode_set()