196 TargetRegisterInfo::getAllocatableClass(const TargetRegisterClass *RC) const {  in getAllocatableClass()
197   if (!RC || RC->isAllocatable())  in getAllocatableClass()
198     return RC;  in getAllocatableClass()
200   for (BitMaskClassIterator It(RC->getSubClassMask(), *this); It.isValid();  in getAllocatableClass()
220   for (const TargetRegisterClass* RC : regclasses()) {  in getMinimalPhysRegClass()  local
221     if ((VT == MVT::Other || isTypeLegalForClass(*RC, VT)) &&  in getMinimalPhysRegClass()
222         RC->contains(reg) && (!BestRC || BestRC->hasSubClass(RC)))  in getMinimalPhysRegClass()
223       BestRC = RC;  in getMinimalPhysRegClass()
238   for (const TargetRegisterClass *RC : regclasses()) {  in getMinimalPhysRegClassLLT()  local
239     if ((!Ty.isValid() || isTypeLegalForClass(*RC, Ty)) && RC->contains(reg) &&  in getMinimalPhysRegClassLLT()
240         (!BestRC || BestRC->hasSubClass(RC)))  in getMinimalPhysRegClassLLT()
241       BestRC = RC;  in getMinimalPhysRegClassLLT()
250                                    const TargetRegisterClass *RC, BitVector &R){  in getAllocatableSetForRC()  argument
251   assert(RC->isAllocatable() && "invalid for nonallocatable sets");  in getAllocatableSetForRC()
252   ArrayRef<MCPhysReg> Order = RC->getRawAllocationOrder(MF);  in getAllocatableSetForRC()
258                                           const TargetRegisterClass *RC) const {  in getAllocatableSet()
260   if (RC) {  in getAllocatableSet()
262     const TargetRegisterClass *SubClass = getAllocatableClass(RC);  in getAllocatableSet()
354       const TargetRegisterClass *RC =  in getCommonSuperRegClass()  local
356       if (!RC || getRegSizeInBits(*RC) < MinSize)  in getCommonSuperRegClass()
365       if (BestRC && getRegSizeInBits(*RC) >= getRegSizeInBits(*BestRC))  in getCommonSuperRegClass()
369       BestRC = RC;  in getCommonSuperRegClass()
505   const TargetRegisterClass *RC{};  in getRegSizeInBits()  local
510     RC = getMinimalPhysRegClass(Reg);  in getRegSizeInBits()
511     assert(RC && "Unable to deduce the register class");  in getRegSizeInBits()
512     return getRegSizeInBits(*RC);  in getRegSizeInBits()
519   RC = MRI.getRegClass(Reg);  in getRegSizeInBits()
520   assert(RC && "Unable to deduce the register class");  in getRegSizeInBits()
521   return getRegSizeInBits(*RC);  in getRegSizeInBits()
525     const MachineRegisterInfo &MRI, const TargetRegisterClass *RC,  in getCoveringSubRegIndexes()  argument
533     if (getSubClassWithSubReg(RC, Idx) != RC)  in getCoveringSubRegIndexes()