Lines Matching refs:src
47 def rr : I<opc, FormReg, (outs RC:$dst), (ins RC:$src),
48 !strconcat(OpcodeStr,"\t{$src, $dst|$dst, $src}"), []>,
51 def rm : I<opc, FormMem, (outs RC:$dst), (ins x86memop:$src),
52 !strconcat(OpcodeStr,"\t{$src, $dst|$dst, $src}"), []>,
79 def : Pat<(and GR64:$src, AndMask64:$mask),
80 (BEXTRI64ri GR64:$src, (BEXTRMaskXForm imm:$mask))>;
82 def : Pat<(and (loadi64 addr:$src), AndMask64:$mask),
83 (BEXTRI64mi addr:$src, (BEXTRMaskXForm imm:$mask))>;
92 def : Pat<(and GR32:$src, (add GR32:$src, 1)),
93 (BLCFILL32rr GR32:$src)>;
94 def : Pat<(and GR64:$src, (add GR64:$src, 1)),
95 (BLCFILL64rr GR64:$src)>;
97 def : Pat<(or GR32:$src, (not (add GR32:$src, 1))),
98 (BLCI32rr GR32:$src)>;
99 def : Pat<(or GR64:$src, (not (add GR64:$src, 1))),
100 (BLCI64rr GR64:$src)>;
103 def : Pat<(or GR32:$src, (sub -2, GR32:$src)),
104 (BLCI32rr GR32:$src)>;
105 def : Pat<(or GR64:$src, (sub -2, GR64:$src)),
106 (BLCI64rr GR64:$src)>;
108 def : Pat<(and (not GR32:$src), (add GR32:$src, 1)),
109 (BLCIC32rr GR32:$src)>;
110 def : Pat<(and (not GR64:$src), (add GR64:$src, 1)),
111 (BLCIC64rr GR64:$src)>;
113 def : Pat<(xor GR32:$src, (add GR32:$src, 1)),
114 (BLCMSK32rr GR32:$src)>;
115 def : Pat<(xor GR64:$src, (add GR64:$src, 1)),
116 (BLCMSK64rr GR64:$src)>;
118 def : Pat<(or GR32:$src, (add GR32:$src, 1)),
119 (BLCS32rr GR32:$src)>;
120 def : Pat<(or GR64:$src, (add GR64:$src, 1)),
121 (BLCS64rr GR64:$src)>;
123 def : Pat<(or GR32:$src, (add GR32:$src, -1)),
124 (BLSFILL32rr GR32:$src)>;
125 def : Pat<(or GR64:$src, (add GR64:$src, -1)),
126 (BLSFILL64rr GR64:$src)>;
128 def : Pat<(or (not GR32:$src), (add GR32:$src, -1)),
129 (BLSIC32rr GR32:$src)>;
130 def : Pat<(or (not GR64:$src), (add GR64:$src, -1)),
131 (BLSIC64rr GR64:$src)>;
133 def : Pat<(or (not GR32:$src), (add GR32:$src, 1)),
134 (T1MSKC32rr GR32:$src)>;
135 def : Pat<(or (not GR64:$src), (add GR64:$src, 1)),
136 (T1MSKC64rr GR64:$src)>;
138 def : Pat<(and (not GR32:$src), (add GR32:$src, -1)),
139 (TZMSK32rr GR32:$src)>;
140 def : Pat<(and (not GR64:$src), (add GR64:$src, -1)),
141 (TZMSK64rr GR64:$src)>;
144 def : Pat<(and_flag_nocf GR32:$src, (add GR32:$src, 1)),
145 (BLCFILL32rr GR32:$src)>;
146 def : Pat<(and_flag_nocf GR64:$src, (add GR64:$src, 1)),
147 (BLCFILL64rr GR64:$src)>;
149 def : Pat<(or_flag_nocf GR32:$src, (not (add GR32:$src, 1))),
150 (BLCI32rr GR32:$src)>;
151 def : Pat<(or_flag_nocf GR64:$src, (not (add GR64:$src, 1))),
152 (BLCI64rr GR64:$src)>;
155 def : Pat<(or_flag_nocf GR32:$src, (sub -2, GR32:$src)),
156 (BLCI32rr GR32:$src)>;
157 def : Pat<(or_flag_nocf GR64:$src, (sub -2, GR64:$src)),
158 (BLCI64rr GR64:$src)>;
160 def : Pat<(and_flag_nocf (not GR32:$src), (add GR32:$src, 1)),
161 (BLCIC32rr GR32:$src)>;
162 def : Pat<(and_flag_nocf (not GR64:$src), (add GR64:$src, 1)),
163 (BLCIC64rr GR64:$src)>;
165 def : Pat<(xor_flag_nocf GR32:$src, (add GR32:$src, 1)),
166 (BLCMSK32rr GR32:$src)>;
167 def : Pat<(xor_flag_nocf GR64:$src, (add GR64:$src, 1)),
168 (BLCMSK64rr GR64:$src)>;
170 def : Pat<(or_flag_nocf GR32:$src, (add GR32:$src, 1)),
171 (BLCS32rr GR32:$src)>;
172 def : Pat<(or_flag_nocf GR64:$src, (add GR64:$src, 1)),
173 (BLCS64rr GR64:$src)>;
175 def : Pat<(or_flag_nocf GR32:$src, (add GR32:$src, -1)),
176 (BLSFILL32rr GR32:$src)>;
177 def : Pat<(or_flag_nocf GR64:$src, (add GR64:$src, -1)),
178 (BLSFILL64rr GR64:$src)>;
180 def : Pat<(or_flag_nocf (not GR32:$src), (add GR32:$src, -1)),
181 (BLSIC32rr GR32:$src)>;
182 def : Pat<(or_flag_nocf (not GR64:$src), (add GR64:$src, -1)),
183 (BLSIC64rr GR64:$src)>;
185 def : Pat<(or_flag_nocf (not GR32:$src), (add GR32:$src, 1)),
186 (T1MSKC32rr GR32:$src)>;
187 def : Pat<(or_flag_nocf (not GR64:$src), (add GR64:$src, 1)),
188 (T1MSKC64rr GR64:$src)>;
190 def : Pat<(and_flag_nocf (not GR32:$src), (add GR32:$src, -1)),
191 (TZMSK32rr GR32:$src)>;
192 def : Pat<(and_flag_nocf (not GR64:$src), (add GR64:$src, -1)),
193 (TZMSK64rr GR64:$src)>;