131 #define GIC_INTR_ISRC(sc, irq)	(&sc->gic_irqs[irq].gi_isrc)  argument
165 gic_irq_unmask(struct arm_gic_softc *sc, u_int irq)  in gic_irq_unmask()  argument
168 	gic_d_write_4(sc, GICD_ISENABLER(irq), GICD_I_MASK(irq));  in gic_irq_unmask()
172 gic_irq_mask(struct arm_gic_softc *sc, u_int irq)  in gic_irq_mask()  argument
175 	gic_d_write_4(sc, GICD_ICENABLER(irq), GICD_I_MASK(irq));  in gic_irq_mask()
206 	u_int irq, cpu;  in arm_gic_init_secondary()  local
213 	for (irq = 0; irq < sc->nirqs; irq += 4)  in arm_gic_init_secondary()
214 		gic_d_write_4(sc, GICD_IPRIORITYR(irq), 0);  in arm_gic_init_secondary()
217 	for (irq = 0; GIC_SUPPORT_SECEXT(sc) && irq < sc->nirqs; irq += 32) {  in arm_gic_init_secondary()
218 		gic_d_write_4(sc, GICD_IGROUPR(irq), 0);  in arm_gic_init_secondary()
231 	for (irq = GIC_FIRST_SGI; irq <= GIC_LAST_SGI; irq++)  in arm_gic_init_secondary()
232 		if (intr_isrc_init_on_cpu(GIC_INTR_ISRC(sc, irq), cpu))  in arm_gic_init_secondary()
233 			gic_irq_unmask(sc, irq);  in arm_gic_init_secondary()
236 	for (irq = GIC_FIRST_PPI; irq <= GIC_LAST_PPI; irq++)  in arm_gic_init_secondary()
237 		if (intr_isrc_init_on_cpu(GIC_INTR_ISRC(sc, irq), cpu))  in arm_gic_init_secondary()
238 			gic_irq_unmask(sc, irq);  in arm_gic_init_secondary()
246 	uint32_t irq;  in arm_gic_register_isrcs()  local
255 	for (irq = 0; irq < num; irq++) {  in arm_gic_register_isrcs()
256 		irqs[irq].gi_irq = irq;  in arm_gic_register_isrcs()
257 		irqs[irq].gi_pol = INTR_POLARITY_CONFORM;  in arm_gic_register_isrcs()
258 		irqs[irq].gi_trig = INTR_TRIGGER_CONFORM;  in arm_gic_register_isrcs()
260 		isrc = &irqs[irq].gi_isrc;  in arm_gic_register_isrcs()
261 		if (irq <= GIC_LAST_SGI) {  in arm_gic_register_isrcs()
263 			    INTR_ISRCF_IPI, "%s,i%u", name, irq - GIC_FIRST_SGI);  in arm_gic_register_isrcs()
264 		} else if (irq <= GIC_LAST_PPI) {  in arm_gic_register_isrcs()
266 			    INTR_ISRCF_PPI, "%s,p%u", name, irq - GIC_FIRST_PPI);  in arm_gic_register_isrcs()
269 			    "%s,s%u", name, irq - GIC_FIRST_SPI);  in arm_gic_register_isrcs()
539 	uint32_t irq_active_reg, irq;  in arm_gic_intr()  local
543 	irq = irq_active_reg & 0x3FF;  in arm_gic_intr()
563 	if (irq >= sc->nirqs) {  in arm_gic_intr()
573 	gi = sc->gic_irqs + irq;  in arm_gic_intr()
578 	if (irq <= GIC_LAST_SGI) {  in arm_gic_intr()
586 		    irq - GIC_FIRST_SGI);  in arm_gic_intr()
593 		sc->last_irq[PCPU_GET(cpuid)] = irq;  in arm_gic_intr()
598 		gic_irq_mask(sc, irq);  in arm_gic_intr()
601 		device_printf(sc->gic_dev, "Stray irq %u disabled\n", irq);  in arm_gic_intr()
605 	arm_irq_memory_barrier(irq);  in arm_gic_intr()
607 	irq = irq_active_reg & 0x3FF;  in arm_gic_intr()
608 	if (irq < sc->nirqs)  in arm_gic_intr()
615 gic_config(struct arm_gic_softc *sc, u_int irq, enum intr_trigger trig,  in gic_config()  argument
621 	if (irq < GIC_FIRST_SPI)  in gic_config()
626 	reg = gic_d_read_4(sc, GICD_ICFGR(irq));  in gic_config()
627 	mask = (reg >> 2*(irq % 16)) & 0x3;  in gic_config()
646 	reg = reg & ~(0x3 << 2*(irq % 16));  in gic_config()
647 	reg = reg | (mask << 2*(irq % 16));  in gic_config()
648 	gic_d_write_4(sc, GICD_ICFGR(irq), reg);  in gic_config()
654 gic_bind(struct arm_gic_softc *sc, u_int irq, cpuset_t *cpus)  in gic_bind()  argument
667 	gic_d_write_1(sc, GICD_ITARGETSR(0) + irq, mask);  in gic_bind()
684 		u_int irq, tripol;  in gic_map_fdt()  local
706 			irq = GIC_FIRST_SPI + cells[1];  in gic_map_fdt()
710 			irq = GIC_FIRST_PPI + cells[1];  in gic_map_fdt()
711 			if (irq > GIC_LAST_PPI) {  in gic_map_fdt()
729 		*irqp = irq;  in gic_map_fdt()
763 	u_int irq;  in gic_map_intr()  local
780 		if (gic_map_fdt(dev, daf->ncells, daf->cells, &irq, &pol,  in gic_map_intr()
783 		KASSERT(irq >= sc->nirqs ||  in gic_map_intr()
784 		    (sc->gic_irqs[irq].gi_flags & GI_FLAG_MSI) == 0,  in gic_map_intr()
792 		irq = daa->irq;  in gic_map_intr()
800 		if (gic_map_msi(dev, dam, &irq, &pol, &trig) != 0)  in gic_map_intr()
807 	if (irq >= sc->nirqs)  in gic_map_intr()
816 	*irqp = irq;  in gic_map_intr()
829 	u_int irq;  in arm_gic_map_intr()  local
832 	error = gic_map_intr(dev, data, &irq, NULL, NULL);  in arm_gic_map_intr()
835 		*isrcp = GIC_INTR_ISRC(sc, irq);  in arm_gic_map_intr()
858 		u_int irq;  in arm_gic_setup_intr()  local
861 		if (gic_map_intr(dev, data, &irq, &pol, &trig) ||  in arm_gic_setup_intr()
862 		    gi->gi_irq != irq)  in arm_gic_setup_intr()
1031 	int i, irq, end_irq;  in arm_gic_alloc_msi()  local
1042 	for (irq = mbi_start; irq < mbi_start + mbi_count; irq++) {  in arm_gic_alloc_msi()
1044 		if ((irq & (maxcount - 1)) != 0)  in arm_gic_alloc_msi()
1051 		for (end_irq = irq; end_irq != irq + count; end_irq++) {  in arm_gic_alloc_msi()
1073 	if (!found || irq == mbi_start + mbi_count) {  in arm_gic_alloc_msi()
1080 		sc->gic_irqs[irq + i].gi_flags |= GI_FLAG_MSI_USED;  in arm_gic_alloc_msi()
1085 		isrc[i] = (struct intr_irqsrc *)&sc->gic_irqs[irq + i];  in arm_gic_alloc_msi()
1119 	int irq;  in arm_gic_alloc_msix()  local
1125 	for (irq = mbi_start; irq < mbi_start + mbi_count; irq++) {  in arm_gic_alloc_msix()
1126 		KASSERT((sc->gic_irqs[irq].gi_flags & GI_FLAG_MSI) != 0,  in arm_gic_alloc_msix()
1128 		if ((sc->gic_irqs[irq].gi_flags & GI_FLAG_MSI_USED) == 0)  in arm_gic_alloc_msix()
1132 	if (irq == mbi_start + mbi_count) {  in arm_gic_alloc_msix()
1138 	sc->gic_irqs[irq].gi_flags |= GI_FLAG_MSI_USED;  in arm_gic_alloc_msix()
1141 	*isrc = (struct intr_irqsrc *)&sc->gic_irqs[irq];  in arm_gic_alloc_msix()