Lines Matching refs:n
125 #define MV_WIN_CPU_CTRL_ARMV7(n) (((n) < 8) ? 0x10 * (n) : 0x90 + (0x8 * ((n) - 8))) argument
126 #define MV_WIN_CPU_BASE_ARMV7(n) ((((n) < 8) ? 0x10 * (n) : 0x90 + (0x8 * ((n) - 8))) + 0x4) argument
127 #define MV_WIN_CPU_REMAP_LO_ARMV7(n) (0x10 * (n) + 0x008) argument
128 #define MV_WIN_CPU_REMAP_HI_ARMV7(n) (0x10 * (n) + 0x00C) argument
130 #define MV_WIN_CPU_CTRL_ARMV5(n) (0x10 * (n) + (((n) < 8) ? 0x000 : 0x880)) argument
131 #define MV_WIN_CPU_BASE_ARMV5(n) (0x10 * (n) + (((n) < 8) ? 0x004 : 0x884)) argument
132 #define MV_WIN_CPU_REMAP_LO_ARMV5(n) (0x10 * (n) + (((n) < 8) ? 0x008 : 0x888)) argument
133 #define MV_WIN_CPU_REMAP_HI_ARMV5(n) (0x10 * (n) + (((n) < 8) ? 0x00C : 0x88C)) argument
146 #define MV_WIN_DDR_BASE(n) (0x8 * (n) + 0x0) argument
147 #define MV_WIN_DDR_SIZE(n) (0x8 * (n) + 0x4) argument
186 #define MV_WIN_CESA_CTRL(n) (0x8 * (n) + 0xA04) argument
187 #define MV_WIN_CESA_BASE(n) (0x8 * (n) + 0xA00) argument
190 #define MV_WIN_USB_CTRL(n) (0x10 * (n) + 0x320) argument
191 #define MV_WIN_USB_BASE(n) (0x10 * (n) + 0x324) argument
194 #define MV_WIN_USB3_CTRL(n) (0x8 * (n) + 0x4000) argument
195 #define MV_WIN_USB3_BASE(n) (0x8 * (n) + 0x4004) argument
199 #define MV_WIN_NETA_BASE(n) MV_WIN_ETH_BASE(n) + MV_WIN_NETA_OFFSET argument
203 #define MV_WIN_ETH_BASE(n) (0x8 * (n) + 0x200) argument
204 #define MV_WIN_ETH_SIZE(n) (0x8 * (n) + 0x204) argument
205 #define MV_WIN_ETH_REMAP(n) (0x4 * (n) + 0x280) argument
208 #define MV_WIN_IDMA_BASE(n) (0x8 * (n) + 0xa00) argument
209 #define MV_WIN_IDMA_SIZE(n) (0x8 * (n) + 0xa04) argument
210 #define MV_WIN_IDMA_REMAP(n) (0x4 * (n) + 0xa60) argument
211 #define MV_WIN_IDMA_CAP(n) (0x4 * (n) + 0xa70) argument
215 #define MV_WIN_XOR_BASE(n, m) (0x4 * (n) + 0xa50 + (m) * 0x100) argument
216 #define MV_WIN_XOR_SIZE(n, m) (0x4 * (n) + 0xa70 + (m) * 0x100) argument
217 #define MV_WIN_XOR_REMAP(n, m) (0x4 * (n) + 0xa90 + (m) * 0x100) argument
218 #define MV_WIN_XOR_CTRL(n, m) (0x4 * (n) + 0xa40 + (m) * 0x100) argument
219 #define MV_WIN_XOR_OVERR(n, m) (0x4 * (n) + 0xaa0 + (m) * 0x100) argument
224 #define MV_WIN_PCIE_TARGET_ARMADAXP(n) (4 + (4 * ((n) % 2))) argument
225 #define MV_WIN_PCIE_MEM_ATTR_ARMADAXP(n) (0xE8 + (0x10 * ((n) / 2))) argument
226 #define MV_WIN_PCIE_IO_ATTR_ARMADAXP(n) (0xE0 + (0x10 * ((n) / 2))) argument
227 #define MV_WIN_PCIE_TARGET_ARMADA38X(n) ((n) == 0 ? 8 : 4) argument
228 #define MV_WIN_PCIE_MEM_ATTR_ARMADA38X(n) ((n) < 2 ? 0xE8 : (0xD8 - (((n) % 2) * 0x20))) argument
229 #define MV_WIN_PCIE_IO_ATTR_ARMADA38X(n) ((n) < 2 ? 0xE0 : (0xD0 - (((n) % 2) * 0x20))) argument
231 #define MV_WIN_PCIE_TARGET(n) 4 argument
232 #define MV_WIN_PCIE_MEM_ATTR(n) 0xE8 argument
233 #define MV_WIN_PCIE_IO_ATTR(n) 0xE0 argument
235 #define MV_WIN_PCIE_TARGET(n) 4 argument
236 #define MV_WIN_PCIE_MEM_ATTR(n) 0x59 argument
237 #define MV_WIN_PCIE_IO_ATTR(n) 0x51 argument
239 #define MV_WIN_PCIE_TARGET(n) (4 + (4 * ((n) % 2))) argument
240 #define MV_WIN_PCIE_MEM_ATTR(n) (0xE8 + (0x10 * ((n) / 2))) argument
241 #define MV_WIN_PCIE_IO_ATTR(n) (0xE0 + (0x10 * ((n) / 2))) argument
248 #define MV_WIN_PCIE_CTRL(n) (0x10 * (((n) < 5) ? (n) : \ argument
249 (n) + 1) + 0x1820)
250 #define MV_WIN_PCIE_BASE(n) (0x10 * (((n) < 5) ? (n) : \ argument
251 (n) + 1) + 0x1824)
252 #define MV_WIN_PCIE_REMAP(n) (0x10 * (((n) < 5) ? (n) : \ argument
253 (n) + 1) + 0x182C)
256 #define MV_PCIE_BAR_CTRL(n) (0x04 * (n) + 0x1800) argument
257 #define MV_PCIE_BAR_BASE(n) (0x08 * ((n) < 3 ? (n) : 4) + 0x0010) argument
258 #define MV_PCIE_BAR_BASE_H(n) (0x08 * (n) + 0x0014) argument
266 #define MV_WIN_SATA_CTRL_ARMADA38X(n) (0x10 * (n) + 0x60) argument
267 #define MV_WIN_SATA_BASE_ARMADA38X(n) (0x10 * (n) + 0x64) argument
268 #define MV_WIN_SATA_SIZE_ARMADA38X(n) (0x10 * (n) + 0x68) argument
270 #define MV_WIN_SATA_CTRL(n) (0x10 * (n) + 0x30) argument
271 #define MV_WIN_SATA_BASE(n) (0x10 * (n) + 0x34) argument
274 #define MV_WIN_SDHCI_CTRL(n) (0x8 * (n) + 0x4080) argument
275 #define MV_WIN_SDHCI_BASE(n) (0x8 * (n) + 0x4084) argument