Lines Matching refs:RD4

171 #define	RD4(_sc, _r)		bus_read_4((_sc)->mem_res, (_r))  macro
368 reg = RD4(sc, XUSB_PADCTL_SS_PORT_MAP); in usb3_port_init()
377 reg = RD4(sc, XUSB_PADCTL_IOPHY_USB3_PAD_CTL2(port->idx)); in usb3_port_init()
389 reg = RD4(sc, XUSB_PADCTL_ELPG_PROGRAM); in usb3_port_init()
394 reg = RD4(sc, XUSB_PADCTL_ELPG_PROGRAM); in usb3_port_init()
399 reg = RD4(sc, XUSB_PADCTL_ELPG_PROGRAM); in usb3_port_init()
413 reg = RD4(sc, XUSB_PADCTL_IOPHY_PLL_P0_CTL1); in pcie_powerup()
418 reg = RD4(sc, XUSB_PADCTL_IOPHY_PLL_P0_CTL2); in pcie_powerup()
425 reg = RD4(sc, XUSB_PADCTL_IOPHY_PLL_P0_CTL1); in pcie_powerup()
431 reg = RD4(sc, XUSB_PADCTL_IOPHY_PLL_P0_CTL1); in pcie_powerup()
440 reg = RD4(sc, XUSB_PADCTL_USB3_PAD_MUX); in pcie_powerup()
452 reg = RD4(sc, XUSB_PADCTL_USB3_PAD_MUX); in pcie_powerdown()
456 reg = RD4(sc, XUSB_PADCTL_IOPHY_PLL_P0_CTL1); in pcie_powerdown()
471 reg = RD4(sc, XUSB_PADCTL_IOPHY_MISC_PAD_S0_CTL1); in sata_powerup()
476 reg = RD4(sc, XUSB_PADCTL_IOPHY_PLL_S0_CTL1); in sata_powerup()
481 reg = RD4(sc, XUSB_PADCTL_IOPHY_PLL_S0_CTL1); in sata_powerup()
485 reg = RD4(sc, XUSB_PADCTL_IOPHY_PLL_S0_CTL1); in sata_powerup()
490 reg = RD4(sc, XUSB_PADCTL_IOPHY_PLL_S0_CTL1); in sata_powerup()
499 reg = RD4(sc, XUSB_PADCTL_USB3_PAD_MUX); in sata_powerup()
503 reg = RD4(sc, XUSB_PADCTL_USB3_PAD_MUX); in sata_powerup()
515 reg = RD4(sc, XUSB_PADCTL_USB3_PAD_MUX); in sata_powerdown()
519 reg = RD4(sc, XUSB_PADCTL_IOPHY_PLL_S0_CTL1); in sata_powerdown()
524 reg = RD4(sc, XUSB_PADCTL_IOPHY_PLL_S0_CTL1); in sata_powerdown()
529 reg = RD4(sc, XUSB_PADCTL_IOPHY_PLL_S0_CTL1); in sata_powerdown()
535 reg = RD4(sc, XUSB_PADCTL_IOPHY_MISC_PAD_S0_CTL1); in sata_powerdown()
556 reg = RD4(sc, XUSB_PADCTL_USB2_BIAS_PAD_CTL0); in usb2_powerup()
563 reg = RD4(sc, XUSB_PADCTL_USB2_PORT_CAP); in usb2_powerup()
568 reg = RD4(sc, XUSB_PADCTL_USB2_OTG_PAD_CTL0(lane->idx)); in usb2_powerup()
586 reg = RD4(sc, XUSB_PADCTL_USB2_OTG_PAD_CTL1(lane->idx)); in usb2_powerup()
605 reg = RD4(sc, XUSB_PADCTL_USB2_BIAS_PAD_CTL0); in usb2_powerup()
624 reg = RD4(sc, XUSB_PADCTL_USB2_BIAS_PAD_CTL0); in usb2_powerdown()
644 reg = RD4(sc, XUSB_PADCTL_ELPG_PROGRAM); in phy_powerup()
649 reg = RD4(sc, XUSB_PADCTL_ELPG_PROGRAM); in phy_powerup()
654 reg = RD4(sc, XUSB_PADCTL_ELPG_PROGRAM); in phy_powerup()
667 reg = RD4(sc, XUSB_PADCTL_ELPG_PROGRAM); in phy_powerdown()
672 reg = RD4(sc, XUSB_PADCTL_ELPG_PROGRAM); in phy_powerdown()
677 reg = RD4(sc, XUSB_PADCTL_ELPG_PROGRAM); in phy_powerdown()
849 reg = RD4(sc, lane->reg); in config_lane()