Lines Matching refs:reg
291 bus_size_t reg; member
307 .reg = r, \
366 uint32_t reg; in usb3_port_init() local
368 reg = RD4(sc, XUSB_PADCTL_SS_PORT_MAP); in usb3_port_init()
370 reg &= ~SS_PORT_MAP_PORT_INTERNAL(port->idx); in usb3_port_init()
372 reg |= SS_PORT_MAP_PORT_INTERNAL(port->idx); in usb3_port_init()
373 reg &= ~SS_PORT_MAP_PORT_MAP(port->idx, ~0); in usb3_port_init()
374 reg |= SS_PORT_MAP_PORT_MAP(port->idx, port->companion); in usb3_port_init()
375 WR4(sc, XUSB_PADCTL_SS_PORT_MAP, reg); in usb3_port_init()
377 reg = RD4(sc, XUSB_PADCTL_IOPHY_USB3_PAD_CTL2(port->idx)); in usb3_port_init()
378 reg &= ~IOPHY_USB3_PAD_CTL2_CDR_CNTL(~0); in usb3_port_init()
379 reg &= ~IOPHY_USB3_PAD_CTL2_RX_EQ(~0); in usb3_port_init()
380 reg &= ~IOPHY_USB3_PAD_CTL2_RX_WANDER(~0); in usb3_port_init()
381 reg |= IOPHY_USB3_PAD_CTL2_CDR_CNTL(0x24); in usb3_port_init()
382 reg |= IOPHY_USB3_PAD_CTL2_RX_EQ(0xF070); in usb3_port_init()
383 reg |= IOPHY_USB3_PAD_CTL2_RX_WANDER(0xF); in usb3_port_init()
384 WR4(sc, XUSB_PADCTL_IOPHY_USB3_PAD_CTL2(port->idx), reg); in usb3_port_init()
389 reg = RD4(sc, XUSB_PADCTL_ELPG_PROGRAM); in usb3_port_init()
390 reg &= ~ELPG_PROGRAM_SSP_ELPG_VCORE_DOWN(port->idx); in usb3_port_init()
391 WR4(sc, XUSB_PADCTL_ELPG_PROGRAM, reg); in usb3_port_init()
394 reg = RD4(sc, XUSB_PADCTL_ELPG_PROGRAM); in usb3_port_init()
395 reg &= ~ELPG_PROGRAM_SSP_ELPG_CLAMP_EN_EARLY(port->idx); in usb3_port_init()
396 WR4(sc, XUSB_PADCTL_ELPG_PROGRAM, reg); in usb3_port_init()
399 reg = RD4(sc, XUSB_PADCTL_ELPG_PROGRAM); in usb3_port_init()
400 reg &= ~ELPG_PROGRAM_SSP_ELPG_CLAMP_EN(port->idx); in usb3_port_init()
401 WR4(sc, XUSB_PADCTL_ELPG_PROGRAM, reg); in usb3_port_init()
410 uint32_t reg; in pcie_powerup() local
413 reg = RD4(sc, XUSB_PADCTL_IOPHY_PLL_P0_CTL1); in pcie_powerup()
414 reg &= ~IOPHY_PLL_P0_CTL1_REFCLK_SEL(~0); in pcie_powerup()
415 WR4(sc, XUSB_PADCTL_IOPHY_PLL_P0_CTL1, reg); in pcie_powerup()
418 reg = RD4(sc, XUSB_PADCTL_IOPHY_PLL_P0_CTL2); in pcie_powerup()
419 reg |= IOPHY_PLL_P0_CTL2_REFCLKBUF_EN; in pcie_powerup()
420 reg |= IOPHY_PLL_P0_CTL2_TXCLKREF_EN; in pcie_powerup()
421 reg |= IOPHY_PLL_P0_CTL2_TXCLKREF_SEL; in pcie_powerup()
422 WR4(sc, XUSB_PADCTL_IOPHY_PLL_P0_CTL2, reg); in pcie_powerup()
425 reg = RD4(sc, XUSB_PADCTL_IOPHY_PLL_P0_CTL1); in pcie_powerup()
426 reg |= IOPHY_PLL_P0_CTL1_PLL_RST; in pcie_powerup()
427 WR4(sc, XUSB_PADCTL_IOPHY_PLL_P0_CTL1, reg); in pcie_powerup()
431 reg = RD4(sc, XUSB_PADCTL_IOPHY_PLL_P0_CTL1); in pcie_powerup()
432 if (reg & IOPHY_PLL_P0_CTL1_PLL0_LOCKDET) in pcie_powerup()
440 reg = RD4(sc, XUSB_PADCTL_USB3_PAD_MUX); in pcie_powerup()
441 reg |= USB3_PAD_MUX_PCIE_IDDQ_DISABLE(lane->idx); in pcie_powerup()
442 WR4(sc, XUSB_PADCTL_USB3_PAD_MUX, reg); in pcie_powerup()
450 uint32_t reg; in pcie_powerdown() local
452 reg = RD4(sc, XUSB_PADCTL_USB3_PAD_MUX); in pcie_powerdown()
453 reg &= ~USB3_PAD_MUX_PCIE_IDDQ_DISABLE(lane->idx); in pcie_powerdown()
454 WR4(sc, XUSB_PADCTL_USB3_PAD_MUX, reg); in pcie_powerdown()
456 reg = RD4(sc, XUSB_PADCTL_IOPHY_PLL_P0_CTL1); in pcie_powerdown()
457 reg &= ~IOPHY_PLL_P0_CTL1_PLL_RST; in pcie_powerdown()
458 WR4(sc, XUSB_PADCTL_IOPHY_PLL_P0_CTL1, reg); in pcie_powerdown()
468 uint32_t reg; in sata_powerup() local
471 reg = RD4(sc, XUSB_PADCTL_IOPHY_MISC_PAD_S0_CTL1); in sata_powerup()
472 reg &= ~IOPHY_MISC_PAD_S0_CTL1_IDDQ_OVRD; in sata_powerup()
473 reg &= ~IOPHY_MISC_PAD_S0_CTL1_IDDQ; in sata_powerup()
474 WR4(sc, XUSB_PADCTL_IOPHY_MISC_PAD_S0_CTL1, reg); in sata_powerup()
476 reg = RD4(sc, XUSB_PADCTL_IOPHY_PLL_S0_CTL1); in sata_powerup()
477 reg &= ~IOPHY_PLL_S0_CTL1_PLL_PWR_OVRD; in sata_powerup()
478 reg &= ~IOPHY_PLL_S0_CTL1_PLL_IDDQ; in sata_powerup()
479 WR4(sc, XUSB_PADCTL_IOPHY_PLL_S0_CTL1, reg); in sata_powerup()
481 reg = RD4(sc, XUSB_PADCTL_IOPHY_PLL_S0_CTL1); in sata_powerup()
482 reg |= IOPHY_PLL_S0_CTL1_PLL1_MODE; in sata_powerup()
483 WR4(sc, XUSB_PADCTL_IOPHY_PLL_S0_CTL1, reg); in sata_powerup()
485 reg = RD4(sc, XUSB_PADCTL_IOPHY_PLL_S0_CTL1); in sata_powerup()
486 reg |= IOPHY_PLL_S0_CTL1_PLL_RST_L; in sata_powerup()
487 WR4(sc, XUSB_PADCTL_IOPHY_PLL_S0_CTL1, reg); in sata_powerup()
490 reg = RD4(sc, XUSB_PADCTL_IOPHY_PLL_S0_CTL1); in sata_powerup()
491 if (reg & IOPHY_PLL_S0_CTL1_PLL1_LOCKDET) in sata_powerup()
499 reg = RD4(sc, XUSB_PADCTL_USB3_PAD_MUX); in sata_powerup()
500 reg |= IOPHY_PLL_S0_CTL1_PLL_RST_L; in sata_powerup()
501 WR4(sc, XUSB_PADCTL_USB3_PAD_MUX, reg); in sata_powerup()
503 reg = RD4(sc, XUSB_PADCTL_USB3_PAD_MUX); in sata_powerup()
504 reg |= USB3_PAD_MUX_SATA_IDDQ_DISABLE; in sata_powerup()
505 WR4(sc, XUSB_PADCTL_USB3_PAD_MUX, reg); in sata_powerup()
513 uint32_t reg; in sata_powerdown() local
515 reg = RD4(sc, XUSB_PADCTL_USB3_PAD_MUX); in sata_powerdown()
516 reg &= ~USB3_PAD_MUX_SATA_IDDQ_DISABLE; in sata_powerdown()
517 WR4(sc, XUSB_PADCTL_USB3_PAD_MUX, reg); in sata_powerdown()
519 reg = RD4(sc, XUSB_PADCTL_IOPHY_PLL_S0_CTL1); in sata_powerdown()
520 reg &= ~IOPHY_PLL_S0_CTL1_PLL_RST_L; in sata_powerdown()
521 WR4(sc, XUSB_PADCTL_IOPHY_PLL_S0_CTL1, reg); in sata_powerdown()
524 reg = RD4(sc, XUSB_PADCTL_IOPHY_PLL_S0_CTL1); in sata_powerdown()
525 reg &= ~IOPHY_PLL_S0_CTL1_PLL1_MODE; in sata_powerdown()
526 WR4(sc, XUSB_PADCTL_IOPHY_PLL_S0_CTL1, reg); in sata_powerdown()
529 reg = RD4(sc, XUSB_PADCTL_IOPHY_PLL_S0_CTL1); in sata_powerdown()
530 reg |= IOPHY_PLL_S0_CTL1_PLL_PWR_OVRD; in sata_powerdown()
531 reg |= IOPHY_PLL_S0_CTL1_PLL_IDDQ; in sata_powerdown()
532 WR4(sc, XUSB_PADCTL_IOPHY_PLL_S0_CTL1, reg); in sata_powerdown()
535 reg = RD4(sc, XUSB_PADCTL_IOPHY_MISC_PAD_S0_CTL1); in sata_powerdown()
536 reg |= IOPHY_MISC_PAD_S0_CTL1_IDDQ_OVRD; in sata_powerdown()
537 reg |= IOPHY_MISC_PAD_S0_CTL1_IDDQ; in sata_powerdown()
538 WR4(sc, XUSB_PADCTL_IOPHY_MISC_PAD_S0_CTL1, reg); in sata_powerdown()
547 uint32_t reg; in usb2_powerup() local
556 reg = RD4(sc, XUSB_PADCTL_USB2_BIAS_PAD_CTL0); in usb2_powerup()
557 reg &= ~USB2_BIAS_PAD_CTL0_HS_SQUELCH_LEVEL(~0); in usb2_powerup()
558 reg &= ~USB2_BIAS_PAD_CTL0_HS_DISCON_LEVEL(~0); in usb2_powerup()
559 reg |= USB2_BIAS_PAD_CTL0_HS_SQUELCH_LEVEL(sc->hs_squelch_level); in usb2_powerup()
560 reg |= USB2_BIAS_PAD_CTL0_HS_DISCON_LEVEL(5); in usb2_powerup()
561 WR4(sc, XUSB_PADCTL_USB2_BIAS_PAD_CTL0, reg); in usb2_powerup()
563 reg = RD4(sc, XUSB_PADCTL_USB2_PORT_CAP); in usb2_powerup()
564 reg &= ~USB2_PORT_CAP_PORT_CAP(lane->idx, ~0); in usb2_powerup()
565 reg |= USB2_PORT_CAP_PORT_CAP(lane->idx, USB2_PORT_CAP_PORT_CAP_HOST); in usb2_powerup()
566 WR4(sc, XUSB_PADCTL_USB2_PORT_CAP, reg); in usb2_powerup()
568 reg = RD4(sc, XUSB_PADCTL_USB2_OTG_PAD_CTL0(lane->idx)); in usb2_powerup()
569 reg &= ~USB2_OTG_PAD_CTL0_HS_CURR_LEVEL(~0); in usb2_powerup()
570 reg &= ~USB2_OTG_PAD_CTL0_HS_SLEW(~0); in usb2_powerup()
571 reg &= ~USB2_OTG_PAD_CTL0_LS_RSLEW(~0); in usb2_powerup()
572 reg &= ~USB2_OTG_PAD_CTL0_PD; in usb2_powerup()
573 reg &= ~USB2_OTG_PAD_CTL0_PD2; in usb2_powerup()
574 reg &= ~USB2_OTG_PAD_CTL0_PD_ZI; in usb2_powerup()
576 reg |= USB2_OTG_PAD_CTL0_HS_SLEW(14); in usb2_powerup()
578 reg |= USB2_OTG_PAD_CTL0_HS_CURR_LEVEL(sc->hs_curr_level_0); in usb2_powerup()
579 reg |= USB2_OTG_PAD_CTL0_LS_RSLEW(3); in usb2_powerup()
581 reg |= USB2_OTG_PAD_CTL0_HS_CURR_LEVEL(sc->hs_curr_level_123); in usb2_powerup()
582 reg |= USB2_OTG_PAD_CTL0_LS_RSLEW(0); in usb2_powerup()
584 WR4(sc, XUSB_PADCTL_USB2_OTG_PAD_CTL0(lane->idx), reg); in usb2_powerup()
586 reg = RD4(sc, XUSB_PADCTL_USB2_OTG_PAD_CTL1(lane->idx)); in usb2_powerup()
587 reg &= ~USB2_OTG_PAD_CTL1_TERM_RANGE_ADJ(~0); in usb2_powerup()
588 reg &= ~USB2_OTG_PAD_CTL1_HS_IREF_CAP(~0); in usb2_powerup()
589 reg &= ~USB2_OTG_PAD_CTL1_PD_DR; in usb2_powerup()
590 reg &= ~USB2_OTG_PAD_CTL1_PD_DISC_FORCE_POWERUP; in usb2_powerup()
591 reg &= ~USB2_OTG_PAD_CTL1_PD_CHRP_FORCE_POWERUP; in usb2_powerup()
593 reg |= USB2_OTG_PAD_CTL1_TERM_RANGE_ADJ(sc->hs_term_range_adj); in usb2_powerup()
594 reg |= USB2_OTG_PAD_CTL1_HS_IREF_CAP(sc->hs_iref_cap); in usb2_powerup()
595 WR4(sc, XUSB_PADCTL_USB2_OTG_PAD_CTL1(lane->idx), reg); in usb2_powerup()
605 reg = RD4(sc, XUSB_PADCTL_USB2_BIAS_PAD_CTL0); in usb2_powerup()
606 reg &= ~USB2_BIAS_PAD_CTL0_PD; in usb2_powerup()
607 WR4(sc, XUSB_PADCTL_USB2_BIAS_PAD_CTL0, reg); in usb2_powerup()
615 uint32_t reg; in usb2_powerdown() local
624 reg = RD4(sc, XUSB_PADCTL_USB2_BIAS_PAD_CTL0); in usb2_powerdown()
625 reg |= USB2_BIAS_PAD_CTL0_PD; in usb2_powerdown()
626 WR4(sc, XUSB_PADCTL_USB2_BIAS_PAD_CTL0, reg); in usb2_powerdown()
642 uint32_t reg; in phy_powerup() local
644 reg = RD4(sc, XUSB_PADCTL_ELPG_PROGRAM); in phy_powerup()
645 reg &= ~ELPG_PROGRAM_AUX_MUX_LP0_VCORE_DOWN; in phy_powerup()
646 WR4(sc, XUSB_PADCTL_ELPG_PROGRAM, reg); in phy_powerup()
649 reg = RD4(sc, XUSB_PADCTL_ELPG_PROGRAM); in phy_powerup()
650 reg &= ~ELPG_PROGRAM_AUX_MUX_LP0_CLAMP_EN; in phy_powerup()
651 WR4(sc, XUSB_PADCTL_ELPG_PROGRAM, reg); in phy_powerup()
654 reg = RD4(sc, XUSB_PADCTL_ELPG_PROGRAM); in phy_powerup()
655 reg &= ~ELPG_PROGRAM_AUX_MUX_LP0_CLAMP_EN_EARLY; in phy_powerup()
656 WR4(sc, XUSB_PADCTL_ELPG_PROGRAM, reg); in phy_powerup()
665 uint32_t reg; in phy_powerdown() local
667 reg = RD4(sc, XUSB_PADCTL_ELPG_PROGRAM); in phy_powerdown()
668 reg |= ELPG_PROGRAM_AUX_MUX_LP0_CLAMP_EN_EARLY; in phy_powerdown()
669 WR4(sc, XUSB_PADCTL_ELPG_PROGRAM, reg); in phy_powerdown()
672 reg = RD4(sc, XUSB_PADCTL_ELPG_PROGRAM); in phy_powerdown()
673 reg |= ELPG_PROGRAM_AUX_MUX_LP0_CLAMP_EN; in phy_powerdown()
674 WR4(sc, XUSB_PADCTL_ELPG_PROGRAM, reg); in phy_powerdown()
677 reg = RD4(sc, XUSB_PADCTL_ELPG_PROGRAM); in phy_powerdown()
678 reg |= ELPG_PROGRAM_AUX_MUX_LP0_VCORE_DOWN; in phy_powerdown()
679 WR4(sc, XUSB_PADCTL_ELPG_PROGRAM, reg); in phy_powerdown()
847 uint32_t reg; in config_lane() local
849 reg = RD4(sc, lane->reg); in config_lane()
850 reg &= ~(lane->mask << lane->shift); in config_lane()
851 reg |= (lane->mux_idx & lane->mask) << lane->shift; in config_lane()
852 WR4(sc, lane->reg, reg); in config_lane()
1099 uint32_t reg; in load_calibration() local
1102 reg = tegra_fuse_read_4(FUSE_XUSB_CALIB); in load_calibration()
1103 sc->hs_curr_level_0 = FUSE_XUSB_CALIB_HS_CURR_LEVEL_0(reg); in load_calibration()
1104 sc->hs_curr_level_123 = FUSE_XUSB_CALIB_HS_CURR_LEVEL_123(reg); in load_calibration()
1105 sc->hs_iref_cap = FUSE_XUSB_CALIB_HS_IREF_CAP(reg); in load_calibration()
1106 sc->hs_squelch_level = FUSE_XUSB_CALIB_HS_SQUELCH_LEVEL(reg); in load_calibration()
1107 sc->hs_term_range_adj = FUSE_XUSB_CALIB_HS_TERM_RANGE_ADJ(reg); in load_calibration()