Lines Matching refs:irq
99 uint32_t irq; member
466 struct vgic_v3_irq *irq; in vgic_v3_cpuinit() local
477 irq = &vgic_cpu->private_irqs[irqid]; in vgic_v3_cpuinit()
479 mtx_init(&irq->irq_spinmtx, "VGIC IRQ spinlock", NULL, in vgic_v3_cpuinit()
481 irq->irq = irqid; in vgic_v3_cpuinit()
482 irq->mpidr = hypctx->vmpidr_el2 & GICD_AFF; in vgic_v3_cpuinit()
483 irq->target_vcpu = vcpu_vcpuid(hypctx->vcpu); in vgic_v3_cpuinit()
484 MPASS(irq->target_vcpu >= 0); in vgic_v3_cpuinit()
488 irq->enabled = true; in vgic_v3_cpuinit()
489 irq->config = VGIC_CONFIG_EDGE; in vgic_v3_cpuinit()
492 irq->config = VGIC_CONFIG_LEVEL; in vgic_v3_cpuinit()
494 irq->priority = 0; in vgic_v3_cpuinit()
539 struct vgic_v3_irq *irq; in vgic_v3_cpucleanup() local
544 irq = &vgic_cpu->private_irqs[irqid]; in vgic_v3_cpucleanup()
545 mtx_destroy(&irq->irq_spinmtx); in vgic_v3_cpucleanup()
587 vgic_v3_irq_pending(struct vgic_v3_irq *irq) in vgic_v3_irq_pending() argument
589 if ((irq->config & VGIC_CONFIG_MASK) == VGIC_CONFIG_LEVEL) { in vgic_v3_irq_pending()
590 return (irq->pending || irq->level); in vgic_v3_irq_pending()
592 return (irq->pending); in vgic_v3_irq_pending()
598 int vcpuid, struct vgic_v3_irq *irq) in vgic_v3_queue_irq() argument
604 mtx_assert(&irq->irq_spinmtx, MA_OWNED); in vgic_v3_queue_irq()
607 if (!irq->level && !irq->pending) in vgic_v3_queue_irq()
610 if (!irq->on_aplist) { in vgic_v3_queue_irq()
611 irq->on_aplist = true; in vgic_v3_queue_irq()
612 TAILQ_INSERT_TAIL(&vgic_cpu->irq_act_pend, irq, act_pend_list); in vgic_v3_queue_irq()
660 struct vgic_v3_irq *irq; in read_enabler() local
668 irq = vgic_v3_get_irq(hypctx->hyp, vcpu_vcpuid(hypctx->vcpu), in read_enabler()
670 if (irq == NULL) in read_enabler()
673 if (!irq->enabled) in read_enabler()
675 vgic_v3_release_irq(irq); in read_enabler()
684 struct vgic_v3_irq *irq; in write_enabler() local
695 irq = vgic_v3_get_irq(hypctx->hyp, vcpu_vcpuid(hypctx->vcpu), in write_enabler()
697 if (irq == NULL) in write_enabler()
700 irq->enabled = set; in write_enabler()
701 vgic_v3_release_irq(irq); in write_enabler()
708 struct vgic_v3_irq *irq; in read_pendr() local
716 irq = vgic_v3_get_irq(hypctx->hyp, vcpu_vcpuid(hypctx->vcpu), in read_pendr()
718 if (irq == NULL) in read_pendr()
721 if (vgic_v3_irq_pending(irq)) in read_pendr()
723 vgic_v3_release_irq(irq); in read_pendr()
733 struct vgic_v3_irq *irq; in write_pendr() local
749 irq = vgic_v3_get_irq(hypctx->hyp, vcpu_vcpuid(hypctx->vcpu), in write_pendr()
751 if (irq == NULL) in write_pendr()
755 target_vcpu = irq->target_vcpu; in write_pendr()
765 irq->pending = false; in write_pendr()
767 irq->pending = true; in write_pendr()
770 irq); in write_pendr()
774 vgic_v3_release_irq(irq); in write_pendr()
786 struct vgic_v3_irq *irq; in read_activer() local
794 irq = vgic_v3_get_irq(hypctx->hyp, vcpu_vcpuid(hypctx->vcpu), in read_activer()
796 if (irq == NULL) in read_activer()
799 if (irq->active) in read_activer()
801 vgic_v3_release_irq(irq); in read_activer()
811 struct vgic_v3_irq *irq; in write_activer() local
825 irq = vgic_v3_get_irq(hypctx->hyp, vcpu_vcpuid(hypctx->vcpu), in write_activer()
827 if (irq == NULL) in write_activer()
831 target_vcpu = irq->target_vcpu; in write_activer()
841 irq->active = false; in write_activer()
844 irq->active = true; in write_activer()
847 irq); in write_activer()
851 vgic_v3_release_irq(irq); in write_activer()
861 struct vgic_v3_irq *irq; in read_priorityr() local
869 irq = vgic_v3_get_irq(hypctx->hyp, vcpu_vcpuid(hypctx->vcpu), in read_priorityr()
871 if (irq == NULL) in read_priorityr()
874 ret |= ((uint64_t)irq->priority) << (i * 8); in read_priorityr()
875 vgic_v3_release_irq(irq); in read_priorityr()
884 struct vgic_v3_irq *irq; in write_priorityr() local
888 irq = vgic_v3_get_irq(hypctx->hyp, vcpu_vcpuid(hypctx->vcpu), in write_priorityr()
890 if (irq == NULL) in write_priorityr()
894 irq->priority = (val >> (i * 8)) & 0xf8; in write_priorityr()
895 vgic_v3_release_irq(irq); in write_priorityr()
902 struct vgic_v3_irq *irq; in read_config() local
910 irq = vgic_v3_get_irq(hypctx->hyp, vcpu_vcpuid(hypctx->vcpu), in read_config()
912 if (irq == NULL) in read_config()
915 ret |= ((uint64_t)irq->config) << (i * 2); in read_config()
916 vgic_v3_release_irq(irq); in read_config()
925 struct vgic_v3_irq *irq; in write_config() local
939 irq = vgic_v3_get_irq(hypctx->hyp, vcpu_vcpuid(hypctx->vcpu), in write_config()
941 if (irq == NULL) in write_config()
945 irq->config = (val >> (i * 2)) & VGIC_CONFIG_MASK; in write_config()
946 vgic_v3_release_irq(irq); in write_config()
953 struct vgic_v3_irq *irq; in read_route() local
956 irq = vgic_v3_get_irq(hypctx->hyp, vcpu_vcpuid(hypctx->vcpu), n); in read_route()
957 if (irq == NULL) in read_route()
960 mpidr = irq->mpidr; in read_route()
961 vgic_v3_release_irq(irq); in read_route()
970 struct vgic_v3_irq *irq; in write_route() local
972 irq = vgic_v3_get_irq(hypctx->hyp, vcpu_vcpuid(hypctx->vcpu), n); in write_route()
973 if (irq == NULL) in write_route()
976 irq->mpidr = gic_reg_value_64(irq->mpidr, val, offset, size) & GICD_AFF; in write_route()
977 irq->target_vcpu = mpidr_to_vcpu(hypctx->hyp, irq->mpidr); in write_route()
984 vgic_v3_release_irq(irq); in write_route()
1833 struct vgic_v3_irq *irq; in vgic_v3_mmio_init() local
1842 irq = &vgic->irqs[i]; in vgic_v3_mmio_init()
1844 mtx_init(&irq->irq_spinmtx, "VGIC IRQ spinlock", NULL, in vgic_v3_mmio_init()
1847 irq->irq = i + VGIC_PRV_I_NUM; in vgic_v3_mmio_init()
1855 struct vgic_v3_irq *irq; in vgic_v3_mmio_destroy() local
1860 irq = &vgic->irqs[i]; in vgic_v3_mmio_destroy()
1862 mtx_destroy(&irq->irq_spinmtx); in vgic_v3_mmio_destroy()
1942 struct vgic_v3_irq *irq; in vgic_v3_get_irq() local
1952 irq = &vgic_cpu->private_irqs[irqid]; in vgic_v3_get_irq()
1957 irq = &hyp->vgic->irqs[irqid]; in vgic_v3_get_irq()
1965 mtx_lock_spin(&irq->irq_spinmtx); in vgic_v3_get_irq()
1966 return (irq); in vgic_v3_get_irq()
1970 vgic_v3_release_irq(struct vgic_v3_irq *irq) in vgic_v3_release_irq() argument
1973 mtx_unlock_spin(&irq->irq_spinmtx); in vgic_v3_release_irq()
1991 vgic_v3_check_irq(struct vgic_v3_irq *irq, bool level) in vgic_v3_check_irq() argument
1998 switch (irq->config & VGIC_CONFIG_MASK) { in vgic_v3_check_irq()
2000 return (level != irq->level); in vgic_v3_check_irq()
2015 struct vgic_v3_irq *irq; in vgic_v3_inject_irq() local
2027 irq = vgic_v3_get_irq(hyp, vcpuid, irqid); in vgic_v3_inject_irq()
2028 if (irq == NULL) { in vgic_v3_inject_irq()
2033 target_vcpu = irq->target_vcpu; in vgic_v3_inject_irq()
2045 vgic_v3_release_irq(irq); in vgic_v3_inject_irq()
2051 vgic_v3_release_irq(irq); in vgic_v3_inject_irq()
2060 if (!vgic_v3_check_irq(irq, level)) { in vgic_v3_inject_irq()
2064 if ((irq->config & VGIC_CONFIG_MASK) == VGIC_CONFIG_LEVEL) in vgic_v3_inject_irq()
2065 irq->level = level; in vgic_v3_inject_irq()
2067 irq->pending = true; in vgic_v3_inject_irq()
2069 notify = vgic_v3_queue_irq(hyp, vgic_cpu, vcpuid, irq); in vgic_v3_inject_irq()
2073 vgic_v3_release_irq(irq); in vgic_v3_inject_irq()
2105 struct vgic_v3_irq *irq; in vgic_v3_flush_hwstate() local
2131 TAILQ_FOREACH(irq, &vgic_cpu->irq_act_pend, act_pend_list) { in vgic_v3_flush_hwstate()
2136 if (!irq->enabled) in vgic_v3_flush_hwstate()
2140 ((uint64_t)irq->priority << ICH_LR_EL2_PRIO_SHIFT) | in vgic_v3_flush_hwstate()
2141 irq->irq; in vgic_v3_flush_hwstate()
2143 if (irq->active) { in vgic_v3_flush_hwstate()
2150 if ((irq->config & _MASK) == LEVEL) in vgic_v3_flush_hwstate()
2154 if (!irq->active && vgic_v3_irq_pending(irq)) { in vgic_v3_flush_hwstate()
2163 if ((irq->config & VGIC_CONFIG_MASK) == in vgic_v3_flush_hwstate()
2165 irq->pending = false; in vgic_v3_flush_hwstate()
2181 struct vgic_v3_irq *irq; in vgic_v3_sync_hwstate() local
2200 irq = vgic_v3_get_irq(hypctx->hyp, vcpu_vcpuid(hypctx->vcpu), in vgic_v3_sync_hwstate()
2202 if (irq == NULL) in vgic_v3_sync_hwstate()
2205 irq->active = (lr & ICH_LR_EL2_STATE_ACTIVE) != 0; in vgic_v3_sync_hwstate()
2207 if ((irq->config & VGIC_CONFIG_MASK) == VGIC_CONFIG_EDGE) { in vgic_v3_sync_hwstate()
2213 irq->pending = true; in vgic_v3_sync_hwstate()
2223 irq->pending = false; in vgic_v3_sync_hwstate()
2229 if (irq->active) { in vgic_v3_sync_hwstate()
2231 TAILQ_REMOVE(&vgic_cpu->irq_act_pend, irq, in vgic_v3_sync_hwstate()
2233 TAILQ_INSERT_HEAD(&vgic_cpu->irq_act_pend, irq, in vgic_v3_sync_hwstate()
2235 } else if (!vgic_v3_irq_pending(irq)) { in vgic_v3_sync_hwstate()
2237 TAILQ_REMOVE(&vgic_cpu->irq_act_pend, irq, in vgic_v3_sync_hwstate()
2239 irq->on_aplist = false; in vgic_v3_sync_hwstate()
2242 vgic_v3_release_irq(irq); in vgic_v3_sync_hwstate()