Lines Matching refs:dev
43 mt76_wmac_spi_read(struct mt7915_dev *dev, u8 adie, u32 addr, u32 *val) in mt76_wmac_spi_read() argument
50 dev, MT_TOP_SPI_BUSY_CR(adie)); in mt76_wmac_spi_read()
54 mt76_wr(dev, MT_TOP_SPI_ADDR_CR(adie), in mt76_wmac_spi_read()
56 mt76_wr(dev, MT_TOP_SPI_WRITE_DATA_CR(adie), 0); in mt76_wmac_spi_read()
60 dev, MT_TOP_SPI_BUSY_CR(adie)); in mt76_wmac_spi_read()
64 *val = mt76_rr(dev, MT_TOP_SPI_READ_DATA_CR(adie)); in mt76_wmac_spi_read()
70 mt76_wmac_spi_write(struct mt7915_dev *dev, u8 adie, u32 addr, u32 val) in mt76_wmac_spi_write() argument
77 dev, MT_TOP_SPI_BUSY_CR(adie)); in mt76_wmac_spi_write()
81 mt76_wr(dev, MT_TOP_SPI_ADDR_CR(adie), in mt76_wmac_spi_write()
83 mt76_wr(dev, MT_TOP_SPI_WRITE_DATA_CR(adie), val); in mt76_wmac_spi_write()
87 dev, MT_TOP_SPI_BUSY_CR(adie)); in mt76_wmac_spi_write()
91 mt76_wmac_spi_rmw(struct mt7915_dev *dev, u8 adie, in mt76_wmac_spi_rmw() argument
96 ret = mt76_wmac_spi_read(dev, adie, addr, &cur); in mt76_wmac_spi_rmw()
103 return mt76_wmac_spi_write(dev, adie, addr, cur); in mt76_wmac_spi_rmw()
107 mt7986_wmac_adie_efuse_read(struct mt7915_dev *dev, u8 adie, in mt7986_wmac_adie_efuse_read() argument
113 ret = mt76_wmac_spi_write(dev, adie, MT_ADIE_EFUSE_CFG, in mt7986_wmac_adie_efuse_read()
118 ret = mt76_wmac_spi_rmw(dev, adie, MT_ADIE_EFUSE2_CTRL, BIT(30), 0x0); in mt7986_wmac_adie_efuse_read()
127 ret = mt76_wmac_spi_rmw(dev, adie, MT_ADIE_EFUSE2_CTRL, mask, val); in mt7986_wmac_adie_efuse_read()
134 dev, adie, MT_ADIE_EFUSE2_CTRL, &val); in mt7986_wmac_adie_efuse_read()
138 ret = mt76_wmac_spi_read(dev, adie, MT_ADIE_EFUSE2_CTRL, &val); in mt7986_wmac_adie_efuse_read()
143 ret = mt76_wmac_spi_read(dev, adie, MT_ADIE_EFUSE_RDATA0, in mt7986_wmac_adie_efuse_read()
149 static inline void mt76_wmac_spi_lock(struct mt7915_dev *dev) in mt76_wmac_spi_lock() argument
155 1000, 1000 * MSEC_PER_SEC, false, dev, in mt76_wmac_spi_lock()
159 static inline void mt76_wmac_spi_unlock(struct mt7915_dev *dev) in mt76_wmac_spi_unlock() argument
161 mt76_wr(dev, MT_SEMA_RFSPI_RELEASE, 1); in mt76_wmac_spi_unlock()
172 static u8 mt798x_wmac_check_adie_type(struct mt7915_dev *dev) in mt798x_wmac_check_adie_type() argument
177 if (is_mt7981(&dev->mt76)) in mt798x_wmac_check_adie_type()
180 val = readl(dev->sku + MT_TOP_POS_SKU); in mt798x_wmac_check_adie_type()
185 static int mt7986_wmac_consys_reset(struct mt7915_dev *dev, bool enable) in mt7986_wmac_consys_reset() argument
188 return reset_control_assert(dev->rstc); in mt7986_wmac_consys_reset()
190 mt76_wmac_rmw(dev->sku, MT_TOP_POS_FAST_CTRL, in mt7986_wmac_consys_reset()
194 return reset_control_deassert(dev->rstc); in mt7986_wmac_consys_reset()
197 static int mt7986_wmac_gpio_setup(struct mt7915_dev *dev) in mt7986_wmac_gpio_setup() argument
204 type = mt798x_wmac_check_adie_type(dev); in mt7986_wmac_gpio_setup()
205 pinctrl = devm_pinctrl_get(dev->mt76.dev); in mt7986_wmac_gpio_setup()
233 static int mt7986_wmac_consys_lockup(struct mt7915_dev *dev, bool enable) in mt7986_wmac_consys_lockup() argument
238 mt76_wmac_rmw(dev->dcm, MT_INFRACFG_AP2CONN_SLPPROT, in mt7986_wmac_consys_lockup()
243 dev->dcm + MT_INFRACFG_AP2CONN_SLPPROT); in mt7986_wmac_consys_lockup()
247 mt76_wmac_rmw(dev->dcm, MT_INFRACFG_AP2CONN_SLPPROT, in mt7986_wmac_consys_lockup()
252 dev->dcm + MT_INFRACFG_AP2CONN_SLPPROT); in mt7986_wmac_consys_lockup()
256 mt76_wmac_rmw(dev->dcm, MT_INFRACFG_CONN2AP_SLPPROT, in mt7986_wmac_consys_lockup()
259 mt76_wmac_rmw(dev->dcm, MT_INFRACFG_CONN2AP_SLPPROT, in mt7986_wmac_consys_lockup()
266 static int mt798x_wmac_coninfra_check(struct mt7915_dev *dev) in mt798x_wmac_coninfra_check() argument
271 if (is_mt7981(&dev->mt76)) { in mt798x_wmac_coninfra_check()
273 } else if (is_mt7986(&dev->mt76)) { in mt798x_wmac_coninfra_check()
282 false, dev, MT_CONN_INFRA_BASE); in mt798x_wmac_coninfra_check()
285 static int mt798x_wmac_coninfra_setup(struct mt7915_dev *dev) in mt798x_wmac_coninfra_setup() argument
287 struct device *pdev = dev->mt76.dev; in mt798x_wmac_coninfra_setup()
303 if (is_mt7986(&dev->mt76)) { in mt798x_wmac_coninfra_setup()
305 mt76_rmw_field(dev, MT_INFRA_CKGEN_BUS, in mt798x_wmac_coninfra_setup()
307 mt76_rmw_field(dev, MT_INFRA_CKGEN_BUS, in mt798x_wmac_coninfra_setup()
311 mt76_rmw_field(dev, MT_TOP_MCU_EMI_BASE, in mt798x_wmac_coninfra_setup()
314 if (is_mt7981(&dev->mt76)) { in mt798x_wmac_coninfra_setup()
315 mt76_rmw_field(dev, MT_TOP_WF_AP_PERI_BASE, in mt798x_wmac_coninfra_setup()
318 mt76_rmw_field(dev, MT_TOP_EFUSE_BASE, in mt798x_wmac_coninfra_setup()
322 mt76_wr(dev, MT_INFRA_BUS_EMI_START, rmem->base); in mt798x_wmac_coninfra_setup()
323 mt76_wr(dev, MT_INFRA_BUS_EMI_END, rmem->size); in mt798x_wmac_coninfra_setup()
325 mt76_rr(dev, MT_CONN_INFRA_EFUSE); in mt798x_wmac_coninfra_setup()
328 mt76_wr(dev, MT_TOP_RGU_SYSRAM_PDN, 0); in mt798x_wmac_coninfra_setup()
329 mt76_wr(dev, MT_TOP_RGU_SYSRAM_SLP, 1); in mt798x_wmac_coninfra_setup()
334 static int mt798x_wmac_sku_setup(struct mt7915_dev *dev, u32 *adie_type) in mt798x_wmac_sku_setup() argument
339 mt76_rmw_field(dev, MT_CONN_INFRA_ADIE_RESET, in mt798x_wmac_sku_setup()
342 if (is_mt7986(&dev->mt76)) { in mt798x_wmac_sku_setup()
343 mt76_rmw_field(dev, MT_CONN_INFRA_ADIE_RESET, in mt798x_wmac_sku_setup()
347 mt76_wmac_spi_lock(dev); in mt798x_wmac_sku_setup()
349 ret = mt76_wmac_spi_read(dev, 0, MT_ADIE_CHIP_ID, &adie_main); in mt798x_wmac_sku_setup()
353 if (is_mt7986(&dev->mt76)) { in mt798x_wmac_sku_setup()
354 ret = mt76_wmac_spi_read(dev, 1, MT_ADIE_CHIP_ID, &adie_ext); in mt798x_wmac_sku_setup()
363 mt76_wmac_spi_unlock(dev); in mt798x_wmac_sku_setup()
376 static inline bool is_7975(struct mt7915_dev *dev, u8 adie, u32 adie_type) in is_7975() argument
381 static inline bool is_7976(struct mt7915_dev *dev, u8 adie, u32 adie_type) in is_7976() argument
386 static int mt7986_wmac_adie_thermal_cal(struct mt7915_dev *dev, u8 adie) in mt7986_wmac_adie_thermal_cal() argument
391 ret = mt7986_wmac_adie_efuse_read(dev, adie, MT_ADIE_THADC_ANALOG, in mt7986_wmac_adie_thermal_cal()
395 ret = mt76_wmac_spi_rmw(dev, adie, MT_ADIE_RG_TOP_THADC_BG, in mt7986_wmac_adie_thermal_cal()
402 ret = mt76_wmac_spi_rmw(dev, adie, MT_ADIE_RG_TOP_THADC, in mt7986_wmac_adie_thermal_cal()
409 ret = mt7986_wmac_adie_efuse_read(dev, adie, MT_ADIE_THADC_SLOP, in mt7986_wmac_adie_thermal_cal()
414 return mt76_wmac_spi_rmw(dev, adie, MT_ADIE_RG_TOP_THADC, in mt7986_wmac_adie_thermal_cal()
423 mt7986_read_efuse_xo_trim_7976(struct mt7915_dev *dev, u8 adie, in mt7986_read_efuse_xo_trim_7976() argument
430 ret = mt7986_wmac_adie_efuse_read(dev, adie, addr, &data); in mt7986_read_efuse_xo_trim_7976()
440 ret = mt7986_wmac_adie_efuse_read(dev, adie, addr, &data); in mt7986_read_efuse_xo_trim_7976()
456 static int mt7986_wmac_adie_xtal_trim_7976(struct mt7915_dev *dev, u8 adie) in mt7986_wmac_adie_xtal_trim_7976() argument
461 ret = mt7986_wmac_adie_efuse_read(dev, adie, MT_ADIE_XO_TRIM_FLOW, in mt7986_wmac_adie_xtal_trim_7976()
466 ret = mt7986_read_efuse_xo_trim_7976(dev, adie, false, &trim_80m); in mt7986_wmac_adie_xtal_trim_7976()
470 ret = mt7986_read_efuse_xo_trim_7976(dev, adie, true, &trim_40m); in mt7986_wmac_adie_xtal_trim_7976()
474 ret = mt76_wmac_spi_read(dev, adie, MT_ADIE_RG_STRAP_PIN_IN, &val); in mt7986_wmac_adie_xtal_trim_7976()
480 ret = mt76_wmac_spi_rmw(dev, adie, MT_ADIE_XTAL_C1, in mt7986_wmac_adie_xtal_trim_7976()
486 ret = mt76_wmac_spi_rmw(dev, adie, MT_ADIE_XTAL_C2, in mt7986_wmac_adie_xtal_trim_7976()
490 ret = mt76_wmac_spi_rmw(dev, adie, MT_ADIE_XTAL_C1, in mt7986_wmac_adie_xtal_trim_7976()
496 ret = mt76_wmac_spi_rmw(dev, adie, MT_ADIE_XTAL_C2, in mt7986_wmac_adie_xtal_trim_7976()
504 static int mt798x_wmac_adie_patch_7976(struct mt7915_dev *dev, u8 adie) in mt798x_wmac_adie_patch_7976() argument
509 ret = mt76_wmac_spi_read(dev, adie, MT_ADIE_CHIP_ID, &id); in mt798x_wmac_adie_patch_7976()
515 ret = mt76_wmac_spi_write(dev, adie, MT_ADIE_RG_TOP_THADC, 0x4a563b00); in mt798x_wmac_adie_patch_7976()
523 if (is_mt7981(&dev->mt76)) { in mt798x_wmac_adie_patch_7976()
525 } else if (is_mt7986(&dev->mt76)) { in mt798x_wmac_adie_patch_7976()
534 ret = mt76_wmac_spi_write(dev, adie, MT_ADIE_RG_XO_01, rg_xo_01); in mt798x_wmac_adie_patch_7976()
538 return mt76_wmac_spi_write(dev, adie, MT_ADIE_RG_XO_03, rg_xo_03); in mt798x_wmac_adie_patch_7976()
542 mt7986_read_efuse_xo_trim_7975(struct mt7915_dev *dev, u8 adie, in mt7986_read_efuse_xo_trim_7975() argument
548 ret = mt7986_wmac_adie_efuse_read(dev, adie, addr, &data); in mt7986_read_efuse_xo_trim_7975()
564 static int mt7986_wmac_adie_xtal_trim_7975(struct mt7915_dev *dev, u8 adie) in mt7986_wmac_adie_xtal_trim_7975() argument
569 ret = mt7986_wmac_adie_efuse_read(dev, adie, MT_ADIE_7975_XTAL_EN, in mt7986_wmac_adie_xtal_trim_7975()
574 ret = mt7986_wmac_adie_efuse_read(dev, adie, MT_ADIE_7975_XTAL_CAL, in mt7986_wmac_adie_xtal_trim_7975()
582 ret = mt7986_read_efuse_xo_trim_7975(dev, adie, MT_ADIE_7975_XO_TRIM2, in mt7986_wmac_adie_xtal_trim_7975()
587 ret = mt7986_read_efuse_xo_trim_7975(dev, adie, MT_ADIE_7975_XO_TRIM3, in mt7986_wmac_adie_xtal_trim_7975()
592 ret = mt7986_read_efuse_xo_trim_7975(dev, adie, MT_ADIE_7975_XO_TRIM4, in mt7986_wmac_adie_xtal_trim_7975()
600 ret = mt76_wmac_spi_rmw(dev, adie, MT_ADIE_7975_XO_CTRL2, in mt7986_wmac_adie_xtal_trim_7975()
605 ret = mt76_wmac_spi_read(dev, adie, MT_ADIE_7975_XTAL, &value); in mt7986_wmac_adie_xtal_trim_7975()
610 ret = mt76_wmac_spi_rmw(dev, adie, MT_ADIE_7975_XO_2, in mt7986_wmac_adie_xtal_trim_7975()
616 return mt76_wmac_spi_rmw(dev, adie, MT_ADIE_7975_XO_CTRL6, in mt7986_wmac_adie_xtal_trim_7975()
620 static int mt7986_wmac_adie_patch_7975(struct mt7915_dev *dev, u8 adie) in mt7986_wmac_adie_patch_7975() argument
625 ret = mt76_wmac_spi_write(dev, adie, 0x348, 0x00000002); in mt7986_wmac_adie_patch_7975()
629 ret = mt76_wmac_spi_write(dev, adie, 0x378, 0x00000002); in mt7986_wmac_adie_patch_7975()
633 ret = mt76_wmac_spi_write(dev, adie, 0x3a8, 0x00000002); in mt7986_wmac_adie_patch_7975()
637 ret = mt76_wmac_spi_write(dev, adie, 0x3d8, 0x00000002); in mt7986_wmac_adie_patch_7975()
642 ret = mt76_wmac_spi_write(dev, adie, 0xa1c, 0x30000aaa); in mt7986_wmac_adie_patch_7975()
647 ret = mt76_wmac_spi_write(dev, adie, 0xa84, 0x8470008a); in mt7986_wmac_adie_patch_7975()
652 if (is_mt7981(&dev->mt76)) { in mt7986_wmac_adie_patch_7975()
653 ret = mt76_wmac_spi_write(dev, adie, 0x074, 0x00000007); in mt7986_wmac_adie_patch_7975()
654 } else if (is_mt7986(&dev->mt76)) { in mt7986_wmac_adie_patch_7975()
655 ret = mt76_wmac_spi_write(dev, adie, 0x074, 0x00000002); in mt7986_wmac_adie_patch_7975()
665 ret = mt76_wmac_spi_write(dev, adie, 0xaa4, 0x01001fc0); in mt7986_wmac_adie_patch_7975()
670 ret = mt76_wmac_spi_write(dev, adie, 0x070, 0x00000005); in mt7986_wmac_adie_patch_7975()
675 ret = mt76_wmac_spi_write(dev, adie, 0x344, 0x00000088); in mt7986_wmac_adie_patch_7975()
679 ret = mt76_wmac_spi_write(dev, adie, 0x374, 0x00000088); in mt7986_wmac_adie_patch_7975()
683 ret = mt76_wmac_spi_write(dev, adie, 0x3a4, 0x00000088); in mt7986_wmac_adie_patch_7975()
687 ret = mt76_wmac_spi_write(dev, adie, 0x3d4, 0x00000088); in mt7986_wmac_adie_patch_7975()
692 ret = mt76_wmac_spi_write(dev, adie, 0xa80, 0x44d07000); in mt7986_wmac_adie_patch_7975()
697 ret = mt76_wmac_spi_write(dev, adie, 0xa88, 0x3900aaaa); in mt7986_wmac_adie_patch_7975()
702 ret = mt76_wmac_spi_write(dev, adie, 0x2c4, 0x00000000); in mt7986_wmac_adie_patch_7975()
707 if (is_mt7986(&dev->mt76)) in mt7986_wmac_adie_patch_7975()
708 return mt76_wmac_spi_write(dev, adie, 0x2c8, 0x00000072); in mt7986_wmac_adie_patch_7975()
713 static int mt7986_wmac_adie_cfg(struct mt7915_dev *dev, u8 adie, u32 adie_type) in mt7986_wmac_adie_cfg() argument
717 mt76_wmac_spi_lock(dev); in mt7986_wmac_adie_cfg()
718 ret = mt76_wmac_spi_write(dev, adie, MT_ADIE_CLK_EN, ~0); in mt7986_wmac_adie_cfg()
722 if (is_7975(dev, adie, adie_type)) { in mt7986_wmac_adie_cfg()
723 ret = mt76_wmac_spi_rmw(dev, adie, MT_ADIE_7975_COCLK, in mt7986_wmac_adie_cfg()
728 ret = mt7986_wmac_adie_thermal_cal(dev, adie); in mt7986_wmac_adie_cfg()
732 ret = mt7986_wmac_adie_xtal_trim_7975(dev, adie); in mt7986_wmac_adie_cfg()
736 ret = mt7986_wmac_adie_patch_7975(dev, adie); in mt7986_wmac_adie_cfg()
737 } else if (is_7976(dev, adie, adie_type)) { in mt7986_wmac_adie_cfg()
738 if (mt798x_wmac_check_adie_type(dev) == ADIE_DBDC) { in mt7986_wmac_adie_cfg()
739 ret = mt76_wmac_spi_write(dev, adie, in mt7986_wmac_adie_cfg()
745 ret = mt7986_wmac_adie_thermal_cal(dev, adie); in mt7986_wmac_adie_cfg()
749 ret = mt7986_wmac_adie_xtal_trim_7976(dev, adie); in mt7986_wmac_adie_cfg()
753 ret = mt798x_wmac_adie_patch_7976(dev, adie); in mt7986_wmac_adie_cfg()
756 mt76_wmac_spi_unlock(dev); in mt7986_wmac_adie_cfg()
762 mt7986_wmac_afe_cal(struct mt7915_dev *dev, u8 adie, bool dbdc, u32 adie_type) in mt7986_wmac_afe_cal() argument
768 mt76_wmac_spi_lock(dev); in mt7986_wmac_afe_cal()
769 if (is_7975(dev, adie, adie_type)) in mt7986_wmac_afe_cal()
770 ret = mt76_wmac_spi_write(dev, adie, in mt7986_wmac_afe_cal()
774 ret = mt76_wmac_spi_write(dev, adie, in mt7986_wmac_afe_cal()
782 mt76_rmw_field(dev, MT_AFE_DIG_EN_01(idx), in mt7986_wmac_afe_cal()
786 mt76_rmw(dev, MT_AFE_DIG_EN_01(idx), in mt7986_wmac_afe_cal()
789 mt76_rmw_field(dev, MT_AFE_DIG_EN_03(idx), in mt7986_wmac_afe_cal()
793 mt76_rmw_field(dev, MT_AFE_DIG_EN_03(idx), in mt7986_wmac_afe_cal()
802 if (is_mt7981(&dev->mt76)) in mt7986_wmac_afe_cal()
805 mt76_set(dev, MT_AFE_DIG_EN_01(idx), txcal); in mt7986_wmac_afe_cal()
808 mt76_clear(dev, MT_AFE_DIG_EN_01(idx), txcal); in mt7986_wmac_afe_cal()
809 mt76_rmw(dev, MT_AFE_DIG_EN_03(idx), in mt7986_wmac_afe_cal()
812 ret = mt76_wmac_spi_write(dev, adie, MT_AFE_RG_ENCAL_WBTAC_IF_SW, in mt7986_wmac_afe_cal()
816 mt76_wmac_spi_unlock(dev); in mt7986_wmac_afe_cal()
821 static void mt7986_wmac_subsys_pll_initial(struct mt7915_dev *dev, u8 band) in mt7986_wmac_subsys_pll_initial() argument
823 mt76_rmw(dev, MT_AFE_PLL_STB_TIME(band), in mt7986_wmac_subsys_pll_initial()
826 mt76_rmw(dev, MT_AFE_DIG_EN_02(band), in mt7986_wmac_subsys_pll_initial()
829 mt76_rmw(dev, MT_AFE_DIG_TOP_01(band), in mt7986_wmac_subsys_pll_initial()
833 static void mt7986_wmac_subsys_setting(struct mt7915_dev *dev) in mt7986_wmac_subsys_setting() argument
836 mt7986_wmac_subsys_pll_initial(dev, 0); in mt7986_wmac_subsys_setting()
837 mt7986_wmac_subsys_pll_initial(dev, 1); in mt7986_wmac_subsys_setting()
840 mt76_rmw(dev, MT_CONN_INFRA_OSC_RC_EN, in mt7986_wmac_subsys_setting()
842 mt76_rmw(dev, MT_CONN_INFRA_OSC_CTRL, in mt7986_wmac_subsys_setting()
846 mt76_rmw(dev, MT_TOP_WFSYS_PWR, in mt7986_wmac_subsys_setting()
851 static int mt7986_wmac_bus_timeout(struct mt7915_dev *dev) in mt7986_wmac_bus_timeout() argument
853 mt76_rmw_field(dev, MT_INFRA_BUS_OFF_TIMEOUT, in mt7986_wmac_bus_timeout()
856 mt76_rmw_field(dev, MT_INFRA_BUS_OFF_TIMEOUT, in mt7986_wmac_bus_timeout()
859 mt76_rmw_field(dev, MT_INFRA_BUS_ON_TIMEOUT, in mt7986_wmac_bus_timeout()
862 mt76_rmw_field(dev, MT_INFRA_BUS_ON_TIMEOUT, in mt7986_wmac_bus_timeout()
865 return mt798x_wmac_coninfra_check(dev); in mt7986_wmac_bus_timeout()
868 static void mt7986_wmac_clock_enable(struct mt7915_dev *dev, u32 adie_type) in mt7986_wmac_clock_enable() argument
872 mt76_rmw_field(dev, MT_INFRA_CKGEN_BUS_WPLL_DIV_1, in mt7986_wmac_clock_enable()
875 mt76_rmw_field(dev, MT_INFRA_CKGEN_BUS_WPLL_DIV_2, in mt7986_wmac_clock_enable()
878 mt76_rmw_field(dev, MT_INFRA_CKGEN_BUS_WPLL_DIV_1, in mt7986_wmac_clock_enable()
881 mt76_rmw_field(dev, MT_INFRA_CKGEN_BUS_WPLL_DIV_2, in mt7986_wmac_clock_enable()
884 mt76_rmw_field(dev, MT_INFRA_CKGEN_RFSPI_WPLL_DIV, in mt7986_wmac_clock_enable()
887 mt76_rmw_field(dev, MT_INFRA_CKGEN_RFSPI_WPLL_DIV, in mt7986_wmac_clock_enable()
890 mt76_rmw_field(dev, MT_INFRA_CKGEN_BUS, in mt7986_wmac_clock_enable()
893 mt76_rmw_field(dev, MT_CONN_INFRA_HW_CTRL, in mt7986_wmac_clock_enable()
896 mt76_rmw(dev, MT_TOP_CONN_INFRA_WAKEUP, in mt7986_wmac_clock_enable()
901 mt76_wmac_spi_lock(dev); in mt7986_wmac_clock_enable()
902 if (is_7975(dev, 0, adie_type) || is_7976(dev, 0, adie_type)) { in mt7986_wmac_clock_enable()
903 mt76_rmw_field(dev, MT_ADIE_SLP_CTRL_CK0(0), in mt7986_wmac_clock_enable()
908 dev, MT_ADIE_SLP_CTRL_CK0(0)); in mt7986_wmac_clock_enable()
910 if (is_7975(dev, 1, adie_type) || is_7976(dev, 1, adie_type)) { in mt7986_wmac_clock_enable()
911 mt76_rmw_field(dev, MT_ADIE_SLP_CTRL_CK0(1), in mt7986_wmac_clock_enable()
916 dev, MT_ADIE_SLP_CTRL_CK0(0)); in mt7986_wmac_clock_enable()
918 mt76_wmac_spi_unlock(dev); in mt7986_wmac_clock_enable()
920 mt76_rmw(dev, MT_TOP_CONN_INFRA_WAKEUP, in mt7986_wmac_clock_enable()
925 static int mt7986_wmac_top_wfsys_wakeup(struct mt7915_dev *dev, bool enable) in mt7986_wmac_top_wfsys_wakeup() argument
927 mt76_rmw_field(dev, MT_TOP_WFSYS_WAKEUP, in mt7986_wmac_top_wfsys_wakeup()
935 return mt798x_wmac_coninfra_check(dev); in mt7986_wmac_top_wfsys_wakeup()
938 static int mt7986_wmac_wm_enable(struct mt7915_dev *dev, bool enable) in mt7986_wmac_wm_enable() argument
942 if (is_mt7986(&dev->mt76)) in mt7986_wmac_wm_enable()
943 mt76_wr(dev, MT_CONNINFRA_SKU_DEC_ADDR, 0); in mt7986_wmac_wm_enable()
945 mt76_rmw_field(dev, MT7986_TOP_WM_RESET, in mt7986_wmac_wm_enable()
952 dev, MT_TOP_CFG_ON_ROM_IDX); in mt7986_wmac_wm_enable()
955 static int mt7986_wmac_wfsys_poweron(struct mt7915_dev *dev, bool enable) in mt7986_wmac_wfsys_poweron() argument
960 mt76_rmw(dev, MT_TOP_WFSYS_PWR, mask, in mt7986_wmac_wfsys_poweron()
966 dev, MT_TOP_WFSYS_RESET_STATUS); in mt7986_wmac_wfsys_poweron()
969 static int mt7986_wmac_wfsys_setting(struct mt7915_dev *dev) in mt7986_wmac_wfsys_setting() argument
975 mt76_rmw(dev, MT_CONN_INFRA_WF_SLP_PROT, in mt7986_wmac_wfsys_setting()
978 ret = mt7986_wmac_wfsys_poweron(dev, true); in mt7986_wmac_wfsys_setting()
987 dev, MT_CONN_INFRA_WF_SLP_PROT_RDY); in mt7986_wmac_wfsys_setting()
993 dev, MT_SLP_STATUS); in mt7986_wmac_wfsys_setting()
999 dev, MT_TOP_CFG_IP_VERSION_ADDR); in mt7986_wmac_wfsys_setting()
1002 static void mt7986_wmac_wfsys_set_timeout(struct mt7915_dev *dev) in mt7986_wmac_wfsys_set_timeout() argument
1011 mt76_rmw(dev, MT_MCU_BUS_TIMEOUT, mask, val); in mt7986_wmac_wfsys_set_timeout()
1013 mt76_wr(dev, MT_MCU_BUS_REMAP, 0x810f0000); in mt7986_wmac_wfsys_set_timeout()
1022 mt76_rmw(dev, MT_MCU_BUS_DBG_TIMEOUT, mask, val); in mt7986_wmac_wfsys_set_timeout()
1025 static int mt7986_wmac_sku_update(struct mt7915_dev *dev, u32 adie_type) in mt7986_wmac_sku_update() argument
1029 if (is_7976(dev, 0, adie_type) && is_7976(dev, 1, adie_type)) in mt7986_wmac_sku_update()
1031 else if (is_7975(dev, 0, adie_type) && is_7975(dev, 1, adie_type)) in mt7986_wmac_sku_update()
1033 else if (is_7976(dev, 0, adie_type)) in mt7986_wmac_sku_update()
1035 else if (is_7975(dev, 1, adie_type)) in mt7986_wmac_sku_update()
1037 else if (is_7976(dev, 1, adie_type)) in mt7986_wmac_sku_update()
1042 mt76_wmac_rmw(dev->sku, MT_TOP_POS_SKU, MT_TOP_POS_SKU_MASK, in mt7986_wmac_sku_update()
1045 mt76_wr(dev, MT_CONNINFRA_SKU_DEC_ADDR, val); in mt7986_wmac_sku_update()
1051 mt7986_wmac_adie_setup(struct mt7915_dev *dev, u8 adie, u32 adie_type) in mt7986_wmac_adie_setup() argument
1055 if (!(is_7975(dev, adie, adie_type) || is_7976(dev, adie, adie_type))) in mt7986_wmac_adie_setup()
1058 ret = mt7986_wmac_adie_cfg(dev, adie, adie_type); in mt7986_wmac_adie_setup()
1062 ret = mt7986_wmac_afe_cal(dev, adie, false, adie_type); in mt7986_wmac_adie_setup()
1066 if (!adie && (mt798x_wmac_check_adie_type(dev) == ADIE_DBDC)) in mt7986_wmac_adie_setup()
1067 ret = mt7986_wmac_afe_cal(dev, adie, true, adie_type); in mt7986_wmac_adie_setup()
1072 static int mt7986_wmac_subsys_powerup(struct mt7915_dev *dev, u32 adie_type) in mt7986_wmac_subsys_powerup() argument
1076 mt7986_wmac_subsys_setting(dev); in mt7986_wmac_subsys_powerup()
1078 ret = mt7986_wmac_bus_timeout(dev); in mt7986_wmac_subsys_powerup()
1082 mt7986_wmac_clock_enable(dev, adie_type); in mt7986_wmac_subsys_powerup()
1087 static int mt7986_wmac_wfsys_powerup(struct mt7915_dev *dev) in mt7986_wmac_wfsys_powerup() argument
1091 ret = mt7986_wmac_wm_enable(dev, false); in mt7986_wmac_wfsys_powerup()
1095 ret = mt7986_wmac_wfsys_setting(dev); in mt7986_wmac_wfsys_powerup()
1099 mt7986_wmac_wfsys_set_timeout(dev); in mt7986_wmac_wfsys_powerup()
1101 return mt7986_wmac_wm_enable(dev, true); in mt7986_wmac_wfsys_powerup()
1104 int mt7986_wmac_enable(struct mt7915_dev *dev) in mt7986_wmac_enable() argument
1109 ret = mt7986_wmac_consys_reset(dev, true); in mt7986_wmac_enable()
1113 ret = mt7986_wmac_gpio_setup(dev); in mt7986_wmac_enable()
1117 ret = mt7986_wmac_consys_lockup(dev, false); in mt7986_wmac_enable()
1121 ret = mt798x_wmac_coninfra_check(dev); in mt7986_wmac_enable()
1125 ret = mt798x_wmac_coninfra_setup(dev); in mt7986_wmac_enable()
1129 ret = mt798x_wmac_sku_setup(dev, &adie_type); in mt7986_wmac_enable()
1133 ret = mt7986_wmac_adie_setup(dev, 0, adie_type); in mt7986_wmac_enable()
1138 if (is_mt7986(&dev->mt76)) { in mt7986_wmac_enable()
1139 ret = mt7986_wmac_adie_setup(dev, 1, adie_type); in mt7986_wmac_enable()
1144 ret = mt7986_wmac_subsys_powerup(dev, adie_type); in mt7986_wmac_enable()
1148 ret = mt7986_wmac_top_wfsys_wakeup(dev, true); in mt7986_wmac_enable()
1152 ret = mt7986_wmac_wfsys_powerup(dev); in mt7986_wmac_enable()
1156 return mt7986_wmac_sku_update(dev, adie_type); in mt7986_wmac_enable()
1159 void mt7986_wmac_disable(struct mt7915_dev *dev) in mt7986_wmac_disable() argument
1163 mt7986_wmac_top_wfsys_wakeup(dev, true); in mt7986_wmac_disable()
1166 mt76_rmw_field(dev, MT_CONN_INFRA_WF_SLP_PROT, in mt7986_wmac_disable()
1172 dev, MT_CONN_INFRA_WF_SLP_PROT_RDY); in mt7986_wmac_disable()
1174 mt7986_wmac_wfsys_poweron(dev, false); in mt7986_wmac_disable()
1177 mt76_rmw_field(dev, MT_AFE_DIG_EN_02(0), MT_AFE_MCU_BPLL_CFG_MASK, 0x2); in mt7986_wmac_disable()
1178 mt76_rmw_field(dev, MT_AFE_DIG_EN_02(0), MT_AFE_WPLL_CFG_MASK, 0x2); in mt7986_wmac_disable()
1181 mt76_rmw_field(dev, MT_CONN_INFRA_EMI_REQ, in mt7986_wmac_disable()
1183 mt76_rmw_field(dev, MT_CONN_INFRA_EMI_REQ, in mt7986_wmac_disable()
1185 mt76_rmw_field(dev, MT_CONN_INFRA_EMI_REQ, in mt7986_wmac_disable()
1187 mt76_rmw_field(dev, MT_CONN_INFRA_EMI_REQ, in mt7986_wmac_disable()
1190 mt7986_wmac_top_wfsys_wakeup(dev, false); in mt7986_wmac_disable()
1191 mt7986_wmac_consys_lockup(dev, true); in mt7986_wmac_disable()
1192 mt7986_wmac_consys_reset(dev, false); in mt7986_wmac_disable()
1195 static int mt798x_wmac_init(struct mt7915_dev *dev) in mt798x_wmac_init() argument
1197 struct device *pdev = dev->mt76.dev; in mt798x_wmac_init()
1213 dev->dcm = devm_platform_ioremap_resource(pfdev, 1); in mt798x_wmac_init()
1214 if (IS_ERR(dev->dcm)) in mt798x_wmac_init()
1215 return PTR_ERR(dev->dcm); in mt798x_wmac_init()
1217 dev->sku = devm_platform_ioremap_resource(pfdev, 2); in mt798x_wmac_init()
1218 if (IS_ERR(dev->sku)) in mt798x_wmac_init()
1219 return PTR_ERR(dev->sku); in mt798x_wmac_init()
1221 dev->rstc = devm_reset_control_get(pdev, "consys"); in mt798x_wmac_init()
1222 if (IS_ERR(dev->rstc)) in mt798x_wmac_init()
1223 return PTR_ERR(dev->rstc); in mt798x_wmac_init()
1231 struct mt7915_dev *dev; in mt798x_wmac_probe() local
1236 chip_id = (uintptr_t)of_device_get_match_data(&pdev->dev); in mt798x_wmac_probe()
1240 dev_err(&pdev->dev, "Failed to get memory resource\n"); in mt798x_wmac_probe()
1244 dev = mt7915_mmio_probe(&pdev->dev, mem_base, chip_id); in mt798x_wmac_probe()
1245 if (IS_ERR(dev)) in mt798x_wmac_probe()
1246 return PTR_ERR(dev); in mt798x_wmac_probe()
1248 mdev = &dev->mt76; in mt798x_wmac_probe()
1249 ret = mt7915_mmio_wed_init(dev, pdev, false, &irq); in mt798x_wmac_probe()
1261 ret = devm_request_irq(mdev->dev, irq, mt7915_irq_handler, in mt798x_wmac_probe()
1262 IRQF_SHARED, KBUILD_MODNAME, dev); in mt798x_wmac_probe()
1266 ret = mt798x_wmac_init(dev); in mt798x_wmac_probe()
1270 mt7915_wfsys_reset(dev); in mt798x_wmac_probe()
1272 ret = mt7915_register_device(dev); in mt798x_wmac_probe()
1279 devm_free_irq(mdev->dev, irq, dev); in mt798x_wmac_probe()
1290 struct mt7915_dev *dev = platform_get_drvdata(pdev); in mt798x_wmac_remove() local
1292 mt7915_unregister_device(dev); in mt798x_wmac_remove()