176 zynqmp_firmware_clock_enable(device_t dev, uint32_t clkid)  in zynqmp_firmware_clock_enable()  argument
183 	rv = zynqmp_call_smc(PM_CLOCK_ENABLE, clkid, 0, 0, 0, payload, false);  in zynqmp_firmware_clock_enable()
190 zynqmp_firmware_clock_disable(device_t dev, uint32_t clkid)  in zynqmp_firmware_clock_disable()  argument
197 	rv = zynqmp_call_smc(PM_CLOCK_DISABLE, clkid, 0, 0, 0, payload, false);  in zynqmp_firmware_clock_disable()
204 zynqmp_firmware_clock_getstate(device_t dev, uint32_t clkid, bool *enabled)  in zynqmp_firmware_clock_getstate()  argument
211 	rv = zynqmp_call_smc(PM_CLOCK_GETSTATE, clkid, 0, 0, 0, payload, false);  in zynqmp_firmware_clock_getstate()
223 zynqmp_firmware_clock_setdivider(device_t dev, uint32_t clkid, uint32_t div)  in zynqmp_firmware_clock_setdivider()  argument
230 	rv = zynqmp_call_smc(PM_CLOCK_SETDIVIDER, clkid, div, 0, 0, payload, false);  in zynqmp_firmware_clock_setdivider()
237 zynqmp_firmware_clock_getdivider(device_t dev, uint32_t clkid, uint32_t *div)  in zynqmp_firmware_clock_getdivider()  argument
244 	rv = zynqmp_call_smc(PM_CLOCK_GETDIVIDER, clkid, 0, 0, 0, payload, false);  in zynqmp_firmware_clock_getdivider()
256 zynqmp_firmware_clock_setparent(device_t dev, uint32_t clkid, uint32_t parentid)  in zynqmp_firmware_clock_setparent()  argument
263 	rv = zynqmp_call_smc(PM_CLOCK_SETPARENT, clkid, parentid, 0, 0, payload, false);  in zynqmp_firmware_clock_setparent()
270 zynqmp_firmware_clock_getparent(device_t dev, uint32_t clkid, uint32_t *parentid)  in zynqmp_firmware_clock_getparent()  argument
277 	rv = zynqmp_call_smc(PM_CLOCK_GETPARENT, clkid, 0, 0, 0, payload, false);  in zynqmp_firmware_clock_getparent()
324 zynqmp_firmware_clock_get_fixedfactor(device_t dev, uint32_t clkid, uint32_t *mult, uint32_t *div)  in zynqmp_firmware_clock_get_fixedfactor()  argument
331 …rv = zynqmp_call_smc(PM_QUERY_DATA, PM_QID_CLOCK_GET_FIXEDFACTOR_PARAMS, clkid, 0, 0, payload, tru…  in zynqmp_firmware_clock_get_fixedfactor()