Lines Matching refs:sc
99 static int gem_add_rxbuf(struct gem_softc *sc, int idx);
100 static int gem_bitwait(struct gem_softc *sc, bus_addr_t r, uint32_t clr,
104 static int gem_disable_rx(struct gem_softc *sc);
105 static int gem_disable_tx(struct gem_softc *sc);
106 static void gem_eint(struct gem_softc *sc, u_int status);
108 static void gem_init_locked(struct gem_softc *sc);
109 static void gem_init_regs(struct gem_softc *sc);
111 static int gem_load_txmbuf(struct gem_softc *sc, struct mbuf **m_head);
112 static int gem_meminit(struct gem_softc *sc);
113 static void gem_mifinit(struct gem_softc *sc);
114 static void gem_reset(struct gem_softc *sc);
115 static int gem_reset_rx(struct gem_softc *sc);
116 static void gem_reset_rxdma(struct gem_softc *sc);
117 static int gem_reset_tx(struct gem_softc *sc);
119 static void gem_rint(struct gem_softc *sc);
124 static void gem_rxdrain(struct gem_softc *sc);
125 static void gem_setladrf(struct gem_softc *sc);
130 static void gem_tint(struct gem_softc *sc);
131 static inline void gem_txkick(struct gem_softc *sc);
132 static int gem_watchdog(struct gem_softc *sc);
143 gem_attach(struct gem_softc *sc) in gem_attach() argument
151 device_printf(sc->sc_dev, "flags=0x%x\n", sc->sc_flags); in gem_attach()
154 ifp = sc->sc_ifp = if_alloc(IFT_ETHER); in gem_attach()
157 sc->sc_csum_features = GEM_CSUM_FEATURES; in gem_attach()
158 if_setsoftc(ifp, sc); in gem_attach()
159 if_initname(ifp, device_get_name(sc->sc_dev), in gem_attach()
160 device_get_unit(sc->sc_dev)); in gem_attach()
168 callout_init_mtx(&sc->sc_tick_ch, &sc->sc_mtx, 0); in gem_attach()
170 callout_init_mtx(&sc->sc_rx_ch, &sc->sc_mtx, 0); in gem_attach()
174 gem_reset(sc); in gem_attach()
176 error = bus_dma_tag_create(bus_get_dma_tag(sc->sc_dev), 1, 0, in gem_attach()
179 NULL, &sc->sc_pdmatag); in gem_attach()
183 error = bus_dma_tag_create(sc->sc_pdmatag, 1, 0, in gem_attach()
185 1, MCLBYTES, BUS_DMA_ALLOCNOW, NULL, NULL, &sc->sc_rdmatag); in gem_attach()
189 error = bus_dma_tag_create(sc->sc_pdmatag, 1, 0, in gem_attach()
192 BUS_DMA_ALLOCNOW, NULL, NULL, &sc->sc_tdmatag); in gem_attach()
196 error = bus_dma_tag_create(sc->sc_pdmatag, PAGE_SIZE, 0, in gem_attach()
200 NULL, NULL, &sc->sc_cdmatag); in gem_attach()
208 if ((error = bus_dmamem_alloc(sc->sc_cdmatag, in gem_attach()
209 (void **)&sc->sc_control_data, in gem_attach()
211 &sc->sc_cddmamap)) != 0) { in gem_attach()
212 device_printf(sc->sc_dev, in gem_attach()
217 sc->sc_cddma = 0; in gem_attach()
218 if ((error = bus_dmamap_load(sc->sc_cdmatag, sc->sc_cddmamap, in gem_attach()
219 sc->sc_control_data, sizeof(struct gem_control_data), in gem_attach()
220 gem_cddma_callback, sc, 0)) != 0 || sc->sc_cddma == 0) { in gem_attach()
221 device_printf(sc->sc_dev, in gem_attach()
230 STAILQ_INIT(&sc->sc_txfreeq); in gem_attach()
231 STAILQ_INIT(&sc->sc_txdirtyq); in gem_attach()
238 txs = &sc->sc_txsoft[i]; in gem_attach()
241 if ((error = bus_dmamap_create(sc->sc_tdmatag, 0, in gem_attach()
243 device_printf(sc->sc_dev, in gem_attach()
248 STAILQ_INSERT_TAIL(&sc->sc_txfreeq, txs, txs_q); in gem_attach()
255 if ((error = bus_dmamap_create(sc->sc_rdmatag, 0, in gem_attach()
256 &sc->sc_rxsoft[i].rxs_dmamap)) != 0) { in gem_attach()
257 device_printf(sc->sc_dev, in gem_attach()
262 sc->sc_rxsoft[i].rxs_mbuf = NULL; in gem_attach()
266 if ((sc->sc_flags & GEM_SERDES) != 0) in gem_attach()
269 GEM_WRITE_4(sc, GEM_MII_DATAPATH_MODE, GEM_MII_DATAPATH_MII); in gem_attach()
270 GEM_BARRIER(sc, GEM_MII_DATAPATH_MODE, 4, in gem_attach()
273 gem_mifinit(sc); in gem_attach()
279 v = GEM_READ_4(sc, GEM_MIF_CONFIG); in gem_attach()
282 GEM_WRITE_4(sc, GEM_MIF_CONFIG, v); in gem_attach()
283 GEM_BARRIER(sc, GEM_MIF_CONFIG, 4, in gem_attach()
285 error = mii_attach(sc->sc_dev, &sc->sc_miibus, ifp, in gem_attach()
296 ((v & GEM_MIF_CONFIG_MDI0) != 0 || GEM_IS_APPLE(sc))) { in gem_attach()
298 GEM_WRITE_4(sc, GEM_MIF_CONFIG, v); in gem_attach()
299 GEM_BARRIER(sc, GEM_MIF_CONFIG, 4, in gem_attach()
301 switch (sc->sc_variant) { in gem_attach()
312 error = mii_attach(sc->sc_dev, &sc->sc_miibus, ifp, in gem_attach()
320 if (error != 0 && sc->sc_variant == GEM_SUN_GEM) { in gem_attach()
322 GEM_WRITE_4(sc, GEM_MII_DATAPATH_MODE, in gem_attach()
324 GEM_BARRIER(sc, GEM_MII_DATAPATH_MODE, 4, in gem_attach()
326 GEM_WRITE_4(sc, GEM_MII_SLINK_CONTROL, in gem_attach()
328 GEM_BARRIER(sc, GEM_MII_SLINK_CONTROL, 4, in gem_attach()
330 GEM_WRITE_4(sc, GEM_MII_CONFIG, GEM_MII_CONFIG_ENABLE); in gem_attach()
331 GEM_BARRIER(sc, GEM_MII_CONFIG, 4, in gem_attach()
333 sc->sc_flags |= GEM_SERDES; in gem_attach()
334 error = mii_attach(sc->sc_dev, &sc->sc_miibus, ifp, in gem_attach()
339 device_printf(sc->sc_dev, "attaching PHYs failed\n"); in gem_attach()
342 sc->sc_mii = device_get_softc(sc->sc_miibus); in gem_attach()
351 sc->sc_rxfifosize = 64 * in gem_attach()
352 GEM_READ_4(sc, GEM_RX_FIFO_SIZE); in gem_attach()
355 v = GEM_READ_4(sc, GEM_TX_FIFO_SIZE); in gem_attach()
356 device_printf(sc->sc_dev, "%ukB RX FIFO, %ukB TX FIFO\n", in gem_attach()
357 sc->sc_rxfifosize / 1024, v / 16); in gem_attach()
360 ether_ifattach(ifp, sc->sc_enaddr); in gem_attach()
367 if_sethwassistbits(ifp, sc->sc_csum_features, 0); in gem_attach()
378 if (sc->sc_rxsoft[i].rxs_dmamap != NULL) in gem_attach()
379 bus_dmamap_destroy(sc->sc_rdmatag, in gem_attach()
380 sc->sc_rxsoft[i].rxs_dmamap); in gem_attach()
383 if (sc->sc_txsoft[i].txs_dmamap != NULL) in gem_attach()
384 bus_dmamap_destroy(sc->sc_tdmatag, in gem_attach()
385 sc->sc_txsoft[i].txs_dmamap); in gem_attach()
386 bus_dmamap_unload(sc->sc_cdmatag, sc->sc_cddmamap); in gem_attach()
388 bus_dmamem_free(sc->sc_cdmatag, sc->sc_control_data, in gem_attach()
389 sc->sc_cddmamap); in gem_attach()
391 bus_dma_tag_destroy(sc->sc_cdmatag); in gem_attach()
393 bus_dma_tag_destroy(sc->sc_tdmatag); in gem_attach()
395 bus_dma_tag_destroy(sc->sc_rdmatag); in gem_attach()
397 bus_dma_tag_destroy(sc->sc_pdmatag); in gem_attach()
404 gem_detach(struct gem_softc *sc) in gem_detach() argument
406 if_t ifp = sc->sc_ifp; in gem_detach()
410 GEM_LOCK(sc); in gem_detach()
412 GEM_UNLOCK(sc); in gem_detach()
413 callout_drain(&sc->sc_tick_ch); in gem_detach()
415 callout_drain(&sc->sc_rx_ch); in gem_detach()
418 device_delete_child(sc->sc_dev, sc->sc_miibus); in gem_detach()
421 if (sc->sc_rxsoft[i].rxs_dmamap != NULL) in gem_detach()
422 bus_dmamap_destroy(sc->sc_rdmatag, in gem_detach()
423 sc->sc_rxsoft[i].rxs_dmamap); in gem_detach()
425 if (sc->sc_txsoft[i].txs_dmamap != NULL) in gem_detach()
426 bus_dmamap_destroy(sc->sc_tdmatag, in gem_detach()
427 sc->sc_txsoft[i].txs_dmamap); in gem_detach()
428 GEM_CDSYNC(sc, BUS_DMASYNC_POSTREAD | BUS_DMASYNC_POSTWRITE); in gem_detach()
429 bus_dmamap_unload(sc->sc_cdmatag, sc->sc_cddmamap); in gem_detach()
430 bus_dmamem_free(sc->sc_cdmatag, sc->sc_control_data, in gem_detach()
431 sc->sc_cddmamap); in gem_detach()
432 bus_dma_tag_destroy(sc->sc_cdmatag); in gem_detach()
433 bus_dma_tag_destroy(sc->sc_tdmatag); in gem_detach()
434 bus_dma_tag_destroy(sc->sc_rdmatag); in gem_detach()
435 bus_dma_tag_destroy(sc->sc_pdmatag); in gem_detach()
439 gem_suspend(struct gem_softc *sc) in gem_suspend() argument
441 if_t ifp = sc->sc_ifp; in gem_suspend()
443 GEM_LOCK(sc); in gem_suspend()
445 GEM_UNLOCK(sc); in gem_suspend()
449 gem_resume(struct gem_softc *sc) in gem_resume() argument
451 if_t ifp = sc->sc_ifp; in gem_resume()
453 GEM_LOCK(sc); in gem_resume()
458 sc->sc_flags &= ~GEM_INITED; in gem_resume()
460 gem_init_locked(sc); in gem_resume()
461 GEM_UNLOCK(sc); in gem_resume()
530 struct gem_softc *sc = xsc; in gem_cddma_callback() local
536 sc->sc_cddma = segs[0].ds_addr; in gem_cddma_callback()
542 struct gem_softc *sc = arg; in gem_tick() local
543 if_t ifp = sc->sc_ifp; in gem_tick()
546 GEM_LOCK_ASSERT(sc, MA_OWNED); in gem_tick()
552 GEM_READ_4(sc, GEM_MAC_NORM_COLL_CNT) + in gem_tick()
553 GEM_READ_4(sc, GEM_MAC_FIRST_COLL_CNT)); in gem_tick()
554 v = GEM_READ_4(sc, GEM_MAC_EXCESS_COLL_CNT) + in gem_tick()
555 GEM_READ_4(sc, GEM_MAC_LATE_COLL_CNT); in gem_tick()
559 GEM_READ_4(sc, GEM_MAC_RX_LEN_ERR_CNT) + in gem_tick()
560 GEM_READ_4(sc, GEM_MAC_RX_ALIGN_ERR) + in gem_tick()
561 GEM_READ_4(sc, GEM_MAC_RX_CRC_ERR_CNT) + in gem_tick()
562 GEM_READ_4(sc, GEM_MAC_RX_CODE_VIOL)); in gem_tick()
567 GEM_WRITE_4(sc, GEM_MAC_NORM_COLL_CNT, 0); in gem_tick()
568 GEM_WRITE_4(sc, GEM_MAC_FIRST_COLL_CNT, 0); in gem_tick()
569 GEM_WRITE_4(sc, GEM_MAC_EXCESS_COLL_CNT, 0); in gem_tick()
570 GEM_WRITE_4(sc, GEM_MAC_LATE_COLL_CNT, 0); in gem_tick()
571 GEM_WRITE_4(sc, GEM_MAC_RX_LEN_ERR_CNT, 0); in gem_tick()
572 GEM_WRITE_4(sc, GEM_MAC_RX_ALIGN_ERR, 0); in gem_tick()
573 GEM_WRITE_4(sc, GEM_MAC_RX_CRC_ERR_CNT, 0); in gem_tick()
574 GEM_WRITE_4(sc, GEM_MAC_RX_CODE_VIOL, 0); in gem_tick()
576 mii_tick(sc->sc_mii); in gem_tick()
578 if (gem_watchdog(sc) == EJUSTRETURN) in gem_tick()
581 callout_reset(&sc->sc_tick_ch, hz, gem_tick, sc); in gem_tick()
585 gem_bitwait(struct gem_softc *sc, bus_addr_t r, uint32_t clr, uint32_t set) in gem_bitwait() argument
591 reg = GEM_READ_4(sc, r); in gem_bitwait()
599 gem_reset(struct gem_softc *sc) in gem_reset() argument
603 CTR2(KTR_GEM, "%s: %s", device_get_name(sc->sc_dev), __func__); in gem_reset()
605 gem_reset_rx(sc); in gem_reset()
606 gem_reset_tx(sc); in gem_reset()
609 GEM_WRITE_4(sc, GEM_RESET, GEM_RESET_RX | GEM_RESET_TX); in gem_reset()
610 GEM_BARRIER(sc, GEM_RESET, 4, in gem_reset()
612 if (!gem_bitwait(sc, GEM_RESET, GEM_RESET_RX | GEM_RESET_TX, 0)) in gem_reset()
613 device_printf(sc->sc_dev, "cannot reset device\n"); in gem_reset()
617 gem_rxdrain(struct gem_softc *sc) in gem_rxdrain() argument
623 rxs = &sc->sc_rxsoft[i]; in gem_rxdrain()
625 bus_dmamap_sync(sc->sc_rdmatag, rxs->rxs_dmamap, in gem_rxdrain()
627 bus_dmamap_unload(sc->sc_rdmatag, rxs->rxs_dmamap); in gem_rxdrain()
637 struct gem_softc *sc = if_getsoftc(ifp); in gem_stop() local
641 CTR2(KTR_GEM, "%s: %s", device_get_name(sc->sc_dev), __func__); in gem_stop()
644 callout_stop(&sc->sc_tick_ch); in gem_stop()
646 callout_stop(&sc->sc_rx_ch); in gem_stop()
649 gem_reset_tx(sc); in gem_stop()
650 gem_reset_rx(sc); in gem_stop()
655 while ((txs = STAILQ_FIRST(&sc->sc_txdirtyq)) != NULL) { in gem_stop()
656 STAILQ_REMOVE_HEAD(&sc->sc_txdirtyq, txs_q); in gem_stop()
658 bus_dmamap_sync(sc->sc_tdmatag, txs->txs_dmamap, in gem_stop()
660 bus_dmamap_unload(sc->sc_tdmatag, txs->txs_dmamap); in gem_stop()
666 STAILQ_INSERT_TAIL(&sc->sc_txfreeq, txs, txs_q); in gem_stop()
670 gem_rxdrain(sc); in gem_stop()
676 sc->sc_flags &= ~GEM_LINK; in gem_stop()
677 sc->sc_wdog_timer = 0; in gem_stop()
681 gem_reset_rx(struct gem_softc *sc) in gem_reset_rx() argument
688 (void)gem_disable_rx(sc); in gem_reset_rx()
689 GEM_WRITE_4(sc, GEM_RX_CONFIG, 0); in gem_reset_rx()
690 GEM_BARRIER(sc, GEM_RX_CONFIG, 4, in gem_reset_rx()
692 if (!gem_bitwait(sc, GEM_RX_CONFIG, GEM_RX_CONFIG_RXDMA_EN, 0)) in gem_reset_rx()
693 device_printf(sc->sc_dev, "cannot disable RX DMA\n"); in gem_reset_rx()
699 GEM_WRITE_4(sc, GEM_RESET, GEM_RESET_RX); in gem_reset_rx()
700 GEM_BARRIER(sc, GEM_RESET, 4, in gem_reset_rx()
702 if (!gem_bitwait(sc, GEM_RESET, GEM_RESET_RX, 0)) { in gem_reset_rx()
703 device_printf(sc->sc_dev, "cannot reset receiver\n"); in gem_reset_rx()
708 GEM_WRITE_4(sc, GEM_MAC_RXRESET, 1); in gem_reset_rx()
709 GEM_BARRIER(sc, GEM_MAC_RXRESET, 4, in gem_reset_rx()
711 if (!gem_bitwait(sc, GEM_MAC_RXRESET, 1, 0)) { in gem_reset_rx()
712 device_printf(sc->sc_dev, "cannot reset RX MAC\n"); in gem_reset_rx()
727 gem_reset_rxdma(struct gem_softc *sc) in gem_reset_rxdma() argument
731 if (gem_reset_rx(sc) != 0) { in gem_reset_rxdma()
732 if_setdrvflagbits(sc->sc_ifp, 0, IFF_DRV_RUNNING); in gem_reset_rxdma()
733 return (gem_init_locked(sc)); in gem_reset_rxdma()
736 if (sc->sc_rxsoft[i].rxs_mbuf != NULL) in gem_reset_rxdma()
737 GEM_UPDATE_RXDESC(sc, i); in gem_reset_rxdma()
738 sc->sc_rxptr = 0; in gem_reset_rxdma()
739 GEM_CDSYNC(sc, BUS_DMASYNC_PREREAD | BUS_DMASYNC_PREWRITE); in gem_reset_rxdma()
742 GEM_WRITE_4(sc, GEM_RX_RING_PTR_HI, 0); in gem_reset_rxdma()
743 GEM_WRITE_4(sc, GEM_RX_RING_PTR_LO, GEM_CDRXADDR(sc, 0)); in gem_reset_rxdma()
744 GEM_WRITE_4(sc, GEM_RX_KICK, GEM_NRXDESC - 4); in gem_reset_rxdma()
745 GEM_WRITE_4(sc, GEM_RX_CONFIG, in gem_reset_rxdma()
751 GEM_WRITE_4(sc, GEM_RX_BLANKING, in gem_reset_rxdma()
752 ((6 * (sc->sc_flags & GEM_PCI66) != 0 ? 2 : 1) << in gem_reset_rxdma()
754 GEM_WRITE_4(sc, GEM_RX_PAUSE_THRESH, in gem_reset_rxdma()
755 (3 * sc->sc_rxfifosize / 256) | in gem_reset_rxdma()
756 ((sc->sc_rxfifosize / 256) << 12)); in gem_reset_rxdma()
757 GEM_WRITE_4(sc, GEM_RX_CONFIG, in gem_reset_rxdma()
758 GEM_READ_4(sc, GEM_RX_CONFIG) | GEM_RX_CONFIG_RXDMA_EN); in gem_reset_rxdma()
759 GEM_WRITE_4(sc, GEM_MAC_RX_MASK, in gem_reset_rxdma()
765 gem_setladrf(sc); in gem_reset_rxdma()
769 gem_reset_tx(struct gem_softc *sc) in gem_reset_tx() argument
776 (void)gem_disable_tx(sc); in gem_reset_tx()
777 GEM_WRITE_4(sc, GEM_TX_CONFIG, 0); in gem_reset_tx()
778 GEM_BARRIER(sc, GEM_TX_CONFIG, 4, in gem_reset_tx()
780 if (!gem_bitwait(sc, GEM_TX_CONFIG, GEM_TX_CONFIG_TXDMA_EN, 0)) in gem_reset_tx()
781 device_printf(sc->sc_dev, "cannot disable TX DMA\n"); in gem_reset_tx()
787 GEM_WRITE_4(sc, GEM_RESET, GEM_RESET_TX); in gem_reset_tx()
788 GEM_BARRIER(sc, GEM_RESET, 4, in gem_reset_tx()
790 if (!gem_bitwait(sc, GEM_RESET, GEM_RESET_TX, 0)) { in gem_reset_tx()
791 device_printf(sc->sc_dev, "cannot reset transmitter\n"); in gem_reset_tx()
798 gem_disable_rx(struct gem_softc *sc) in gem_disable_rx() argument
801 GEM_WRITE_4(sc, GEM_MAC_RX_CONFIG, in gem_disable_rx()
802 GEM_READ_4(sc, GEM_MAC_RX_CONFIG) & ~GEM_MAC_RX_ENABLE); in gem_disable_rx()
803 GEM_BARRIER(sc, GEM_MAC_RX_CONFIG, 4, in gem_disable_rx()
805 if (gem_bitwait(sc, GEM_MAC_RX_CONFIG, GEM_MAC_RX_ENABLE, 0)) in gem_disable_rx()
807 device_printf(sc->sc_dev, "cannot disable RX MAC\n"); in gem_disable_rx()
812 gem_disable_tx(struct gem_softc *sc) in gem_disable_tx() argument
815 GEM_WRITE_4(sc, GEM_MAC_TX_CONFIG, in gem_disable_tx()
816 GEM_READ_4(sc, GEM_MAC_TX_CONFIG) & ~GEM_MAC_TX_ENABLE); in gem_disable_tx()
817 GEM_BARRIER(sc, GEM_MAC_TX_CONFIG, 4, in gem_disable_tx()
819 if (gem_bitwait(sc, GEM_MAC_TX_CONFIG, GEM_MAC_TX_ENABLE, 0)) in gem_disable_tx()
821 device_printf(sc->sc_dev, "cannot disable TX MAC\n"); in gem_disable_tx()
826 gem_meminit(struct gem_softc *sc) in gem_meminit() argument
831 GEM_LOCK_ASSERT(sc, MA_OWNED); in gem_meminit()
837 sc->sc_txdescs[i].gd_flags = 0; in gem_meminit()
838 sc->sc_txdescs[i].gd_addr = 0; in gem_meminit()
840 sc->sc_txfree = GEM_MAXTXFREE; in gem_meminit()
841 sc->sc_txnext = 0; in gem_meminit()
842 sc->sc_txwin = 0; in gem_meminit()
849 rxs = &sc->sc_rxsoft[i]; in gem_meminit()
851 if ((error = gem_add_rxbuf(sc, i)) != 0) { in gem_meminit()
852 device_printf(sc->sc_dev, in gem_meminit()
859 gem_rxdrain(sc); in gem_meminit()
863 GEM_INIT_RXDESC(sc, i); in gem_meminit()
865 sc->sc_rxptr = 0; in gem_meminit()
867 GEM_CDSYNC(sc, BUS_DMASYNC_PREREAD | BUS_DMASYNC_PREWRITE); in gem_meminit()
904 struct gem_softc *sc = xsc; in gem_init() local
906 GEM_LOCK(sc); in gem_init()
907 gem_init_locked(sc); in gem_init()
908 GEM_UNLOCK(sc); in gem_init()
916 gem_init_locked(struct gem_softc *sc) in gem_init_locked() argument
918 if_t ifp = sc->sc_ifp; in gem_init_locked()
921 GEM_LOCK_ASSERT(sc, MA_OWNED); in gem_init_locked()
927 CTR2(KTR_GEM, "%s: %s: calling stop", device_get_name(sc->sc_dev), in gem_init_locked()
939 gem_reset(sc); in gem_init_locked()
941 CTR2(KTR_GEM, "%s: %s: restarting", device_get_name(sc->sc_dev), in gem_init_locked()
945 if ((sc->sc_flags & GEM_SERDES) == 0) in gem_init_locked()
947 gem_mifinit(sc); in gem_init_locked()
950 if (gem_meminit(sc) != 0) in gem_init_locked()
954 gem_init_regs(sc); in gem_init_locked()
960 GEM_WRITE_4(sc, GEM_TX_RING_PTR_HI, 0); in gem_init_locked()
961 GEM_WRITE_4(sc, GEM_TX_RING_PTR_LO, GEM_CDTXADDR(sc, 0)); in gem_init_locked()
963 GEM_WRITE_4(sc, GEM_RX_RING_PTR_HI, 0); in gem_init_locked()
964 GEM_WRITE_4(sc, GEM_RX_RING_PTR_LO, GEM_CDRXADDR(sc, 0)); in gem_init_locked()
967 GEM_CDRXADDR(sc, 0), GEM_CDTXADDR(sc, 0), sc->sc_cddma); in gem_init_locked()
979 GEM_WRITE_4(sc, GEM_CONFIG, in gem_init_locked()
981 GEM_CONFIG_BURST_INF | (GEM_IS_APPLE(sc) ? in gem_init_locked()
984 GEM_WRITE_4(sc, GEM_INTMASK, in gem_init_locked()
992 GEM_WRITE_4(sc, GEM_MAC_RX_MASK, in gem_init_locked()
994 GEM_WRITE_4(sc, GEM_MAC_TX_MASK, in gem_init_locked()
998 GEM_WRITE_4(sc, GEM_MAC_CONTROL_MASK, in gem_init_locked()
1001 GEM_WRITE_4(sc, GEM_MAC_CONTROL_MASK, in gem_init_locked()
1011 GEM_WRITE_4(sc, GEM_TX_CONFIG, v | GEM_TX_CONFIG_TXDMA_EN); in gem_init_locked()
1021 GEM_WRITE_4(sc, GEM_RX_CONFIG, in gem_init_locked()
1026 GEM_WRITE_4(sc, GEM_RX_BLANKING, in gem_init_locked()
1027 ((6 * (sc->sc_flags & GEM_PCI66) != 0 ? 2 : 1) << in gem_init_locked()
1034 GEM_WRITE_4(sc, GEM_RX_PAUSE_THRESH, in gem_init_locked()
1035 (3 * sc->sc_rxfifosize / 256) | in gem_init_locked()
1036 ((sc->sc_rxfifosize / 256) << 12)); in gem_init_locked()
1041 v = GEM_READ_4(sc, GEM_MAC_RX_CONFIG); in gem_init_locked()
1044 sc->sc_mac_rxcfg = v; in gem_init_locked()
1049 gem_setladrf(sc); in gem_init_locked()
1052 v = GEM_READ_4(sc, GEM_MAC_TX_CONFIG); in gem_init_locked()
1054 (void)gem_disable_tx(sc); in gem_init_locked()
1055 GEM_WRITE_4(sc, GEM_MAC_TX_CONFIG, v); in gem_init_locked()
1060 GEM_WRITE_4(sc, GEM_RX_KICK, GEM_NRXDESC - 4); in gem_init_locked()
1065 mii_mediachg(sc->sc_mii); in gem_init_locked()
1068 sc->sc_wdog_timer = 0; in gem_init_locked()
1069 callout_reset(&sc->sc_tick_ch, hz, gem_tick, sc); in gem_init_locked()
1073 gem_load_txmbuf(struct gem_softc *sc, struct mbuf **m_head) in gem_load_txmbuf() argument
1082 GEM_LOCK_ASSERT(sc, MA_OWNED); in gem_load_txmbuf()
1085 if ((txs = STAILQ_FIRST(&sc->sc_txfreeq)) == NULL) { in gem_load_txmbuf()
1091 if (((*m_head)->m_pkthdr.csum_flags & sc->sc_csum_features) != 0) { in gem_load_txmbuf()
1113 error = bus_dmamap_load_mbuf_sg(sc->sc_tdmatag, txs->txs_dmamap, in gem_load_txmbuf()
1123 error = bus_dmamap_load_mbuf_sg(sc->sc_tdmatag, in gem_load_txmbuf()
1148 if (nsegs > sc->sc_txfree - 1) { in gem_load_txmbuf()
1150 bus_dmamap_unload(sc->sc_tdmatag, txs->txs_dmamap); in gem_load_txmbuf()
1155 txs->txs_firstdesc = sc->sc_txnext; in gem_load_txmbuf()
1164 sc->sc_txdescs[nexttx].gd_addr = htole64(txsegs[seg].ds_addr); in gem_load_txmbuf()
1168 sc->sc_txdescs[nexttx].gd_flags = htole64(flags | cflags); in gem_load_txmbuf()
1177 sc->sc_txdescs[txs->txs_lastdesc].gd_flags |= in gem_load_txmbuf()
1185 if (++sc->sc_txwin > GEM_NTXSEGS * 2 / 3) { in gem_load_txmbuf()
1186 sc->sc_txwin = 0; in gem_load_txmbuf()
1187 sc->sc_txdescs[txs->txs_firstdesc].gd_flags |= in gem_load_txmbuf()
1190 sc->sc_txdescs[txs->txs_firstdesc].gd_flags |= in gem_load_txmbuf()
1194 bus_dmamap_sync(sc->sc_tdmatag, txs->txs_dmamap, in gem_load_txmbuf()
1202 STAILQ_REMOVE_HEAD(&sc->sc_txfreeq, txs_q); in gem_load_txmbuf()
1203 STAILQ_INSERT_TAIL(&sc->sc_txdirtyq, txs, txs_q); in gem_load_txmbuf()
1206 sc->sc_txnext = GEM_NEXTTX(txs->txs_lastdesc); in gem_load_txmbuf()
1207 sc->sc_txfree -= txs->txs_ndescs; in gem_load_txmbuf()
1213 gem_init_regs(struct gem_softc *sc) in gem_init_regs() argument
1215 const u_char *laddr = if_getlladdr(sc->sc_ifp); in gem_init_regs()
1217 GEM_LOCK_ASSERT(sc, MA_OWNED); in gem_init_regs()
1220 if ((sc->sc_flags & GEM_INITED) == 0) { in gem_init_regs()
1222 GEM_WRITE_4(sc, GEM_MAC_IPG0, 0); in gem_init_regs()
1223 GEM_WRITE_4(sc, GEM_MAC_IPG1, 8); in gem_init_regs()
1224 GEM_WRITE_4(sc, GEM_MAC_IPG2, 4); in gem_init_regs()
1227 GEM_WRITE_4(sc, GEM_MAC_MAC_MIN_FRAME, ETHER_MIN_LEN); in gem_init_regs()
1229 GEM_WRITE_4(sc, GEM_MAC_MAC_MAX_FRAME, in gem_init_regs()
1233 GEM_WRITE_4(sc, GEM_MAC_PREAMBLE_LEN, 0x7); in gem_init_regs()
1234 GEM_WRITE_4(sc, GEM_MAC_JAM_SIZE, 0x4); in gem_init_regs()
1235 GEM_WRITE_4(sc, GEM_MAC_ATTEMPT_LIMIT, 0x10); in gem_init_regs()
1236 GEM_WRITE_4(sc, GEM_MAC_CONTROL_TYPE, 0x8808); in gem_init_regs()
1239 GEM_WRITE_4(sc, GEM_MAC_RANDOM_SEED, in gem_init_regs()
1243 GEM_WRITE_4(sc, GEM_MAC_ADDR3, 0); in gem_init_regs()
1244 GEM_WRITE_4(sc, GEM_MAC_ADDR4, 0); in gem_init_regs()
1245 GEM_WRITE_4(sc, GEM_MAC_ADDR5, 0); in gem_init_regs()
1248 GEM_WRITE_4(sc, GEM_MAC_ADDR6, 0x0001); in gem_init_regs()
1249 GEM_WRITE_4(sc, GEM_MAC_ADDR7, 0xc200); in gem_init_regs()
1250 GEM_WRITE_4(sc, GEM_MAC_ADDR8, 0x0180); in gem_init_regs()
1253 GEM_WRITE_4(sc, GEM_MAC_ADDR_FILTER0, 0); in gem_init_regs()
1254 GEM_WRITE_4(sc, GEM_MAC_ADDR_FILTER1, 0); in gem_init_regs()
1255 GEM_WRITE_4(sc, GEM_MAC_ADDR_FILTER2, 0); in gem_init_regs()
1256 GEM_WRITE_4(sc, GEM_MAC_ADR_FLT_MASK1_2, 0); in gem_init_regs()
1257 GEM_WRITE_4(sc, GEM_MAC_ADR_FLT_MASK0, 0); in gem_init_regs()
1259 sc->sc_flags |= GEM_INITED; in gem_init_regs()
1263 GEM_WRITE_4(sc, GEM_MAC_NORM_COLL_CNT, 0); in gem_init_regs()
1264 GEM_WRITE_4(sc, GEM_MAC_FIRST_COLL_CNT, 0); in gem_init_regs()
1265 GEM_WRITE_4(sc, GEM_MAC_EXCESS_COLL_CNT, 0); in gem_init_regs()
1266 GEM_WRITE_4(sc, GEM_MAC_LATE_COLL_CNT, 0); in gem_init_regs()
1267 GEM_WRITE_4(sc, GEM_MAC_DEFER_TMR_CNT, 0); in gem_init_regs()
1268 GEM_WRITE_4(sc, GEM_MAC_PEAK_ATTEMPTS, 0); in gem_init_regs()
1269 GEM_WRITE_4(sc, GEM_MAC_RX_FRAME_COUNT, 0); in gem_init_regs()
1270 GEM_WRITE_4(sc, GEM_MAC_RX_LEN_ERR_CNT, 0); in gem_init_regs()
1271 GEM_WRITE_4(sc, GEM_MAC_RX_ALIGN_ERR, 0); in gem_init_regs()
1272 GEM_WRITE_4(sc, GEM_MAC_RX_CRC_ERR_CNT, 0); in gem_init_regs()
1273 GEM_WRITE_4(sc, GEM_MAC_RX_CODE_VIOL, 0); in gem_init_regs()
1276 GEM_WRITE_4(sc, GEM_MAC_SEND_PAUSE_CMD, 0x1BF0); in gem_init_regs()
1279 GEM_WRITE_4(sc, GEM_MAC_ADDR0, (laddr[4] << 8) | laddr[5]); in gem_init_regs()
1280 GEM_WRITE_4(sc, GEM_MAC_ADDR1, (laddr[2] << 8) | laddr[3]); in gem_init_regs()
1281 GEM_WRITE_4(sc, GEM_MAC_ADDR2, (laddr[0] << 8) | laddr[1]); in gem_init_regs()
1284 GEM_WRITE_4(sc, GEM_MAC_XIF_CONFIG, GEM_MAC_XIF_TX_MII_ENA); in gem_init_regs()
1290 struct gem_softc *sc = if_getsoftc(ifp); in gem_start() local
1292 GEM_LOCK(sc); in gem_start()
1294 GEM_UNLOCK(sc); in gem_start()
1298 gem_txkick(struct gem_softc *sc) in gem_txkick() argument
1309 device_get_name(sc->sc_dev), __func__, sc->sc_txnext); in gem_txkick()
1311 GEM_CDSYNC(sc, BUS_DMASYNC_PREREAD | BUS_DMASYNC_PREWRITE); in gem_txkick()
1312 GEM_WRITE_4(sc, GEM_TX_KICK, sc->sc_txnext); in gem_txkick()
1318 struct gem_softc *sc = if_getsoftc(ifp); in gem_start_locked() local
1322 GEM_LOCK_ASSERT(sc, MA_OWNED); in gem_start_locked()
1325 IFF_DRV_RUNNING || (sc->sc_flags & GEM_LINK) == 0) in gem_start_locked()
1330 device_get_name(sc->sc_dev), __func__, sc->sc_txfree, in gem_start_locked()
1331 sc->sc_txnext); in gem_start_locked()
1335 for (; !if_sendq_empty(ifp) && sc->sc_txfree > 1;) { in gem_start_locked()
1339 if (gem_load_txmbuf(sc, &m) != 0) { in gem_start_locked()
1346 if ((sc->sc_txnext % 4) == 0) { in gem_start_locked()
1347 gem_txkick(sc); in gem_start_locked()
1357 gem_txkick(sc); in gem_start_locked()
1360 device_get_name(sc->sc_dev), sc->sc_txnext); in gem_start_locked()
1364 sc->sc_wdog_timer = 5; in gem_start_locked()
1367 device_get_name(sc->sc_dev), __func__, in gem_start_locked()
1368 sc->sc_wdog_timer); in gem_start_locked()
1374 gem_tint(struct gem_softc *sc) in gem_tint() argument
1376 if_t ifp = sc->sc_ifp; in gem_tint()
1383 GEM_LOCK_ASSERT(sc, MA_OWNED); in gem_tint()
1385 CTR2(KTR_GEM, "%s: %s", device_get_name(sc->sc_dev), __func__); in gem_tint()
1393 GEM_CDSYNC(sc, BUS_DMASYNC_POSTREAD); in gem_tint()
1394 while ((txs = STAILQ_FIRST(&sc->sc_txdirtyq)) != NULL) { in gem_tint()
1402 sc->sc_txdescs[i].gd_flags)); in gem_tint()
1405 sc->sc_txdescs[i].gd_addr)); in gem_tint()
1419 txlast = GEM_READ_4(sc, GEM_TX_COMPLETION); in gem_tint()
1439 STAILQ_REMOVE_HEAD(&sc->sc_txdirtyq, txs_q); in gem_tint()
1441 sc->sc_txfree += txs->txs_ndescs; in gem_tint()
1443 bus_dmamap_sync(sc->sc_tdmatag, txs->txs_dmamap, in gem_tint()
1445 bus_dmamap_unload(sc->sc_tdmatag, txs->txs_dmamap); in gem_tint()
1451 STAILQ_INSERT_TAIL(&sc->sc_txfreeq, txs, txs_q); in gem_tint()
1460 __func__, GEM_READ_4(sc, GEM_TX_STATE_MACHINE), in gem_tint()
1461 ((long long)GEM_READ_4(sc, GEM_TX_DATA_PTR_HI) << 32) | in gem_tint()
1462 GEM_READ_4(sc, GEM_TX_DATA_PTR_LO), in gem_tint()
1463 GEM_READ_4(sc, GEM_TX_COMPLETION)); in gem_tint()
1467 if (sc->sc_txfree == GEM_NTXDESC - 1) in gem_tint()
1468 sc->sc_txwin = 0; in gem_tint()
1475 if (STAILQ_EMPTY(&sc->sc_txdirtyq)) in gem_tint()
1476 sc->sc_wdog_timer = 0; in gem_tint()
1482 device_get_name(sc->sc_dev), __func__, sc->sc_wdog_timer); in gem_tint()
1490 struct gem_softc *sc = arg; in gem_rint_timeout() local
1492 GEM_LOCK_ASSERT(sc, MA_OWNED); in gem_rint_timeout()
1494 gem_rint(sc); in gem_rint_timeout()
1499 gem_rint(struct gem_softc *sc) in gem_rint() argument
1501 if_t ifp = sc->sc_ifp; in gem_rint()
1506 GEM_LOCK_ASSERT(sc, MA_OWNED); in gem_rint()
1509 callout_stop(&sc->sc_rx_ch); in gem_rint()
1512 CTR2(KTR_GEM, "%s: %s", device_get_name(sc->sc_dev), __func__); in gem_rint()
1519 rxcomp = GEM_READ_4(sc, GEM_RX_COMPLETION); in gem_rint()
1522 __func__, sc->sc_rxptr, rxcomp); in gem_rint()
1524 GEM_CDSYNC(sc, BUS_DMASYNC_POSTREAD | BUS_DMASYNC_POSTWRITE); in gem_rint()
1525 for (; sc->sc_rxptr != rxcomp;) { in gem_rint()
1526 m = sc->sc_rxsoft[sc->sc_rxptr].rxs_mbuf; in gem_rint()
1527 rxstat = le64toh(sc->sc_rxdescs[sc->sc_rxptr].gd_flags); in gem_rint()
1539 callout_reset(&sc->sc_rx_ch, GEM_RXOWN_TICKS, in gem_rint()
1540 gem_rint_timeout, sc); in gem_rint()
1548 device_printf(sc->sc_dev, "receive error: CRC error\n"); in gem_rint()
1549 GEM_INIT_RXDESC(sc, sc->sc_rxptr); in gem_rint()
1557 &sc->sc_rxsoft[sc->sc_rxptr], sc->sc_rxptr); in gem_rint()
1560 sc->sc_rxdescs[sc->sc_rxptr].gd_flags)); in gem_rint()
1563 sc->sc_rxdescs[sc->sc_rxptr].gd_addr)); in gem_rint()
1572 if (gem_add_rxbuf(sc, sc->sc_rxptr) != 0) { in gem_rint()
1574 GEM_INIT_RXDESC(sc, sc->sc_rxptr); in gem_rint()
1586 sc->sc_rxptr = GEM_NEXTRX(sc->sc_rxptr); in gem_rint()
1587 if ((sc->sc_rxptr % 4) == 0) { in gem_rint()
1588 GEM_CDSYNC(sc, in gem_rint()
1590 GEM_WRITE_4(sc, GEM_RX_KICK, in gem_rint()
1591 (sc->sc_rxptr + GEM_NRXDESC - 4) & in gem_rint()
1610 GEM_UNLOCK(sc); in gem_rint()
1612 GEM_LOCK(sc); in gem_rint()
1617 sc->sc_rxptr, GEM_READ_4(sc, GEM_RX_COMPLETION)); in gem_rint()
1622 gem_add_rxbuf(struct gem_softc *sc, int idx) in gem_add_rxbuf() argument
1624 struct gem_rxsoft *rxs = &sc->sc_rxsoft[idx]; in gem_add_rxbuf()
1629 GEM_LOCK_ASSERT(sc, MA_OWNED); in gem_add_rxbuf()
1642 bus_dmamap_sync(sc->sc_rdmatag, rxs->rxs_dmamap, in gem_add_rxbuf()
1644 bus_dmamap_unload(sc->sc_rdmatag, rxs->rxs_dmamap); in gem_add_rxbuf()
1647 error = bus_dmamap_load_mbuf_sg(sc->sc_rdmatag, rxs->rxs_dmamap, in gem_add_rxbuf()
1650 device_printf(sc->sc_dev, in gem_add_rxbuf()
1661 bus_dmamap_sync(sc->sc_rdmatag, rxs->rxs_dmamap, in gem_add_rxbuf()
1664 GEM_INIT_RXDESC(sc, idx); in gem_add_rxbuf()
1670 gem_eint(struct gem_softc *sc, u_int status) in gem_eint() argument
1673 if_inc_counter(sc->sc_ifp, IFCOUNTER_IERRORS, 1); in gem_eint()
1675 gem_reset_rxdma(sc); in gem_eint()
1679 device_printf(sc->sc_dev, "%s: status 0x%x", __func__, status); in gem_eint()
1682 GEM_READ_4(sc, GEM_PCI_ERROR_STATUS)); in gem_eint()
1690 struct gem_softc *sc = v; in gem_intr() local
1693 GEM_LOCK(sc); in gem_intr()
1694 status = GEM_READ_4(sc, GEM_STATUS); in gem_intr()
1698 device_get_name(sc->sc_dev), __func__, in gem_intr()
1706 GEM_READ_4(sc, GEM_MII_INTERRUP_STATUS) | in gem_intr()
1707 GEM_READ_4(sc, GEM_MII_INTERRUP_STATUS); in gem_intr()
1709 device_printf(sc->sc_dev, in gem_intr()
1713 status2 = GEM_READ_4(sc, GEM_MAC_CONTROL_STATUS); in gem_intr()
1715 device_printf(sc->sc_dev, in gem_intr()
1719 device_printf(sc->sc_dev, in gem_intr()
1722 device_printf(sc->sc_dev, in gem_intr()
1726 device_printf(sc->sc_dev, "%s: MIF interrupt\n", __func__); in gem_intr()
1731 gem_eint(sc, status); in gem_intr()
1734 gem_rint(sc); in gem_intr()
1737 gem_tint(sc); in gem_intr()
1740 status2 = GEM_READ_4(sc, GEM_MAC_TX_STATUS); in gem_intr()
1744 device_printf(sc->sc_dev, in gem_intr()
1748 if_inc_counter(sc->sc_ifp, IFCOUNTER_OERRORS, 1); in gem_intr()
1749 if_setdrvflagbits(sc->sc_ifp, 0, IFF_DRV_RUNNING); in gem_intr()
1750 gem_init_locked(sc); in gem_intr()
1754 status2 = GEM_READ_4(sc, GEM_MAC_RX_STATUS); in gem_intr()
1762 if_inc_counter(sc->sc_ifp, IFCOUNTER_IERRORS, 1); in gem_intr()
1763 gem_reset_rxdma(sc); in gem_intr()
1766 device_printf(sc->sc_dev, in gem_intr()
1769 GEM_UNLOCK(sc); in gem_intr()
1773 gem_watchdog(struct gem_softc *sc) in gem_watchdog() argument
1775 if_t ifp = sc->sc_ifp; in gem_watchdog()
1777 GEM_LOCK_ASSERT(sc, MA_OWNED); in gem_watchdog()
1782 __func__, GEM_READ_4(sc, GEM_RX_CONFIG), in gem_watchdog()
1783 GEM_READ_4(sc, GEM_MAC_RX_STATUS), in gem_watchdog()
1784 GEM_READ_4(sc, GEM_MAC_RX_CONFIG)); in gem_watchdog()
1787 __func__, GEM_READ_4(sc, GEM_TX_CONFIG), in gem_watchdog()
1788 GEM_READ_4(sc, GEM_MAC_TX_STATUS), in gem_watchdog()
1789 GEM_READ_4(sc, GEM_MAC_TX_CONFIG)); in gem_watchdog()
1792 if (sc->sc_wdog_timer == 0 || --sc->sc_wdog_timer != 0) in gem_watchdog()
1795 if ((sc->sc_flags & GEM_LINK) != 0) in gem_watchdog()
1796 device_printf(sc->sc_dev, "device timeout\n"); in gem_watchdog()
1798 device_printf(sc->sc_dev, "device timeout (no link)\n"); in gem_watchdog()
1803 gem_init_locked(sc); in gem_watchdog()
1809 gem_mifinit(struct gem_softc *sc) in gem_mifinit() argument
1813 GEM_WRITE_4(sc, GEM_MIF_CONFIG, in gem_mifinit()
1814 GEM_READ_4(sc, GEM_MIF_CONFIG) & ~GEM_MIF_CONFIG_BB_ENA); in gem_mifinit()
1815 GEM_BARRIER(sc, GEM_MIF_CONFIG, 4, in gem_mifinit()
1836 struct gem_softc *sc; in gem_mii_readreg() local
1844 sc = device_get_softc(dev); in gem_mii_readreg()
1845 if ((sc->sc_flags & GEM_SERDES) != 0) { in gem_mii_readreg()
1865 device_printf(sc->sc_dev, in gem_mii_readreg()
1869 return (GEM_READ_4(sc, reg)); in gem_mii_readreg()
1877 GEM_WRITE_4(sc, GEM_MIF_FRAME, v); in gem_mii_readreg()
1878 GEM_BARRIER(sc, GEM_MIF_FRAME, 4, in gem_mii_readreg()
1882 v = GEM_READ_4(sc, GEM_MIF_FRAME); in gem_mii_readreg()
1887 device_printf(sc->sc_dev, "%s: timed out\n", __func__); in gem_mii_readreg()
1894 struct gem_softc *sc; in gem_mii_writereg() local
1902 sc = device_get_softc(dev); in gem_mii_writereg()
1903 if ((sc->sc_flags & GEM_SERDES) != 0) { in gem_mii_writereg()
1912 GEM_WRITE_4(sc, GEM_MII_CONTROL, val); in gem_mii_writereg()
1913 GEM_BARRIER(sc, GEM_MII_CONTROL, 4, in gem_mii_writereg()
1915 if (!gem_bitwait(sc, GEM_MII_CONTROL, in gem_mii_writereg()
1917 device_printf(sc->sc_dev, in gem_mii_writereg()
1921 GEM_WRITE_4(sc, GEM_MII_CONFIG, 0); in gem_mii_writereg()
1922 GEM_BARRIER(sc, GEM_MII_CONFIG, 4, in gem_mii_writereg()
1924 GEM_WRITE_4(sc, GEM_MII_ANAR, val); in gem_mii_writereg()
1925 GEM_BARRIER(sc, GEM_MII_ANAR, 4, in gem_mii_writereg()
1927 GEM_WRITE_4(sc, GEM_MII_SLINK_CONTROL, in gem_mii_writereg()
1929 GEM_BARRIER(sc, GEM_MII_SLINK_CONTROL, 4, in gem_mii_writereg()
1931 GEM_WRITE_4(sc, GEM_MII_CONFIG, in gem_mii_writereg()
1933 GEM_BARRIER(sc, GEM_MII_CONFIG, 4, in gem_mii_writereg()
1940 device_printf(sc->sc_dev, in gem_mii_writereg()
1944 GEM_WRITE_4(sc, reg, val); in gem_mii_writereg()
1945 GEM_BARRIER(sc, reg, 4, in gem_mii_writereg()
1956 GEM_WRITE_4(sc, GEM_MIF_FRAME, v); in gem_mii_writereg()
1957 GEM_BARRIER(sc, GEM_MIF_FRAME, 4, in gem_mii_writereg()
1961 v = GEM_READ_4(sc, GEM_MIF_FRAME); in gem_mii_writereg()
1966 device_printf(sc->sc_dev, "%s: timed out\n", __func__); in gem_mii_writereg()
1973 struct gem_softc *sc; in gem_mii_statchg() local
1977 sc = device_get_softc(dev); in gem_mii_statchg()
1979 GEM_LOCK_ASSERT(sc, MA_OWNED); in gem_mii_statchg()
1982 if ((sc->sc_if_getflags(ifp) & IFF_DEBUG) != 0) in gem_mii_statchg()
1983 device_printf(sc->sc_dev, "%s: status change\n", __func__); in gem_mii_statchg()
1986 if ((sc->sc_mii->mii_media_status & IFM_ACTIVE) != 0 && in gem_mii_statchg()
1987 IFM_SUBTYPE(sc->sc_mii->mii_media_active) != IFM_NONE) in gem_mii_statchg()
1988 sc->sc_flags |= GEM_LINK; in gem_mii_statchg()
1990 sc->sc_flags &= ~GEM_LINK; in gem_mii_statchg()
1992 switch (IFM_SUBTYPE(sc->sc_mii->mii_media_active)) { in gem_mii_statchg()
2010 rxcfg = sc->sc_mac_rxcfg; in gem_mii_statchg()
2013 if ((IFM_OPTIONS(sc->sc_mii->mii_media_active) & IFM_FDX) != 0) in gem_mii_statchg()
2019 (void)gem_disable_tx(sc); in gem_mii_statchg()
2020 GEM_WRITE_4(sc, GEM_MAC_TX_CONFIG, txcfg); in gem_mii_statchg()
2021 (void)gem_disable_rx(sc); in gem_mii_statchg()
2022 GEM_WRITE_4(sc, GEM_MAC_RX_CONFIG, rxcfg); in gem_mii_statchg()
2024 v = GEM_READ_4(sc, GEM_MAC_CONTROL_CONFIG) & in gem_mii_statchg()
2026 if ((IFM_OPTIONS(sc->sc_mii->mii_media_active) & in gem_mii_statchg()
2029 if ((IFM_OPTIONS(sc->sc_mii->mii_media_active) & in gem_mii_statchg()
2032 GEM_WRITE_4(sc, GEM_MAC_CONTROL_CONFIG, v); in gem_mii_statchg()
2034 if ((IFM_OPTIONS(sc->sc_mii->mii_media_active) & IFM_FDX) == 0 && in gem_mii_statchg()
2036 GEM_WRITE_4(sc, GEM_MAC_SLOT_TIME, in gem_mii_statchg()
2039 GEM_WRITE_4(sc, GEM_MAC_SLOT_TIME, in gem_mii_statchg()
2045 if ((sc->sc_flags & GEM_SERDES) == 0) { in gem_mii_statchg()
2046 if ((GEM_READ_4(sc, GEM_MIF_CONFIG) & in gem_mii_statchg()
2049 if ((IFM_OPTIONS(sc->sc_mii->mii_media_active) & in gem_mii_statchg()
2062 if ((IFM_OPTIONS(sc->sc_mii->mii_media_active) & IFM_FDX) != 0) in gem_mii_statchg()
2064 GEM_WRITE_4(sc, GEM_MAC_XIF_CONFIG, v); in gem_mii_statchg()
2066 sc->sc_mac_rxcfg = rxcfg; in gem_mii_statchg()
2067 if ((if_getdrvflags(sc->sc_ifp) & IFF_DRV_RUNNING) != 0 && in gem_mii_statchg()
2068 (sc->sc_flags & GEM_LINK) != 0) { in gem_mii_statchg()
2069 GEM_WRITE_4(sc, GEM_MAC_TX_CONFIG, in gem_mii_statchg()
2071 GEM_WRITE_4(sc, GEM_MAC_RX_CONFIG, in gem_mii_statchg()
2079 struct gem_softc *sc = if_getsoftc(ifp); in gem_mediachange() local
2084 GEM_LOCK(sc); in gem_mediachange()
2085 error = mii_mediachg(sc->sc_mii); in gem_mediachange()
2086 GEM_UNLOCK(sc); in gem_mediachange()
2093 struct gem_softc *sc = if_getsoftc(ifp); in gem_mediastatus() local
2095 GEM_LOCK(sc); in gem_mediastatus()
2097 GEM_UNLOCK(sc); in gem_mediastatus()
2101 mii_pollstat(sc->sc_mii); in gem_mediastatus()
2102 ifmr->ifm_active = sc->sc_mii->mii_media_active; in gem_mediastatus()
2103 ifmr->ifm_status = sc->sc_mii->mii_media_status; in gem_mediastatus()
2104 GEM_UNLOCK(sc); in gem_mediastatus()
2110 struct gem_softc *sc = if_getsoftc(ifp); in gem_ioctl() local
2117 GEM_LOCK(sc); in gem_ioctl()
2120 ((if_getflags(ifp) ^ sc->sc_ifflags) & in gem_ioctl()
2122 gem_setladrf(sc); in gem_ioctl()
2124 gem_init_locked(sc); in gem_ioctl()
2128 sc->sc_csum_features |= CSUM_UDP; in gem_ioctl()
2130 sc->sc_csum_features &= ~CSUM_UDP; in gem_ioctl()
2132 if_sethwassist(ifp, sc->sc_csum_features); in gem_ioctl()
2133 sc->sc_ifflags = if_getflags(ifp); in gem_ioctl()
2134 GEM_UNLOCK(sc); in gem_ioctl()
2138 GEM_LOCK(sc); in gem_ioctl()
2140 gem_setladrf(sc); in gem_ioctl()
2141 GEM_UNLOCK(sc); in gem_ioctl()
2145 error = ifmedia_ioctl(ifp, ifr, &sc->sc_mii->mii_media, cmd); in gem_ioctl()
2148 GEM_LOCK(sc); in gem_ioctl()
2151 if_sethwassist(ifp, sc->sc_csum_features); in gem_ioctl()
2154 GEM_UNLOCK(sc); in gem_ioctl()
2179 gem_setladrf(struct gem_softc *sc) in gem_setladrf() argument
2181 if_t ifp = sc->sc_ifp; in gem_setladrf()
2186 GEM_LOCK_ASSERT(sc, MA_OWNED); in gem_setladrf()
2192 v = sc->sc_mac_rxcfg & ~GEM_MAC_RX_HASH_FILTER; in gem_setladrf()
2193 GEM_WRITE_4(sc, GEM_MAC_RX_CONFIG, v); in gem_setladrf()
2194 GEM_BARRIER(sc, GEM_MAC_RX_CONFIG, 4, in gem_setladrf()
2196 if (!gem_bitwait(sc, GEM_MAC_RX_CONFIG, GEM_MAC_RX_HASH_FILTER | in gem_setladrf()
2198 device_printf(sc->sc_dev, in gem_setladrf()
2227 GEM_WRITE_4(sc, in gem_setladrf()
2232 sc->sc_mac_rxcfg = v; in gem_setladrf()
2233 GEM_WRITE_4(sc, GEM_MAC_RX_CONFIG, v | GEM_MAC_RX_ENABLE); in gem_setladrf()