62 	uint32_t reg;  in arm64_interrupt_enable()  local
64 	reg = (1 << pmc);  in arm64_interrupt_enable()
65 	WRITE_SPECIALREG(pmintenset_el1, reg);  in arm64_interrupt_enable()
76 	uint32_t reg;  in arm64_interrupt_disable()  local
78 	reg = (1 << pmc);  in arm64_interrupt_disable()
79 	WRITE_SPECIALREG(pmintenclr_el1, reg);  in arm64_interrupt_disable()
90 	uint32_t reg;  in arm64_counter_enable()  local
92 	reg = (1 << pmc);  in arm64_counter_enable()
93 	WRITE_SPECIALREG(pmcntenset_el0, reg);  in arm64_counter_enable()
104 	uint32_t reg;  in arm64_counter_disable()  local
106 	reg = (1 << pmc);  in arm64_counter_disable()
107 	WRITE_SPECIALREG(pmcntenclr_el0, reg);  in arm64_counter_disable()
118 	uint32_t reg;  in arm64_pmcr_read()  local
120 	reg = READ_SPECIALREG(pmcr_el0);  in arm64_pmcr_read()
122 	return (reg);  in arm64_pmcr_read()
126 arm64_pmcr_write(uint32_t reg)  in arm64_pmcr_write()  argument
129 	WRITE_SPECIALREG(pmcr_el0, reg);  in arm64_pmcr_write()
151 arm64_pmcn_write(unsigned int pmc, uint32_t reg)  in arm64_pmcn_write()  argument
157 	WRITE_SPECIALREG(pmxevcntr_el0, reg);  in arm64_pmcn_write()
215 	int reg;  in arm64_read_pmc()  local
227 	reg = (1 << ri);  in arm64_read_pmc()
228 	if ((READ_SPECIALREG(pmovsclr_el0) & reg) != 0) {  in arm64_read_pmc()
230 		WRITE_SPECIALREG(pmovsclr_el0, reg);  in arm64_read_pmc()
358 	int reg, cpu;  in arm64_intr()  local
374 		reg = (1 << ri);  in arm64_intr()
375 		if ((READ_SPECIALREG(pmovsclr_el0) & reg) == 0)  in arm64_intr()
378 		WRITE_SPECIALREG(pmovsclr_el0, reg);  in arm64_intr()
510 	int reg;  in pmc_arm64_initialize()  local
513 	reg = arm64_pmcr_read();  in pmc_arm64_initialize()
514 	arm64_npmcs = (reg & PMCR_N_MASK) >> PMCR_N_SHIFT;  in pmc_arm64_initialize()
515 	impcode = (reg & PMCR_IMP_MASK) >> PMCR_IMP_SHIFT;  in pmc_arm64_initialize()
516 	idcode = (reg & PMCR_IDCODE_MASK) >> PMCR_IDCODE_SHIFT;  in pmc_arm64_initialize()