Lines Matching refs:priv
39 static int mlx5e_get_wqe_sz(struct mlx5e_priv *priv, u32 *wqe_sz, u32 *nsegs);
363 mlx5e_update_carrier(struct mlx5e_priv *priv) in mlx5e_update_carrier() argument
365 struct mlx5_core_dev *mdev = priv->mdev; in mlx5e_update_carrier()
380 priv->media_status_last |= IFM_ACTIVE; in mlx5e_update_carrier()
382 priv->media_status_last &= ~IFM_ACTIVE; in mlx5e_update_carrier()
383 priv->media_active_last = IFM_ETHER; in mlx5e_update_carrier()
384 if_link_state_change(priv->ifp, LINK_STATE_DOWN); in mlx5e_update_carrier()
391 priv->media_active_last = IFM_ETHER; in mlx5e_update_carrier()
392 if_setbaudrate(priv->ifp, 1); in mlx5e_update_carrier()
393 mlx5_en_err(priv->ifp, "query port ptys failed: 0x%x\n", in mlx5e_update_carrier()
410 mlx5_en_err(priv->ifp, in mlx5e_update_carrier()
424 mlx5_en_err(priv->ifp, in mlx5e_update_carrier()
433 mlx5_en_err(priv->ifp, in mlx5e_update_carrier()
442 mlx5_en_err(priv->ifp, in mlx5e_update_carrier()
449 priv->media_active_last = media_entry.subtype | IFM_ETHER | IFM_FDX; in mlx5e_update_carrier()
450 if_setbaudrate(priv->ifp, media_entry.baudrate); in mlx5e_update_carrier()
452 if_link_state_change(priv->ifp, LINK_STATE_UP); in mlx5e_update_carrier()
458 struct mlx5e_priv *priv = if_getsoftc(dev); in mlx5e_media_status() local
460 ifmr->ifm_status = priv->media_status_last; in mlx5e_media_status()
461 ifmr->ifm_current = ifmr->ifm_active = priv->media_active_last | in mlx5e_media_status()
462 (priv->params.rx_pauseframe_control ? IFM_ETH_RXPAUSE : 0) | in mlx5e_media_status()
463 (priv->params.tx_pauseframe_control ? IFM_ETH_TXPAUSE : 0); in mlx5e_media_status()
503 mlx5e_set_port_pause_and_pfc(struct mlx5e_priv *priv) in mlx5e_set_port_pause_and_pfc() argument
505 return (mlx5_set_port_pause_and_pfc(priv->mdev, 1, in mlx5e_set_port_pause_and_pfc()
506 priv->params.rx_pauseframe_control, in mlx5e_set_port_pause_and_pfc()
507 priv->params.tx_pauseframe_control, in mlx5e_set_port_pause_and_pfc()
508 priv->params.rx_priority_flow_control, in mlx5e_set_port_pause_and_pfc()
509 priv->params.tx_priority_flow_control)); in mlx5e_set_port_pause_and_pfc()
513 mlx5e_set_port_pfc(struct mlx5e_priv *priv) in mlx5e_set_port_pfc() argument
517 if (priv->gone != 0) { in mlx5e_set_port_pfc()
519 } else if (priv->params.rx_pauseframe_control || in mlx5e_set_port_pfc()
520 priv->params.tx_pauseframe_control) { in mlx5e_set_port_pfc()
521 mlx5_en_err(priv->ifp, in mlx5e_set_port_pfc()
525 error = mlx5e_set_port_pause_and_pfc(priv); in mlx5e_set_port_pfc()
533 struct mlx5e_priv *priv = if_getsoftc(dev); in mlx5e_media_change() local
534 struct mlx5_core_dev *mdev = priv->mdev; in mlx5e_media_change()
543 locked = PRIV_LOCKED(priv); in mlx5e_media_change()
545 PRIV_LOCK(priv); in mlx5e_media_change()
547 if (IFM_TYPE(priv->media.ifm_media) != IFM_ETHER) { in mlx5e_media_change()
560 link_mode = mlx5e_find_link_mode(IFM_SUBTYPE(priv->media.ifm_media), ext); in mlx5e_media_change()
567 if (IFM_SUBTYPE(priv->media.ifm_media) == IFM_AUTO) { in mlx5e_media_change()
582 if (priv->media.ifm_media & (IFM_ETH_RXPAUSE | IFM_ETH_TXPAUSE)) { in mlx5e_media_change()
584 if (priv->params.rx_priority_flow_control || in mlx5e_media_change()
585 priv->params.tx_priority_flow_control) { in mlx5e_media_change()
592 priv->params.rx_pauseframe_control = in mlx5e_media_change()
593 (priv->media.ifm_media & IFM_ETH_RXPAUSE) ? 1 : 0; in mlx5e_media_change()
594 priv->params.tx_pauseframe_control = in mlx5e_media_change()
595 (priv->media.ifm_media & IFM_ETH_TXPAUSE) ? 1 : 0; in mlx5e_media_change()
598 was_opened = test_bit(MLX5E_STATE_OPENED, &priv->state); in mlx5e_media_change()
603 error = -mlx5e_set_port_pause_and_pfc(priv); in mlx5e_media_change()
609 PRIV_UNLOCK(priv); in mlx5e_media_change()
616 struct mlx5e_priv *priv = container_of(work, struct mlx5e_priv, in mlx5e_update_carrier_work() local
619 PRIV_LOCK(priv); in mlx5e_update_carrier_work()
620 if (test_bit(MLX5E_STATE_OPENED, &priv->state)) in mlx5e_update_carrier_work()
621 mlx5e_update_carrier(priv); in mlx5e_update_carrier_work()
622 PRIV_UNLOCK(priv); in mlx5e_update_carrier_work()
632 mlx5e_update_pcie_counters(struct mlx5e_priv *priv) in mlx5e_update_pcie_counters() argument
634 struct mlx5_core_dev *mdev = priv->mdev; in mlx5e_update_pcie_counters()
635 struct mlx5e_port_stats_debug *s_debug = &priv->stats.port_stats_debug; in mlx5e_update_pcie_counters()
682 mlx5e_update_pport_counters(struct mlx5e_priv *priv) in mlx5e_update_pport_counters() argument
684 struct mlx5_core_dev *mdev = priv->mdev; in mlx5e_update_pport_counters()
685 struct mlx5e_pport_stats *s = &priv->stats.pport; in mlx5e_update_pport_counters()
686 struct mlx5e_port_stats_debug *s_debug = &priv->stats.port_stats_debug; in mlx5e_update_pport_counters()
757 mlx5e_update_pcie_counters(priv); in mlx5e_update_pport_counters()
780 mlx5e_grp_vnic_env_update_stats(struct mlx5e_priv *priv) in mlx5e_grp_vnic_env_update_stats() argument
785 if (!MLX5_CAP_GEN(priv->mdev, nic_receive_steering_discard)) in mlx5e_grp_vnic_env_update_stats()
793 if (mlx5_cmd_exec(priv->mdev, in, sizeof(in), out, sizeof(out)) != 0) in mlx5e_grp_vnic_env_update_stats()
796 priv->stats.vport.rx_steer_missed_packets = in mlx5e_grp_vnic_env_update_stats()
808 mlx5e_update_stats_locked(struct mlx5e_priv *priv) in mlx5e_update_stats_locked() argument
810 struct mlx5_core_dev *mdev = priv->mdev; in mlx5e_update_stats_locked()
811 struct mlx5e_vport_stats *s = &priv->stats.vport; in mlx5e_update_stats_locked()
841 for (i = 0; i < priv->params.num_channels; i++) { in mlx5e_update_stats_locked()
842 struct mlx5e_channel *pch = priv->channel + i; in mlx5e_update_stats_locked()
860 for (j = 0; j < priv->num_tc; j++) { in mlx5e_update_stats_locked()
874 for (j = 0; j < priv->rl.param.tx_worker_threads_def; j++) { in mlx5e_update_stats_locked()
875 struct mlx5e_rl_worker *rlw = priv->rl.workers + j; in mlx5e_update_stats_locked()
877 for (i = 0; i < priv->rl.param.tx_channels_per_worker_def; i++) { in mlx5e_update_stats_locked()
912 mlx5e_grp_vnic_env_update_stats(priv); in mlx5e_update_stats_locked()
925 if (test_bit(MLX5E_STATE_OPENED, &priv->state) != 0 && in mlx5e_update_stats_locked()
926 mlx5_vport_query_out_of_rx_buffer(mdev, priv->counter_set_id, in mlx5e_update_stats_locked()
983 mlx5e_update_pport_counters(priv); in mlx5e_update_stats_locked()
986 priv->stats.port_stats_debug.tx_stat_p1519to2047octets + in mlx5e_update_stats_locked()
987 priv->stats.port_stats_debug.tx_stat_p2048to4095octets + in mlx5e_update_stats_locked()
988 priv->stats.port_stats_debug.tx_stat_p4096to8191octets + in mlx5e_update_stats_locked()
989 priv->stats.port_stats_debug.tx_stat_p8192to10239octets; in mlx5e_update_stats_locked()
995 if (priv->params_ethtool.diag_pci_enable || in mlx5e_update_stats_locked()
996 priv->params_ethtool.diag_general_enable) { in mlx5e_update_stats_locked()
998 priv->params_ethtool.diag_pci_enable ? &priv->params_pci : NULL, in mlx5e_update_stats_locked()
999 priv->params_ethtool.diag_general_enable ? &priv->params_general : NULL); in mlx5e_update_stats_locked()
1001 mlx5_en_err(priv->ifp, in mlx5e_update_stats_locked()
1006 error = mlx5e_fec_update(priv); in mlx5e_update_stats_locked()
1008 mlx5_en_err(priv->ifp, in mlx5e_update_stats_locked()
1013 if (priv->params_ethtool.hw_num_temp != 0) { in mlx5e_update_stats_locked()
1014 error = mlx5e_hw_temperature_update(priv); in mlx5e_update_stats_locked()
1016 mlx5_en_err(priv->ifp, in mlx5e_update_stats_locked()
1025 struct mlx5e_priv *priv; in mlx5e_update_stats_work() local
1027 priv = container_of(work, struct mlx5e_priv, update_stats_work); in mlx5e_update_stats_work()
1028 PRIV_LOCK(priv); in mlx5e_update_stats_work()
1029 if (test_bit(MLX5E_STATE_OPENED, &priv->state) != 0 && in mlx5e_update_stats_work()
1030 !test_bit(MLX5_INTERFACE_STATE_TEARDOWN, &priv->mdev->intf_state)) in mlx5e_update_stats_work()
1031 mlx5e_update_stats_locked(priv); in mlx5e_update_stats_work()
1032 PRIV_UNLOCK(priv); in mlx5e_update_stats_work()
1038 struct mlx5e_priv *priv = arg; in mlx5e_update_stats() local
1040 queue_work(priv->wq, &priv->update_stats_work); in mlx5e_update_stats()
1042 callout_reset(&priv->watchdog, hz / 4, &mlx5e_update_stats, priv); in mlx5e_update_stats()
1046 mlx5e_async_event_sub(struct mlx5e_priv *priv, in mlx5e_async_event_sub() argument
1052 queue_work(priv->wq, &priv->update_carrier_work); in mlx5e_async_event_sub()
1064 struct mlx5e_priv *priv = vpriv; in mlx5e_async_event() local
1066 mtx_lock(&priv->async_events_mtx); in mlx5e_async_event()
1067 if (test_bit(MLX5E_STATE_ASYNC_EVENTS_ENABLE, &priv->state)) in mlx5e_async_event()
1068 mlx5e_async_event_sub(priv, event); in mlx5e_async_event()
1069 mtx_unlock(&priv->async_events_mtx); in mlx5e_async_event()
1073 mlx5e_enable_async_events(struct mlx5e_priv *priv) in mlx5e_enable_async_events() argument
1075 set_bit(MLX5E_STATE_ASYNC_EVENTS_ENABLE, &priv->state); in mlx5e_enable_async_events()
1079 mlx5e_disable_async_events(struct mlx5e_priv *priv) in mlx5e_disable_async_events() argument
1081 mtx_lock(&priv->async_events_mtx); in mlx5e_disable_async_events()
1082 clear_bit(MLX5E_STATE_ASYNC_EVENTS_ENABLE, &priv->state); in mlx5e_disable_async_events()
1083 mtx_unlock(&priv->async_events_mtx); in mlx5e_disable_async_events()
1108 mlx5e_reset_calibration_callout(struct mlx5e_priv *priv) in mlx5e_reset_calibration_callout() argument
1111 if (priv->clbr_done == 0) in mlx5e_reset_calibration_callout()
1112 mlx5e_calibration_callout(priv); in mlx5e_reset_calibration_callout()
1114 callout_reset_sbt_curcpu(&priv->tstmp_clbr, (priv->clbr_done < in mlx5e_reset_calibration_callout()
1117 mlx5e_calibration_callout, priv, C_DIRECT_EXEC); in mlx5e_reset_calibration_callout()
1128 mlx5e_hw_clock(struct mlx5e_priv *priv) in mlx5e_hw_clock() argument
1133 iseg = priv->mdev->iseg; in mlx5e_hw_clock()
1152 struct mlx5e_priv *priv; in mlx5e_calibration_callout() local
1157 priv = arg; in mlx5e_calibration_callout()
1158 curr = &priv->clbr_points[priv->clbr_curr]; in mlx5e_calibration_callout()
1159 clbr_curr_next = priv->clbr_curr + 1; in mlx5e_calibration_callout()
1160 if (clbr_curr_next >= nitems(priv->clbr_points)) in mlx5e_calibration_callout()
1162 next = &priv->clbr_points[clbr_curr_next]; in mlx5e_calibration_callout()
1167 next->clbr_hw_curr = mlx5e_hw_clock(priv); in mlx5e_calibration_callout()
1170 if (priv->clbr_done != 0) { in mlx5e_calibration_callout()
1171 mlx5_en_err(priv->ifp, in mlx5e_calibration_callout()
1174 priv->clbr_done = 0; in mlx5e_calibration_callout()
1185 priv->clbr_curr = clbr_curr_next; in mlx5e_calibration_callout()
1186 atomic_store_rel_int(&next->clbr_gen, ++(priv->clbr_gen)); in mlx5e_calibration_callout()
1188 if (priv->clbr_done < mlx5e_calibration_duration) in mlx5e_calibration_callout()
1189 priv->clbr_done++; in mlx5e_calibration_callout()
1190 mlx5e_reset_calibration_callout(priv); in mlx5e_calibration_callout()
1202 struct mlx5e_priv *priv = c->priv; in mlx5e_create_rq() local
1203 struct mlx5_core_dev *mdev = priv->mdev; in mlx5e_create_rq()
1212 err = mlx5e_get_wqe_sz(priv, &wqe_sz, &nsegs); in mlx5e_create_rq()
1239 err = mlx5e_get_wqe_sz(priv, &rq->wqe_sz, &rq->nsegs); in mlx5e_create_rq()
1245 err = -tcp_lro_init_args(&rq->lro, priv->ifp, TCP_LRO_ENTRIES, wq_sz); in mlx5e_create_rq()
1264 wqe->data[j].lkey = cpu_to_be32(priv->mr.key); in mlx5e_create_rq()
1268 if (priv->params.rx_cq_moderation_mode < 2) { in mlx5e_create_rq()
1287 rq->ifp = priv->ifp; in mlx5e_create_rq()
1292 mlx5e_create_stats(&rq->stats.ctx, SYSCTL_CHILDREN(priv->sysctl_ifnet), in mlx5e_create_rq()
1337 struct mlx5e_priv *priv = c->priv; in mlx5e_enable_rq() local
1338 struct mlx5_core_dev *mdev = priv->mdev; in mlx5e_enable_rq()
1361 if (priv->counter_set_id >= 0) in mlx5e_enable_rq()
1362 MLX5_SET(rqc, rqc, counter_set_id, priv->counter_set_id); in mlx5e_enable_rq()
1381 struct mlx5e_priv *priv = c->priv; in mlx5e_modify_rq() local
1382 struct mlx5_core_dev *mdev = priv->mdev; in mlx5e_modify_rq()
1411 struct mlx5e_priv *priv = c->priv; in mlx5e_disable_rq() local
1412 struct mlx5_core_dev *mdev = priv->mdev; in mlx5e_disable_rq()
1493 mlx5e_open_drop_rq(struct mlx5e_priv *priv, in mlx5e_open_drop_rq() argument
1502 drop_rq->channel = priv->channel; in mlx5e_open_drop_rq()
1506 MLX5_SET(cqc, param_cq.cqc, uar_page, priv->mdev->priv.uar->index); in mlx5e_open_drop_rq()
1509 err = mlx5e_open_cq(priv, ¶m_cq, &drop_rq->cq, in mlx5e_open_drop_rq()
1519 MLX5_SET(wq, rqc_wq, pd, priv->pdn); in mlx5e_open_drop_rq()
1523 err = mlx5_wq_ll_create(priv->mdev, ¶m_rq.wq, rqc_wq, &drop_rq->wq, in mlx5e_open_drop_rq()
1588 mlx5_dev_domainset(sq->priv->mdev), M_WAITOK | M_ZERO); in mlx5e_alloc_sq_db()
1610 sq->max_inline = sq->priv->params.tx_max_inline; in mlx5e_update_sq_inline()
1611 sq->min_inline_mode = sq->priv->params.tx_min_inline_mode; in mlx5e_update_sq_inline()
1617 if (sq->priv->params_ethtool.trust_state != MLX5_QPTS_TRUST_PCP || in mlx5e_update_sq_inline()
1619 if (MLX5_CAP_ETH(sq->priv->mdev, wqe_vlan_insert)) in mlx5e_update_sq_inline()
1629 mlx5e_refresh_sq_inline_sub(struct mlx5e_priv *priv, struct mlx5e_channel *c) in mlx5e_refresh_sq_inline_sub() argument
1633 for (i = 0; i != priv->num_tc; i++) { in mlx5e_refresh_sq_inline_sub()
1641 mlx5e_refresh_sq_inline(struct mlx5e_priv *priv) in mlx5e_refresh_sq_inline() argument
1646 if (test_bit(MLX5E_STATE_OPENED, &priv->state) == 0) in mlx5e_refresh_sq_inline()
1649 for (i = 0; i < priv->params.num_channels; i++) in mlx5e_refresh_sq_inline()
1650 mlx5e_refresh_sq_inline_sub(priv, &priv->channel[i]); in mlx5e_refresh_sq_inline()
1659 struct mlx5e_priv *priv = c->priv; in mlx5e_create_sq() local
1660 struct mlx5_core_dev *mdev = priv->mdev; in mlx5e_create_sq()
1682 sq->mkey_be = cpu_to_be32(priv->mr.key); in mlx5e_create_sq()
1683 sq->ifp = priv->ifp; in mlx5e_create_sq()
1684 sq->priv = priv; in mlx5e_create_sq()
1701 mlx5e_create_stats(&sq->stats.ctx, SYSCTL_CHILDREN(priv->sysctl_ifnet), in mlx5e_create_sq()
1746 ts_format = mlx5_get_sq_default_ts(sq->priv->mdev); in mlx5e_enable_sq()
1769 err = mlx5_core_create_sq(sq->priv->mdev, in, inlen, &sq->sqn); in mlx5e_enable_sq()
1795 err = mlx5_core_modify_sq(sq->priv->mdev, in, inlen); in mlx5e_modify_sq()
1806 mlx5_core_destroy_sq(sq->priv->mdev, sq->sqn); in mlx5e_disable_sq()
1817 sq->cev_factor = c->priv->params_ethtool.tx_completion_fact; in mlx5e_open_sq()
1827 err = mlx5e_enable_sq(sq, param, &c->bfreg, c->priv->tisn[tc]); in mlx5e_open_sq()
1902 struct mlx5_core_dev *mdev= sq->priv->mdev; in mlx5e_drain_sq()
1933 (sq->priv->media_status_last & IFM_ACTIVE) != 0 && in mlx5e_drain_sq()
1973 mlx5e_create_cq(struct mlx5e_priv *priv, in mlx5e_create_cq() argument
1979 struct mlx5_core_dev *mdev = priv->mdev; in mlx5e_create_cq()
2011 cq->priv = priv; in mlx5e_create_cq()
2047 mlx5_vector2eqn(cq->priv->mdev, eq_ix, &eqn, &irqn_not_used); in mlx5e_enable_cq()
2054 err = mlx5_core_create_cq(cq->priv->mdev, mcq, in, inlen, out, sizeof(out)); in mlx5e_enable_cq()
2061 mlx5e_cq_arm(cq, MLX5_GET_DOORBELL_LOCK(&cq->priv->doorbell_lock)); in mlx5e_enable_cq()
2070 mlx5_core_destroy_cq(cq->priv->mdev, &cq->mcq); in mlx5e_disable_cq()
2074 mlx5e_open_cq(struct mlx5e_priv *priv, in mlx5e_open_cq() argument
2082 err = mlx5e_create_cq(priv, param, cq, comp, eq_ix); in mlx5e_open_cq()
2112 for (tc = 0; tc < c->priv->num_tc; tc++) { in mlx5e_open_tx_cqs()
2114 err = mlx5e_open_cq(c->priv, &cparam->tx_cq, &c->sq[tc].cq, in mlx5e_open_tx_cqs()
2133 for (tc = 0; tc < c->priv->num_tc; tc++) in mlx5e_close_tx_cqs()
2144 for (tc = 0; tc < c->priv->num_tc; tc++) { in mlx5e_open_sqs()
2164 for (tc = 0; tc < c->priv->num_tc; tc++) in mlx5e_close_sqs_wait()
2169 mlx5e_chan_static_init(struct mlx5e_priv *priv, struct mlx5e_channel *c, int ix) in mlx5e_chan_static_init() argument
2174 c->priv = priv; in mlx5e_chan_static_init()
2178 m_snd_tag_init(&c->tag, c->priv->ifp, &mlx5e_ul_snd_tag_sw); in mlx5e_chan_static_init()
2209 mlx5e_priv_wait_for_completion(struct mlx5e_priv *priv, const uint32_t channels) in mlx5e_priv_wait_for_completion() argument
2214 mlx5e_chan_wait_for_completion(&priv->channel[x]); in mlx5e_priv_wait_for_completion()
2236 mlx5e_open_channel(struct mlx5e_priv *priv, in mlx5e_open_channel() argument
2245 for (i = 0; i != priv->num_tc; i++) in mlx5e_open_channel()
2255 err = mlx5e_open_cq(c->priv, &cparam->rx_cq, &c->rq.cq, in mlx5e_open_channel()
2311 mlx5e_get_wqe_sz(struct mlx5e_priv *priv, u32 *wqe_sz, u32 *nsegs) in mlx5e_get_wqe_sz() argument
2315 r = priv->params.hw_lro_en ? priv->params.lro_wqe_sz : in mlx5e_get_wqe_sz()
2316 MLX5E_SW2MB_MTU(if_getmtu(priv->ifp)); in mlx5e_get_wqe_sz()
2346 mlx5e_build_rq_param(struct mlx5e_priv *priv, in mlx5e_build_rq_param() argument
2353 mlx5e_get_wqe_sz(priv, &wqe_sz, &nsegs); in mlx5e_build_rq_param()
2358 MLX5_SET(wq, wq, log_wq_sz, priv->params.log_rq_size); in mlx5e_build_rq_param()
2359 MLX5_SET(wq, wq, pd, priv->pdn); in mlx5e_build_rq_param()
2365 mlx5e_build_sq_param(struct mlx5e_priv *priv, in mlx5e_build_sq_param() argument
2371 MLX5_SET(wq, wq, log_wq_sz, priv->params.log_sq_size); in mlx5e_build_sq_param()
2373 MLX5_SET(wq, wq, pd, priv->pdn); in mlx5e_build_sq_param()
2379 mlx5e_build_common_cq_param(struct mlx5e_priv *priv, in mlx5e_build_common_cq_param() argument
2384 MLX5_SET(cqc, cqc, uar_page, priv->mdev->priv.uar->index); in mlx5e_build_common_cq_param()
2388 mlx5e_get_default_profile(struct mlx5e_priv *priv, int mode, struct net_dim_cq_moder *ptr) in mlx5e_get_default_profile() argument
2394 if (priv->params.hw_lro_en && in mlx5e_get_default_profile()
2401 mlx5e_build_rx_cq_param(struct mlx5e_priv *priv, in mlx5e_build_rx_cq_param() argument
2414 if (priv->params.cqe_zipping_en) { in mlx5e_build_rx_cq_param()
2419 MLX5_SET(cqc, cqc, log_cq_size, priv->params.log_rq_size); in mlx5e_build_rx_cq_param()
2421 switch (priv->params.rx_cq_moderation_mode) { in mlx5e_build_rx_cq_param()
2423 MLX5_SET(cqc, cqc, cq_period, priv->params.rx_cq_moderation_usec); in mlx5e_build_rx_cq_param()
2424 MLX5_SET(cqc, cqc, cq_max_count, priv->params.rx_cq_moderation_pkts); in mlx5e_build_rx_cq_param()
2428 MLX5_SET(cqc, cqc, cq_period, priv->params.rx_cq_moderation_usec); in mlx5e_build_rx_cq_param()
2429 MLX5_SET(cqc, cqc, cq_max_count, priv->params.rx_cq_moderation_pkts); in mlx5e_build_rx_cq_param()
2430 if (MLX5_CAP_GEN(priv->mdev, cq_period_start_from_cqe)) in mlx5e_build_rx_cq_param()
2436 mlx5e_get_default_profile(priv, NET_DIM_CQ_PERIOD_MODE_START_FROM_EQE, &curr); in mlx5e_build_rx_cq_param()
2442 mlx5e_get_default_profile(priv, NET_DIM_CQ_PERIOD_MODE_START_FROM_CQE, &curr); in mlx5e_build_rx_cq_param()
2445 if (MLX5_CAP_GEN(priv->mdev, cq_period_start_from_cqe)) in mlx5e_build_rx_cq_param()
2454 mlx5e_dim_build_cq_param(priv, param); in mlx5e_build_rx_cq_param()
2456 mlx5e_build_common_cq_param(priv, param); in mlx5e_build_rx_cq_param()
2460 mlx5e_build_tx_cq_param(struct mlx5e_priv *priv, in mlx5e_build_tx_cq_param() argument
2465 MLX5_SET(cqc, cqc, log_cq_size, priv->params.log_sq_size); in mlx5e_build_tx_cq_param()
2466 MLX5_SET(cqc, cqc, cq_period, priv->params.tx_cq_moderation_usec); in mlx5e_build_tx_cq_param()
2467 MLX5_SET(cqc, cqc, cq_max_count, priv->params.tx_cq_moderation_pkts); in mlx5e_build_tx_cq_param()
2469 switch (priv->params.tx_cq_moderation_mode) { in mlx5e_build_tx_cq_param()
2474 if (MLX5_CAP_GEN(priv->mdev, cq_period_start_from_cqe)) in mlx5e_build_tx_cq_param()
2481 mlx5e_build_common_cq_param(priv, param); in mlx5e_build_tx_cq_param()
2485 mlx5e_build_channel_param(struct mlx5e_priv *priv, in mlx5e_build_channel_param() argument
2490 mlx5e_build_rq_param(priv, &cparam->rq); in mlx5e_build_channel_param()
2491 mlx5e_build_sq_param(priv, &cparam->sq); in mlx5e_build_channel_param()
2492 mlx5e_build_rx_cq_param(priv, &cparam->rx_cq); in mlx5e_build_channel_param()
2493 mlx5e_build_tx_cq_param(priv, &cparam->tx_cq); in mlx5e_build_channel_param()
2497 mlx5e_open_channels(struct mlx5e_priv *priv) in mlx5e_open_channels() argument
2505 mlx5e_build_channel_param(priv, cparam); in mlx5e_open_channels()
2506 for (i = 0; i < priv->params.num_channels; i++) { in mlx5e_open_channels()
2507 err = mlx5e_open_channel(priv, cparam, &priv->channel[i]); in mlx5e_open_channels()
2512 if (priv->params_ethtool.irq_cpu_base > -1) { in mlx5e_open_channels()
2519 err = mlx5_vector2eqn(priv->mdev, i, in mlx5e_open_channels()
2526 irq = priv->mdev->priv.msix_arr[nirq].vector; in mlx5e_open_channels()
2527 cpu = (unsigned)(priv->params_ethtool.irq_cpu_base + in mlx5e_open_channels()
2528 i * priv->params_ethtool.irq_cpu_stride) % (unsigned)mp_ncpus; in mlx5e_open_channels()
2540 mlx5e_close_channel(&priv->channel[i]); in mlx5e_open_channels()
2541 mlx5e_close_channel_wait(&priv->channel[i]); in mlx5e_open_channels()
2548 mlx5e_close_channels(struct mlx5e_priv *priv) in mlx5e_close_channels() argument
2552 for (i = 0; i < priv->params.num_channels; i++) in mlx5e_close_channels()
2553 mlx5e_close_channel(&priv->channel[i]); in mlx5e_close_channels()
2554 for (i = 0; i < priv->params.num_channels; i++) in mlx5e_close_channels()
2555 mlx5e_close_channel_wait(&priv->channel[i]); in mlx5e_close_channels()
2559 mlx5e_refresh_sq_params(struct mlx5e_priv *priv, struct mlx5e_sq *sq) in mlx5e_refresh_sq_params() argument
2562 if (MLX5_CAP_GEN(priv->mdev, cq_period_mode_modify)) { in mlx5e_refresh_sq_params()
2565 switch (priv->params.tx_cq_moderation_mode) { in mlx5e_refresh_sq_params()
2575 return (mlx5_core_modify_cq_moderation_mode(priv->mdev, &sq->cq.mcq, in mlx5e_refresh_sq_params()
2576 priv->params.tx_cq_moderation_usec, in mlx5e_refresh_sq_params()
2577 priv->params.tx_cq_moderation_pkts, in mlx5e_refresh_sq_params()
2581 return (mlx5_core_modify_cq_moderation(priv->mdev, &sq->cq.mcq, in mlx5e_refresh_sq_params()
2582 priv->params.tx_cq_moderation_usec, in mlx5e_refresh_sq_params()
2583 priv->params.tx_cq_moderation_pkts)); in mlx5e_refresh_sq_params()
2587 mlx5e_refresh_rq_params(struct mlx5e_priv *priv, struct mlx5e_rq *rq) in mlx5e_refresh_rq_params() argument
2590 if (MLX5_CAP_GEN(priv->mdev, cq_period_mode_modify)) { in mlx5e_refresh_rq_params()
2595 switch (priv->params.rx_cq_moderation_mode) { in mlx5e_refresh_rq_params()
2615 if (priv->params.rx_cq_moderation_mode >= 2) { in mlx5e_refresh_rq_params()
2618 mlx5e_get_default_profile(priv, dim_mode, &curr); in mlx5e_refresh_rq_params()
2620 retval = mlx5_core_modify_cq_moderation_mode(priv->mdev, &rq->cq.mcq, in mlx5e_refresh_rq_params()
2630 retval = mlx5_core_modify_cq_moderation_mode(priv->mdev, &rq->cq.mcq, in mlx5e_refresh_rq_params()
2631 priv->params.rx_cq_moderation_usec, in mlx5e_refresh_rq_params()
2632 priv->params.rx_cq_moderation_pkts, in mlx5e_refresh_rq_params()
2638 return (mlx5_core_modify_cq_moderation(priv->mdev, &rq->cq.mcq, in mlx5e_refresh_rq_params()
2639 priv->params.rx_cq_moderation_usec, in mlx5e_refresh_rq_params()
2640 priv->params.rx_cq_moderation_pkts)); in mlx5e_refresh_rq_params()
2644 mlx5e_refresh_channel_params_sub(struct mlx5e_priv *priv, struct mlx5e_channel *c) in mlx5e_refresh_channel_params_sub() argument
2649 err = mlx5e_refresh_rq_params(priv, &c->rq); in mlx5e_refresh_channel_params_sub()
2653 for (i = 0; i != priv->num_tc; i++) { in mlx5e_refresh_channel_params_sub()
2654 err = mlx5e_refresh_sq_params(priv, &c->sq[i]); in mlx5e_refresh_channel_params_sub()
2663 mlx5e_refresh_channel_params(struct mlx5e_priv *priv) in mlx5e_refresh_channel_params() argument
2668 if (test_bit(MLX5E_STATE_OPENED, &priv->state) == 0) in mlx5e_refresh_channel_params()
2671 for (i = 0; i < priv->params.num_channels; i++) { in mlx5e_refresh_channel_params()
2674 err = mlx5e_refresh_channel_params_sub(priv, &priv->channel[i]); in mlx5e_refresh_channel_params()
2682 mlx5e_open_tis(struct mlx5e_priv *priv, int tc) in mlx5e_open_tis() argument
2684 struct mlx5_core_dev *mdev = priv->mdev; in mlx5e_open_tis()
2691 MLX5_SET(tisc, tisc, transport_domain, priv->tdn); in mlx5e_open_tis()
2693 return (mlx5_core_create_tis(mdev, in, sizeof(in), &priv->tisn[tc])); in mlx5e_open_tis()
2697 mlx5e_close_tis(struct mlx5e_priv *priv, int tc) in mlx5e_close_tis() argument
2699 mlx5_core_destroy_tis(priv->mdev, priv->tisn[tc], 0); in mlx5e_close_tis()
2703 mlx5e_open_tises(struct mlx5e_priv *priv) in mlx5e_open_tises() argument
2705 int num_tc = priv->num_tc; in mlx5e_open_tises()
2710 err = mlx5e_open_tis(priv, tc); in mlx5e_open_tises()
2719 mlx5e_close_tis(priv, tc); in mlx5e_open_tises()
2725 mlx5e_close_tises(struct mlx5e_priv *priv) in mlx5e_close_tises() argument
2727 int num_tc = priv->num_tc; in mlx5e_close_tises()
2731 mlx5e_close_tis(priv, tc); in mlx5e_close_tises()
2735 mlx5e_open_default_rqt(struct mlx5e_priv *priv, u32 *prqtn, int sz) in mlx5e_open_default_rqt() argument
2753 MLX5_SET(rqtc, rqtc, rq_num[i], priv->drop_rq.rqn); in mlx5e_open_default_rqt()
2755 err = mlx5_core_create_rqt(priv->mdev, in, inlen, prqtn); in mlx5e_open_default_rqt()
2762 mlx5e_open_rqts(struct mlx5e_priv *priv) in mlx5e_open_rqts() argument
2767 err = mlx5e_open_default_rqt(priv, &priv->rqtn, in mlx5e_open_rqts()
2768 1 << priv->params.rx_hash_log_tbl_sz); in mlx5e_open_rqts()
2772 for (i = 0; i != priv->mdev->priv.eq_table.num_comp_vectors; i++) { in mlx5e_open_rqts()
2773 err = mlx5e_open_default_rqt(priv, &priv->channel[i].rqtn, 1); in mlx5e_open_rqts()
2781 mlx5_core_destroy_rqt(priv->mdev, priv->channel[i].rqtn, 0); in mlx5e_open_rqts()
2783 mlx5_core_destroy_rqt(priv->mdev, priv->rqtn, 0); in mlx5e_open_rqts()
2790 mlx5e_close_rqts(struct mlx5e_priv *priv) in mlx5e_close_rqts() argument
2794 for (i = 0; i != priv->mdev->priv.eq_table.num_comp_vectors; i++) in mlx5e_close_rqts()
2795 mlx5_core_destroy_rqt(priv->mdev, priv->channel[i].rqtn, 0); in mlx5e_close_rqts()
2797 mlx5_core_destroy_rqt(priv->mdev, priv->rqtn, 0); in mlx5e_close_rqts()
2801 mlx5e_activate_rqt(struct mlx5e_priv *priv) in mlx5e_activate_rqt() argument
2810 sz = 1 << priv->params.rx_hash_log_tbl_sz; in mlx5e_activate_rqt()
2830 ix %= priv->params.num_channels; in mlx5e_activate_rqt()
2833 ix -= ix % (int)priv->params.channels_rsss; in mlx5e_activate_rqt()
2835 MLX5_SET(rqtc, rqtc, rq_num[i], priv->channel[ix].rq.rqn); in mlx5e_activate_rqt()
2838 err = mlx5_core_modify_rqt(priv->mdev, priv->rqtn, in, inlen); in mlx5e_activate_rqt()
2846 for (i = 0; i != priv->mdev->priv.eq_table.num_comp_vectors; i++) { in mlx5e_activate_rqt()
2854 ix %= priv->params.num_channels; in mlx5e_activate_rqt()
2857 ix -= ix % (int)priv->params.channels_rsss; in mlx5e_activate_rqt()
2859 MLX5_SET(rqtc, rqtc, rq_num[0], priv->channel[ix].rq.rqn); in mlx5e_activate_rqt()
2861 err = mlx5_core_modify_rqt(priv->mdev, priv->channel[i].rqtn, in, inlen); in mlx5e_activate_rqt()
2872 mlx5e_deactivate_rqt(struct mlx5e_priv *priv) in mlx5e_deactivate_rqt() argument
2881 sz = 1 << priv->params.rx_hash_log_tbl_sz; in mlx5e_deactivate_rqt()
2894 MLX5_SET(rqtc, rqtc, rq_num[i], priv->drop_rq.rqn); in mlx5e_deactivate_rqt()
2896 err = mlx5_core_modify_rqt(priv->mdev, priv->rqtn, in, inlen); in mlx5e_deactivate_rqt()
2904 for (i = 0; i != priv->mdev->priv.eq_table.num_comp_vectors; i++) { in mlx5e_deactivate_rqt()
2905 MLX5_SET(rqtc, rqtc, rq_num[0], priv->drop_rq.rqn); in mlx5e_deactivate_rqt()
2907 err = mlx5_core_modify_rqt(priv->mdev, priv->channel[i].rqtn, in, inlen); in mlx5e_deactivate_rqt()
2943 mlx5e_build_tir_ctx(struct mlx5e_priv *priv, u32 * tirc, int tt, bool inner_vxlan) in mlx5e_build_tir_ctx() argument
2950 MLX5_SET(tirc, tirc, transport_domain, priv->tdn); in mlx5e_build_tir_ctx()
2966 if (priv->params.hw_lro_en) { in mlx5e_build_tir_ctx()
2971 (priv->params.lro_wqe_sz - in mlx5e_build_tir_ctx()
2975 MLX5_CAP_ETH(priv->mdev, in mlx5e_build_tir_ctx()
2991 priv->rqtn); in mlx5e_build_tir_ctx()
3118 mlx5e_open_tir(struct mlx5e_priv *priv, int tt, bool inner_vxlan) in mlx5e_open_tir() argument
3120 struct mlx5_core_dev *mdev = priv->mdev; in mlx5e_open_tir()
3132 mlx5e_build_tir_ctx(priv, tirc, tt, inner_vxlan); in mlx5e_open_tir()
3135 &priv->tirn_inner_vxlan[tt] : &priv->tirn[tt]); in mlx5e_open_tir()
3143 mlx5e_close_tir(struct mlx5e_priv *priv, int tt, bool inner_vxlan) in mlx5e_close_tir() argument
3145 mlx5_core_destroy_tir(priv->mdev, inner_vxlan ? in mlx5e_close_tir()
3146 priv->tirn_inner_vxlan[tt] : priv->tirn[tt], 0); in mlx5e_close_tir()
3150 mlx5e_open_tirs(struct mlx5e_priv *priv) in mlx5e_open_tirs() argument
3156 err = mlx5e_open_tir(priv, i / 2, (i % 2) ? true : false); in mlx5e_open_tirs()
3165 mlx5e_close_tir(priv, i / 2, (i % 2) ? true : false); in mlx5e_open_tirs()
3171 mlx5e_close_tirs(struct mlx5e_priv *priv) in mlx5e_close_tirs() argument
3176 mlx5e_close_tir(priv, i / 2, (i % 2) ? true : false); in mlx5e_close_tirs()
3186 struct mlx5e_priv *priv = if_getsoftc(ifp); in mlx5e_set_dev_port_mtu() local
3187 struct mlx5_core_dev *mdev = priv->mdev; in mlx5e_set_dev_port_mtu()
3230 priv->params_ethtool.hw_mtu = hw_mtu; in mlx5e_set_dev_port_mtu()
3235 priv->params_ethtool.hw_mtu_msb = hw_mtu; in mlx5e_set_dev_port_mtu()
3243 struct mlx5e_priv *priv = if_getsoftc(ifp); in mlx5e_open_locked() local
3248 if (test_bit(MLX5E_STATE_OPENED, &priv->state) != 0) in mlx5e_open_locked()
3252 if (rss_getnumbuckets() > priv->params.num_channels) { in mlx5e_open_locked()
3255 rss_getnumbuckets(), priv->params.num_channels); in mlx5e_open_locked()
3258 err = mlx5e_open_tises(priv); in mlx5e_open_locked()
3263 err = mlx5_vport_alloc_q_counter(priv->mdev, in mlx5e_open_locked()
3266 mlx5_en_err(priv->ifp, in mlx5e_open_locked()
3271 priv->counter_set_id = set_id; in mlx5e_open_locked()
3273 err = mlx5e_open_channels(priv); in mlx5e_open_locked()
3279 err = mlx5e_activate_rqt(priv); in mlx5e_open_locked()
3285 set_bit(MLX5E_STATE_OPENED, &priv->state); in mlx5e_open_locked()
3287 mlx5e_update_carrier(priv); in mlx5e_open_locked()
3292 mlx5e_close_channels(priv); in mlx5e_open_locked()
3295 mlx5_vport_dealloc_q_counter(priv->mdev, in mlx5e_open_locked()
3296 MLX5_INTERFACE_PROTOCOL_ETH, priv->counter_set_id); in mlx5e_open_locked()
3299 mlx5e_close_tises(priv); in mlx5e_open_locked()
3307 struct mlx5e_priv *priv = arg; in mlx5e_open() local
3309 PRIV_LOCK(priv); in mlx5e_open()
3310 if (mlx5_set_port_status(priv->mdev, MLX5_PORT_UP)) in mlx5e_open()
3311 mlx5_en_err(priv->ifp, in mlx5e_open()
3314 mlx5e_open_locked(priv->ifp); in mlx5e_open()
3315 if_setdrvflagbits(priv->ifp, IFF_DRV_RUNNING, 0); in mlx5e_open()
3316 PRIV_UNLOCK(priv); in mlx5e_open()
3322 struct mlx5e_priv *priv = if_getsoftc(ifp); in mlx5e_close_locked() local
3325 if (test_bit(MLX5E_STATE_OPENED, &priv->state) == 0) in mlx5e_close_locked()
3328 clear_bit(MLX5E_STATE_OPENED, &priv->state); in mlx5e_close_locked()
3330 if_link_state_change(priv->ifp, LINK_STATE_DOWN); in mlx5e_close_locked()
3332 mlx5e_deactivate_rqt(priv); in mlx5e_close_locked()
3333 mlx5e_close_channels(priv); in mlx5e_close_locked()
3334 mlx5_vport_dealloc_q_counter(priv->mdev, in mlx5e_close_locked()
3335 MLX5_INTERFACE_PROTOCOL_ETH, priv->counter_set_id); in mlx5e_close_locked()
3336 mlx5e_close_tises(priv); in mlx5e_close_locked()
3344 struct mlx5e_priv *priv = if_getsoftc(ifp); in mlx5e_get_counter() local
3350 retval = priv->stats.vport.rx_packets; in mlx5e_get_counter()
3353 retval = priv->stats.pport.in_range_len_errors + in mlx5e_get_counter()
3354 priv->stats.pport.out_of_range_len + in mlx5e_get_counter()
3355 priv->stats.pport.too_long_errors + in mlx5e_get_counter()
3356 priv->stats.pport.check_seq_err + in mlx5e_get_counter()
3357 priv->stats.pport.alignment_err; in mlx5e_get_counter()
3360 retval = priv->stats.vport.rx_out_of_buffer; in mlx5e_get_counter()
3363 retval = priv->stats.vport.tx_packets; in mlx5e_get_counter()
3366 retval = priv->stats.port_stats_debug.out_discards; in mlx5e_get_counter()
3369 retval = priv->stats.vport.rx_bytes; in mlx5e_get_counter()
3372 retval = priv->stats.vport.tx_bytes; in mlx5e_get_counter()
3375 retval = priv->stats.vport.rx_multicast_packets; in mlx5e_get_counter()
3378 retval = priv->stats.vport.tx_multicast_packets; in mlx5e_get_counter()
3381 retval = priv->stats.vport.tx_queue_dropped; in mlx5e_get_counter()
3384 retval = priv->stats.pport.collisions; in mlx5e_get_counter()
3397 struct mlx5e_priv *priv = if_getsoftc(ifp); in mlx5e_set_rx_mode() local
3399 queue_work(priv->wq, &priv->set_rx_mode_work); in mlx5e_set_rx_mode()
3405 struct mlx5e_priv *priv; in mlx5e_ioctl() local
3420 priv = if_getsoftc(ifp); in mlx5e_ioctl()
3423 if (priv == NULL || priv->gone != 0) in mlx5e_ioctl()
3430 PRIV_LOCK(priv); in mlx5e_ioctl()
3431 mlx5_query_port_max_mtu(priv->mdev, &max_mtu); in mlx5e_ioctl()
3437 was_opened = test_bit(MLX5E_STATE_OPENED, &priv->state); in mlx5e_ioctl()
3452 PRIV_UNLOCK(priv); in mlx5e_ioctl()
3460 PRIV_LOCK(priv); in mlx5e_ioctl()
3463 if (test_bit(MLX5E_STATE_OPENED, &priv->state) == 0) in mlx5e_ioctl()
3466 mlx5_set_port_status(priv->mdev, MLX5_PORT_UP); in mlx5e_ioctl()
3470 mlx5_set_port_status(priv->mdev, in mlx5e_ioctl()
3472 if (test_bit(MLX5E_STATE_OPENED, &priv->state) != 0) in mlx5e_ioctl()
3474 mlx5e_update_carrier(priv); in mlx5e_ioctl()
3478 PRIV_UNLOCK(priv); in mlx5e_ioctl()
3488 error = ifmedia_ioctl(ifp, ifr, &priv->media, command); in mlx5e_ioctl()
3497 PRIV_LOCK(priv); in mlx5e_ioctl()
3503 PRIV_LOCK(priv); in mlx5e_ioctl()
3571 mlx5e_disable_vlan_filter(priv); in mlx5e_ioctl()
3573 mlx5e_enable_vlan_filter(priv); in mlx5e_ioctl()
3585 mlx5e_del_all_vxlan_rules(priv); in mlx5e_ioctl()
3591 int err = mlx5e_add_all_vxlan_rules(priv); in mlx5e_ioctl()
3607 int was_opened = test_bit(MLX5E_STATE_OPENED, &priv->state); in mlx5e_ioctl()
3614 if (priv->params.hw_lro_en) { in mlx5e_ioctl()
3615 priv->params.hw_lro_en = false; in mlx5e_ioctl()
3619 if (priv->params.hw_lro_en == false && in mlx5e_ioctl()
3620 priv->params_ethtool.hw_lro != 0) { in mlx5e_ioctl()
3621 priv->params.hw_lro_en = true; in mlx5e_ioctl()
3633 if (priv->clbr_done == 0) in mlx5e_ioctl()
3634 mlx5e_reset_calibration_callout(priv); in mlx5e_ioctl()
3636 callout_drain(&priv->tstmp_clbr); in mlx5e_ioctl()
3637 priv->clbr_done = 0; in mlx5e_ioctl()
3646 PRIV_UNLOCK(priv); in mlx5e_ioctl()
3665 PRIV_LOCK(priv); in mlx5e_ioctl()
3667 error = mlx5_query_module_num(priv->mdev, &module_num); in mlx5e_ioctl()
3675 module_status = mlx5_query_module_status(priv->mdev, module_num); in mlx5e_ioctl()
3698 error = mlx5_query_eeprom(priv->mdev, in mlx5e_ioctl()
3710 error = mlx5_query_eeprom(priv->mdev, in mlx5e_ioctl()
3725 PRIV_UNLOCK(priv); in mlx5e_ioctl()
3730 PRIV_LOCK(priv); in mlx5e_ioctl()
3731 error = -mlx5_query_pddr_troubleshooting_info(priv->mdev, NULL, in mlx5e_ioctl()
3733 PRIV_UNLOCK(priv); in mlx5e_ioctl()
3804 struct mlx5e_priv *priv, in mlx5e_build_ifp_priv() argument
3813 priv->params.log_sq_size = in mlx5e_build_ifp_priv()
3815 priv->params.log_rq_size = in mlx5e_build_ifp_priv()
3817 priv->params.rx_cq_moderation_usec = in mlx5e_build_ifp_priv()
3821 priv->params.rx_cq_moderation_mode = in mlx5e_build_ifp_priv()
3823 priv->params.rx_cq_moderation_pkts = in mlx5e_build_ifp_priv()
3825 priv->params.tx_cq_moderation_usec = in mlx5e_build_ifp_priv()
3827 priv->params.tx_cq_moderation_pkts = in mlx5e_build_ifp_priv()
3829 priv->params.rx_hash_log_tbl_sz = in mlx5e_build_ifp_priv()
3834 priv->params.num_tc = 1; in mlx5e_build_ifp_priv()
3835 priv->params.default_vlan_prio = 0; in mlx5e_build_ifp_priv()
3836 priv->counter_set_id = -1; in mlx5e_build_ifp_priv()
3837 priv->params.tx_max_inline = mlx5e_get_max_inline_cap(mdev); in mlx5e_build_ifp_priv()
3839 err = mlx5_query_min_inline(mdev, &priv->params.tx_min_inline_mode); in mlx5e_build_ifp_priv()
3847 priv->params.hw_lro_en = false; in mlx5e_build_ifp_priv()
3848 priv->params.lro_wqe_sz = MLX5E_PARAMS_DEFAULT_LRO_WQE_SZ; in mlx5e_build_ifp_priv()
3856 priv->params.cqe_zipping_en = false; in mlx5e_build_ifp_priv()
3858 priv->mdev = mdev; in mlx5e_build_ifp_priv()
3859 priv->params.num_channels = num_comp_vectors; in mlx5e_build_ifp_priv()
3860 priv->params.channels_rsss = 1; in mlx5e_build_ifp_priv()
3861 priv->order_base_2_num_channels = order_base_2(num_comp_vectors); in mlx5e_build_ifp_priv()
3862 priv->queue_mapping_channel_mask = in mlx5e_build_ifp_priv()
3864 priv->num_tc = priv->params.num_tc; in mlx5e_build_ifp_priv()
3865 priv->default_vlan_prio = priv->params.default_vlan_prio; in mlx5e_build_ifp_priv()
3867 INIT_WORK(&priv->update_stats_work, mlx5e_update_stats_work); in mlx5e_build_ifp_priv()
3868 INIT_WORK(&priv->update_carrier_work, mlx5e_update_carrier_work); in mlx5e_build_ifp_priv()
3869 INIT_WORK(&priv->set_rx_mode_work, mlx5e_set_rx_mode_work); in mlx5e_build_ifp_priv()
3887 mlx5e_create_mkey(struct mlx5e_priv *priv, u32 pdn, in mlx5e_create_mkey() argument
3890 if_t ifp = priv->ifp; in mlx5e_create_mkey()
3891 struct mlx5_core_dev *mdev = priv->mdev; in mlx5e_create_mkey()
3931 mlx5e_priv_static_init(struct mlx5e_priv *priv, struct mlx5_core_dev *mdev, in mlx5e_priv_static_init() argument
3937 mtx_init(&priv->async_events_mtx, "mlx5async", MTX_NETWORK_LOCK, MTX_DEF); in mlx5e_priv_static_init()
3938 sx_init(&priv->state_lock, "mlx5state"); in mlx5e_priv_static_init()
3939 callout_init_mtx(&priv->watchdog, &priv->async_events_mtx, 0); in mlx5e_priv_static_init()
3940 MLX5_INIT_DOORBELL_LOCK(&priv->doorbell_lock); in mlx5e_priv_static_init()
3942 mlx5e_chan_static_init(priv, &priv->channel[x], x); in mlx5e_priv_static_init()
3945 err = mlx5_alloc_bfreg(mdev, &priv->channel[x].bfreg, false, false); in mlx5e_priv_static_init()
3953 mlx5_free_bfreg(mdev, &priv->channel[x].bfreg); in mlx5e_priv_static_init()
3956 mlx5e_chan_static_destroy(&priv->channel[x]); in mlx5e_priv_static_init()
3957 callout_drain(&priv->watchdog); in mlx5e_priv_static_init()
3958 mtx_destroy(&priv->async_events_mtx); in mlx5e_priv_static_init()
3959 sx_destroy(&priv->state_lock); in mlx5e_priv_static_init()
3964 mlx5e_priv_static_destroy(struct mlx5e_priv *priv, struct mlx5_core_dev *mdev, in mlx5e_priv_static_destroy() argument
3970 mlx5_free_bfreg(mdev, &priv->channel[x].bfreg); in mlx5e_priv_static_destroy()
3972 mlx5e_chan_static_destroy(&priv->channel[x]); in mlx5e_priv_static_destroy()
3973 callout_drain(&priv->watchdog); in mlx5e_priv_static_destroy()
3974 mtx_destroy(&priv->async_events_mtx); in mlx5e_priv_static_destroy()
3975 sx_destroy(&priv->state_lock); in mlx5e_priv_static_destroy()
3989 struct mlx5e_priv *priv = arg1; in sysctl_firmware() local
3992 snprintf(fw, sizeof(fw), "%d.%d.%d", fw_rev_maj(priv->mdev), fw_rev_min(priv->mdev), in sysctl_firmware()
3993 fw_rev_sub(priv->mdev)); in sysctl_firmware()
4003 for (i = 0; i < ch->priv->num_tc; i++) in mlx5e_disable_tx_dma()
4054 for (i = 0; i < ch->priv->num_tc; i++) in mlx5e_enable_tx_dma()
4117 mlx5e_modify_tx_dma(struct mlx5e_priv *priv, uint8_t value) in mlx5e_modify_tx_dma() argument
4121 if (test_bit(MLX5E_STATE_OPENED, &priv->state) == 0) in mlx5e_modify_tx_dma()
4124 for (i = 0; i < priv->params.num_channels; i++) { in mlx5e_modify_tx_dma()
4126 mlx5e_disable_tx_dma(&priv->channel[i]); in mlx5e_modify_tx_dma()
4128 mlx5e_enable_tx_dma(&priv->channel[i]); in mlx5e_modify_tx_dma()
4133 mlx5e_modify_rx_dma(struct mlx5e_priv *priv, uint8_t value) in mlx5e_modify_rx_dma() argument
4137 if (test_bit(MLX5E_STATE_OPENED, &priv->state) == 0) in mlx5e_modify_rx_dma()
4140 for (i = 0; i < priv->params.num_channels; i++) { in mlx5e_modify_rx_dma()
4142 mlx5e_disable_rx_dma(&priv->channel[i]); in mlx5e_modify_rx_dma()
4144 mlx5e_enable_rx_dma(&priv->channel[i]); in mlx5e_modify_rx_dma()
4149 mlx5e_add_hw_stats(struct mlx5e_priv *priv) in mlx5e_add_hw_stats() argument
4151 SYSCTL_ADD_PROC(&priv->sysctl_ctx, SYSCTL_CHILDREN(priv->sysctl_hw), in mlx5e_add_hw_stats()
4153 priv, 0, sysctl_firmware, "A", "HCA firmware version"); in mlx5e_add_hw_stats()
4155 SYSCTL_ADD_STRING(&priv->sysctl_ctx, SYSCTL_CHILDREN(priv->sysctl_hw), in mlx5e_add_hw_stats()
4156 OID_AUTO, "board_id", CTLFLAG_RD, priv->mdev->board_id, 0, in mlx5e_add_hw_stats()
4163 struct mlx5e_priv *priv = arg1; in mlx5e_sysctl_tx_priority_flow_control() local
4169 PRIV_LOCK(priv); in mlx5e_sysctl_tx_priority_flow_control()
4171 tx_pfc = priv->params.tx_priority_flow_control; in mlx5e_sysctl_tx_priority_flow_control()
4183 priv->params.tx_priority_flow_control = 0; in mlx5e_sysctl_tx_priority_flow_control()
4191 priv->params.tx_priority_flow_control |= (temp[i] << i); in mlx5e_sysctl_tx_priority_flow_control()
4195 if (tx_pfc != priv->params.tx_priority_flow_control) in mlx5e_sysctl_tx_priority_flow_control()
4196 err = -mlx5e_set_port_pfc(priv); in mlx5e_sysctl_tx_priority_flow_control()
4199 priv->params.tx_priority_flow_control= tx_pfc; in mlx5e_sysctl_tx_priority_flow_control()
4200 PRIV_UNLOCK(priv); in mlx5e_sysctl_tx_priority_flow_control()
4208 struct mlx5e_priv *priv = arg1; in mlx5e_sysctl_rx_priority_flow_control() local
4214 PRIV_LOCK(priv); in mlx5e_sysctl_rx_priority_flow_control()
4216 rx_pfc = priv->params.rx_priority_flow_control; in mlx5e_sysctl_rx_priority_flow_control()
4228 priv->params.rx_priority_flow_control = 0; in mlx5e_sysctl_rx_priority_flow_control()
4236 priv->params.rx_priority_flow_control |= (temp[i] << i); in mlx5e_sysctl_rx_priority_flow_control()
4240 if (rx_pfc != priv->params.rx_priority_flow_control) { in mlx5e_sysctl_rx_priority_flow_control()
4241 err = -mlx5e_set_port_pfc(priv); in mlx5e_sysctl_rx_priority_flow_control()
4242 if (err == 0 && priv->sw_is_port_buf_owner) in mlx5e_sysctl_rx_priority_flow_control()
4243 err = mlx5e_update_buf_lossy(priv); in mlx5e_sysctl_rx_priority_flow_control()
4247 priv->params.rx_priority_flow_control= rx_pfc; in mlx5e_sysctl_rx_priority_flow_control()
4248 PRIV_UNLOCK(priv); in mlx5e_sysctl_rx_priority_flow_control()
4254 mlx5e_setup_pauseframes(struct mlx5e_priv *priv) in mlx5e_setup_pauseframes() argument
4259 priv->params.tx_pauseframe_control = 1; in mlx5e_setup_pauseframes()
4260 priv->params.rx_pauseframe_control = 1; in mlx5e_setup_pauseframes()
4263 priv->params.tx_priority_flow_control = 0; in mlx5e_setup_pauseframes()
4264 priv->params.rx_priority_flow_control = 0; in mlx5e_setup_pauseframes()
4267 SYSCTL_ADD_INT(&priv->sysctl_ctx, SYSCTL_CHILDREN(priv->sysctl_ifnet), in mlx5e_setup_pauseframes()
4269 &priv->params.tx_pauseframe_control, 0, in mlx5e_setup_pauseframes()
4272 SYSCTL_ADD_INT(&priv->sysctl_ctx, SYSCTL_CHILDREN(priv->sysctl_ifnet), in mlx5e_setup_pauseframes()
4274 &priv->params.rx_pauseframe_control, 0, in mlx5e_setup_pauseframes()
4278 SYSCTL_ADD_PROC(&priv->sysctl_ctx, SYSCTL_CHILDREN(priv->sysctl_ifnet), in mlx5e_setup_pauseframes()
4280 CTLFLAG_MPSAFE, priv, 0, &mlx5e_sysctl_tx_priority_flow_control, "CU", in mlx5e_setup_pauseframes()
4283 SYSCTL_ADD_PROC(&priv->sysctl_ctx, SYSCTL_CHILDREN(priv->sysctl_ifnet), in mlx5e_setup_pauseframes()
4285 CTLFLAG_MPSAFE, priv, 0, &mlx5e_sysctl_rx_priority_flow_control, "CU", in mlx5e_setup_pauseframes()
4288 PRIV_LOCK(priv); in mlx5e_setup_pauseframes()
4291 priv->params.tx_pauseframe_control = in mlx5e_setup_pauseframes()
4292 priv->params.tx_pauseframe_control ? 1 : 0; in mlx5e_setup_pauseframes()
4293 priv->params.rx_pauseframe_control = in mlx5e_setup_pauseframes()
4294 priv->params.rx_pauseframe_control ? 1 : 0; in mlx5e_setup_pauseframes()
4297 error = mlx5e_set_port_pause_and_pfc(priv); in mlx5e_setup_pauseframes()
4299 mlx5_en_err(priv->ifp, in mlx5e_setup_pauseframes()
4301 priv->params.rx_priority_flow_control = 0; in mlx5e_setup_pauseframes()
4302 priv->params.tx_priority_flow_control = 0; in mlx5e_setup_pauseframes()
4305 (void) mlx5e_set_port_pause_and_pfc(priv); in mlx5e_setup_pauseframes()
4307 PRIV_UNLOCK(priv); in mlx5e_setup_pauseframes()
4315 struct mlx5e_priv *priv; in mlx5e_ul_snd_tag_alloc() local
4318 priv = if_getsoftc(ifp); in mlx5e_ul_snd_tag_alloc()
4320 if (unlikely(priv->gone || params->hdr.flowtype == M_HASHTYPE_NONE)) { in mlx5e_ul_snd_tag_alloc()
4324 u32 ch = priv->params.num_channels; in mlx5e_ul_snd_tag_alloc()
4341 pch = priv->channel + ch; in mlx5e_ul_snd_tag_alloc()
4445 mlx5e_ifm_add(struct mlx5e_priv *priv, int type) in mlx5e_ifm_add() argument
4447 ifmedia_add(&priv->media, type | IFM_ETHER, 0, NULL); in mlx5e_ifm_add()
4448 ifmedia_add(&priv->media, type | IFM_ETHER | in mlx5e_ifm_add()
4450 ifmedia_add(&priv->media, type | IFM_ETHER | IFM_ETH_RXPAUSE, 0, NULL); in mlx5e_ifm_add()
4451 ifmedia_add(&priv->media, type | IFM_ETHER | IFM_ETH_TXPAUSE, 0, NULL); in mlx5e_ifm_add()
4452 ifmedia_add(&priv->media, type | IFM_ETHER | IFM_FDX, 0, NULL); in mlx5e_ifm_add()
4453 ifmedia_add(&priv->media, type | IFM_ETHER | IFM_FDX | in mlx5e_ifm_add()
4455 ifmedia_add(&priv->media, type | IFM_ETHER | IFM_FDX | in mlx5e_ifm_add()
4457 ifmedia_add(&priv->media, type | IFM_ETHER | IFM_FDX | in mlx5e_ifm_add()
4465 struct mlx5e_priv *priv; in mlx5e_create_ifp() local
4468 int ncv = mdev->priv.eq_table.num_comp_vectors; in mlx5e_create_ifp()
4486 priv = malloc_domainset(sizeof(*priv) + in mlx5e_create_ifp()
4487 (sizeof(priv->channel[0]) * mdev->priv.eq_table.num_comp_vectors), in mlx5e_create_ifp()
4490 ifp = priv->ifp = if_alloc_dev(IFT_ETHER, mdev->pdev->dev.bsddev); in mlx5e_create_ifp()
4496 if (mlx5e_priv_static_init(priv, mdev, mdev->priv.eq_table.num_comp_vectors)) { in mlx5e_create_ifp()
4501 if_setsoftc(ifp, priv); in mlx5e_create_ifp()
4556 sysctl_ctx_init(&priv->sysctl_ctx); in mlx5e_create_ifp()
4557 priv->sysctl_ifnet = SYSCTL_ADD_NODE(&priv->sysctl_ctx, SYSCTL_STATIC_CHILDREN(_dev), in mlx5e_create_ifp()
4560 if (priv->sysctl_ifnet == NULL) { in mlx5e_create_ifp()
4565 priv->sysctl_ifnet = SYSCTL_ADD_NODE(&priv->sysctl_ctx, SYSCTL_CHILDREN(priv->sysctl_ifnet), in mlx5e_create_ifp()
4568 if (priv->sysctl_ifnet == NULL) { in mlx5e_create_ifp()
4575 priv->sysctl_hw = SYSCTL_ADD_NODE(&priv->sysctl_ctx, child, in mlx5e_create_ifp()
4578 if (priv->sysctl_hw == NULL) { in mlx5e_create_ifp()
4583 err = mlx5e_build_ifp_priv(mdev, priv, ncv); in mlx5e_create_ifp()
4590 priv->wq = mdev->priv.health.wq_watchdog; in mlx5e_create_ifp()
4592 err = mlx5_core_alloc_pd(mdev, &priv->pdn, 0); in mlx5e_create_ifp()
4597 err = mlx5_alloc_transport_domain(mdev, &priv->tdn, 0); in mlx5e_create_ifp()
4603 err = mlx5e_create_mkey(priv, priv->pdn, &priv->mr); in mlx5e_create_ifp()
4608 mlx5_query_nic_vport_mac_address(priv->mdev, 0, dev_addr); in mlx5e_create_ifp()
4611 if (MLX5_CAP_GEN(priv->mdev, vport_group_manager) == 0 && in mlx5e_create_ifp()
4617 err = mlx5e_rl_init(priv); in mlx5e_create_ifp()
4623 err = mlx5e_tls_init(priv); in mlx5e_create_ifp()
4629 err = mlx5e_open_drop_rq(priv, &priv->drop_rq); in mlx5e_create_ifp()
4635 err = mlx5e_open_rqts(priv); in mlx5e_create_ifp()
4641 err = mlx5e_open_tirs(priv); in mlx5e_create_ifp()
4647 err = mlx5e_open_flow_tables(priv); in mlx5e_create_ifp()
4653 err = mlx5e_tls_rx_init(priv); in mlx5e_create_ifp()
4663 priv->media_status_last = IFM_AVALID; in mlx5e_create_ifp()
4664 priv->media_active_last = IFM_ETHER | IFM_AUTO | IFM_FDX; in mlx5e_create_ifp()
4667 mlx5e_setup_pauseframes(priv); in mlx5e_create_ifp()
4681 ifmedia_init(&priv->media, IFM_IMASK, in mlx5e_create_ifp()
4703 mlx5e_ifm_add(priv, media_entry.subtype); in mlx5e_create_ifp()
4719 mlx5e_ifm_add(priv, media_entry.subtype); in mlx5e_create_ifp()
4723 mlx5e_ifm_add(priv, IFM_10G_LR); in mlx5e_create_ifp()
4728 mlx5e_ifm_add(priv, IFM_AUTO); in mlx5e_create_ifp()
4731 ifmedia_set(&priv->media, IFM_ETHER | IFM_AUTO | IFM_FDX | in mlx5e_create_ifp()
4739 priv->vlan_attach = EVENTHANDLER_REGISTER(vlan_config, in mlx5e_create_ifp()
4740 mlx5e_vlan_rx_add_vid, priv, EVENTHANDLER_PRI_FIRST); in mlx5e_create_ifp()
4741 priv->vlan_detach = EVENTHANDLER_REGISTER(vlan_unconfig, in mlx5e_create_ifp()
4742 mlx5e_vlan_rx_kill_vid, priv, EVENTHANDLER_PRI_FIRST); in mlx5e_create_ifp()
4745 priv->vxlan_start = EVENTHANDLER_REGISTER(vxlan_start, in mlx5e_create_ifp()
4746 mlx5e_vxlan_start, priv, EVENTHANDLER_PRI_ANY); in mlx5e_create_ifp()
4747 priv->vxlan_stop = EVENTHANDLER_REGISTER(vxlan_stop, in mlx5e_create_ifp()
4748 mlx5e_vxlan_stop, priv, EVENTHANDLER_PRI_ANY); in mlx5e_create_ifp()
4753 mlx5e_enable_async_events(priv); in mlx5e_create_ifp()
4755 mlx5e_add_hw_stats(priv); in mlx5e_create_ifp()
4757 mlx5e_create_stats(&priv->stats.vport.ctx, SYSCTL_CHILDREN(priv->sysctl_ifnet), in mlx5e_create_ifp()
4759 priv->stats.vport.arg); in mlx5e_create_ifp()
4761 mlx5e_create_stats(&priv->stats.pport.ctx, SYSCTL_CHILDREN(priv->sysctl_ifnet), in mlx5e_create_ifp()
4763 priv->stats.pport.arg); in mlx5e_create_ifp()
4765 mlx5e_create_ethtool(priv); in mlx5e_create_ifp()
4767 mtx_lock(&priv->async_events_mtx); in mlx5e_create_ifp()
4768 mlx5e_update_stats(priv); in mlx5e_create_ifp()
4769 mtx_unlock(&priv->async_events_mtx); in mlx5e_create_ifp()
4771 SYSCTL_ADD_INT(&priv->sysctl_ctx, SYSCTL_CHILDREN(priv->sysctl_ifnet), in mlx5e_create_ifp()
4773 &priv->clbr_done, 0, in mlx5e_create_ifp()
4775 callout_init(&priv->tstmp_clbr, 1); in mlx5e_create_ifp()
4777 priv->cclk = (uint64_t)MLX5_CAP_GEN(mdev, device_frequency_khz) * 1000ULL; in mlx5e_create_ifp()
4778 mlx5e_reset_calibration_callout(priv); in mlx5e_create_ifp()
4784 priv->pfil = pfil_head_register(&pa); in mlx5e_create_ifp()
4786 PRIV_LOCK(priv); in mlx5e_create_ifp()
4787 err = mlx5e_open_flow_rules(priv); in mlx5e_create_ifp()
4792 PRIV_UNLOCK(priv); in mlx5e_create_ifp()
4794 return (priv); in mlx5e_create_ifp()
4797 mlx5e_close_flow_tables(priv); in mlx5e_create_ifp()
4800 mlx5e_close_tirs(priv); in mlx5e_create_ifp()
4803 mlx5e_close_rqts(priv); in mlx5e_create_ifp()
4806 mlx5e_close_drop_rq(&priv->drop_rq); in mlx5e_create_ifp()
4809 mlx5e_tls_cleanup(priv); in mlx5e_create_ifp()
4812 mlx5e_rl_cleanup(priv); in mlx5e_create_ifp()
4815 mlx5_core_destroy_mkey(priv->mdev, &priv->mr); in mlx5e_create_ifp()
4818 mlx5_dealloc_transport_domain(mdev, priv->tdn, 0); in mlx5e_create_ifp()
4821 mlx5_core_dealloc_pd(mdev, priv->pdn, 0); in mlx5e_create_ifp()
4824 flush_workqueue(priv->wq); in mlx5e_create_ifp()
4827 sysctl_ctx_free(&priv->sysctl_ctx); in mlx5e_create_ifp()
4828 if (priv->sysctl_debug) in mlx5e_create_ifp()
4829 sysctl_ctx_free(&priv->stats.port_stats_debug.ctx); in mlx5e_create_ifp()
4830 mlx5e_priv_static_destroy(priv, mdev, mdev->priv.eq_table.num_comp_vectors); in mlx5e_create_ifp()
4836 free(priv, M_MLX5EN); in mlx5e_create_ifp()
4843 struct mlx5e_priv *priv = vpriv; in mlx5e_destroy_ifp() local
4844 if_t ifp = priv->ifp; in mlx5e_destroy_ifp()
4847 priv->gone = 1; in mlx5e_destroy_ifp()
4858 while (READ_ONCE(priv->rl.stats.tx_active_connections) != 0) { in mlx5e_destroy_ifp()
4859 mlx5_en_err(priv->ifp, in mlx5e_destroy_ifp()
4867 while (priv->tls.init != 0 && in mlx5e_destroy_ifp()
4868 uma_zone_get_cur(priv->tls.zone) != 0) { in mlx5e_destroy_ifp()
4869 mlx5_en_err(priv->ifp, in mlx5e_destroy_ifp()
4875 while (priv->tls_rx.init != 0 && in mlx5e_destroy_ifp()
4876 uma_zone_get_cur(priv->tls_rx.zone) != 0) { in mlx5e_destroy_ifp()
4877 mlx5_en_err(priv->ifp, in mlx5e_destroy_ifp()
4883 mlx5e_priv_wait_for_completion(priv, mdev->priv.eq_table.num_comp_vectors); in mlx5e_destroy_ifp()
4886 callout_drain(&priv->watchdog); in mlx5e_destroy_ifp()
4888 callout_drain(&priv->tstmp_clbr); in mlx5e_destroy_ifp()
4890 if (priv->vlan_attach != NULL) in mlx5e_destroy_ifp()
4891 EVENTHANDLER_DEREGISTER(vlan_config, priv->vlan_attach); in mlx5e_destroy_ifp()
4892 if (priv->vlan_detach != NULL) in mlx5e_destroy_ifp()
4893 EVENTHANDLER_DEREGISTER(vlan_unconfig, priv->vlan_detach); in mlx5e_destroy_ifp()
4894 if (priv->vxlan_start != NULL) in mlx5e_destroy_ifp()
4895 EVENTHANDLER_DEREGISTER(vxlan_start, priv->vxlan_start); in mlx5e_destroy_ifp()
4896 if (priv->vxlan_stop != NULL) in mlx5e_destroy_ifp()
4897 EVENTHANDLER_DEREGISTER(vxlan_stop, priv->vxlan_stop); in mlx5e_destroy_ifp()
4900 PRIV_LOCK(priv); in mlx5e_destroy_ifp()
4902 mlx5e_close_flow_rules(priv); in mlx5e_destroy_ifp()
4903 PRIV_UNLOCK(priv); in mlx5e_destroy_ifp()
4906 if (priv->pfil != NULL) { in mlx5e_destroy_ifp()
4907 pfil_head_unregister(priv->pfil); in mlx5e_destroy_ifp()
4908 priv->pfil = NULL; in mlx5e_destroy_ifp()
4912 ifmedia_removeall(&priv->media); in mlx5e_destroy_ifp()
4915 mlx5e_tls_rx_cleanup(priv); in mlx5e_destroy_ifp()
4916 mlx5e_close_flow_tables(priv); in mlx5e_destroy_ifp()
4917 mlx5e_close_tirs(priv); in mlx5e_destroy_ifp()
4918 mlx5e_close_rqts(priv); in mlx5e_destroy_ifp()
4919 mlx5e_close_drop_rq(&priv->drop_rq); in mlx5e_destroy_ifp()
4920 mlx5e_tls_cleanup(priv); in mlx5e_destroy_ifp()
4921 mlx5e_rl_cleanup(priv); in mlx5e_destroy_ifp()
4924 sysctl_ctx_free(&priv->stats.vport.ctx); in mlx5e_destroy_ifp()
4925 sysctl_ctx_free(&priv->stats.pport.ctx); in mlx5e_destroy_ifp()
4926 if (priv->sysctl_debug) in mlx5e_destroy_ifp()
4927 sysctl_ctx_free(&priv->stats.port_stats_debug.ctx); in mlx5e_destroy_ifp()
4928 sysctl_ctx_free(&priv->sysctl_ctx); in mlx5e_destroy_ifp()
4930 mlx5_core_destroy_mkey(priv->mdev, &priv->mr); in mlx5e_destroy_ifp()
4931 mlx5_dealloc_transport_domain(priv->mdev, priv->tdn, 0); in mlx5e_destroy_ifp()
4932 mlx5_core_dealloc_pd(priv->mdev, priv->pdn, 0); in mlx5e_destroy_ifp()
4933 mlx5e_disable_async_events(priv); in mlx5e_destroy_ifp()
4934 flush_workqueue(priv->wq); in mlx5e_destroy_ifp()
4935 mlx5e_priv_static_destroy(priv, mdev, mdev->priv.eq_table.num_comp_vectors); in mlx5e_destroy_ifp()
4937 free(priv, M_MLX5EN); in mlx5e_destroy_ifp()
4944 struct mlx5e_priv *priv = if_getsoftc(dev); in mlx5_en_debugnet_init() local
4946 PRIV_LOCK(priv); in mlx5_en_debugnet_init()
4947 *nrxr = priv->params.num_channels; in mlx5_en_debugnet_init()
4950 PRIV_UNLOCK(priv); in mlx5_en_debugnet_init()
4961 struct mlx5e_priv *priv = if_getsoftc(dev); in mlx5_en_debugnet_transmit() local
4966 IFF_DRV_RUNNING || (priv->media_status_last & IFM_ACTIVE) == 0) in mlx5_en_debugnet_transmit()
4969 sq = &priv->channel[0].sq[0]; in mlx5_en_debugnet_transmit()
4991 struct mlx5e_priv *priv = if_getsoftc(dev); in mlx5_en_debugnet_poll() local
4994 (priv->media_status_last & IFM_ACTIVE) == 0) in mlx5_en_debugnet_poll()
4997 mlx5_poll_interrupts(priv->mdev); in mlx5_en_debugnet_poll()
5006 struct mlx5e_priv *priv = vpriv; in mlx5e_get_ifp() local
5008 return (priv->ifp); in mlx5e_get_ifp()