dev/pci/pci.c

121 static void		pci_hdrtypedata(device_t pcib, int b, int s, int f,
123 static void		pci_read_cap(device_t pcib, pcicfgregs *cfg);
124 static int		pci_read_vpd_reg(device_t pcib, pcicfgregs *cfg,
127 static int		pci_write_vpd_reg(device_t pcib, pcicfgregs *cfg,
130 static void		pci_read_vpd(device_t pcib, pcicfgregs *cfg);
137 static struct pci_devinfo * pci_fill_devinfo(device_t pcib, device_t bus, int d,
233 EARLY_DRIVER_MODULE(pci, pcib, pci_driver, pci_modevent, NULL, BUS_PASS_BUS);
652 pci_hdrtypedata(device_t pcib, int b, int s, int f, pcicfgregs *cfg)
654 #define	REG(n, w)	PCIB_READ_CONFIG(pcib, b, s, f, n, w)
687 pci_read_device(device_t pcib, device_t bus, int d, int b, int s, int f)
689 #define	REG(n, w)	PCIB_READ_CONFIG(pcib, b, s, f, n, w)
698 	return (pci_fill_devinfo(pcib, bus, d, b, s, f, vid, did));
710 pci_fill_devinfo(device_t pcib, device_t bus, int d, int b, int s, int f,
745 	pci_hdrtypedata(pcib, b, s, f, cfg);
748 		pci_read_cap(pcib, cfg);
776 pci_ea_fill_info(device_t pcib, pcicfgregs *cfg)
778 #define	REG(n, w)	PCIB_READ_CONFIG(pcib, cfg->bus, cfg->slot, cfg->func, \
850 pci_read_cap(device_t pcib, pcicfgregs *cfg)
852 #define	REG(n, w)	PCIB_READ_CONFIG(pcib, cfg->bus, cfg->slot, cfg->func, n, w)
853 #define	WREG(n, v, w)	PCIB_WRITE_CONFIG(pcib, cfg->bus, cfg->slot, cfg->func, n, v, w)
916 						device_printf(pcib,
988 			pci_ea_fill_info(pcib, cfg);
1003 		device_printf(pcib,
1021 pci_read_vpd_reg(device_t pcib, pcicfgregs *cfg, int reg, uint32_t *data)
1041 pci_write_vpd_reg(device_t pcib, pcicfgregs *cfg, int reg, uint32_t data)
1062 	device_t	pcib;
1078 		if (pci_read_vpd_reg(vrs->pcib, vrs->cfg, vrs->off, &reg))
1301 pci_parse_vpd(device_t pcib, pcicfgregs *cfg)
1310 	vrs.pcib = pcib;
1366 pci_read_vpd(device_t pcib, pcicfgregs *cfg)
1370 	status = pci_parse_vpd(pcib, cfg);
2976  * pci-pci-bridge.  Both kinds are represented by instances of pcib.
4131 pci_identify_function(device_t pcib, device_t dev, int domain, int busno,
4136 	dinfo = pci_read_device(pcib, dev, domain, busno, slot, func);
4146 #define	REG(n, w)	PCIB_READ_CONFIG(pcib, busno, s, f, n, w)
4147 	device_t pcib = device_get_parent(dev);
4160 	dinfo = pci_identify_function(pcib, dev, domain, busno, 0, 0);
4162 		PCIB_TRY_ENABLE_ARI(pcib, dinfo->cfg.dev);
4170 	maxslots = PCIB_MAXSLOTS(pcib);
4183 			pcifunchigh = PCIB_MAXFUNCS(pcib);
4185 			pci_identify_function(pcib, dev, domain, busno, s, f);
4193 #define	REG(n, w)	PCIB_READ_CONFIG(pcib, busno, s, f, n, w)
4194 	device_t pcib = device_get_parent(dev);
4216 	maxslots = PCIB_MAXSLOTS(pcib);
4227 			pcifunchigh = PCIB_MAXFUNCS(pcib);
4247 			pci_identify_function(pcib, dev, domain, busno, s, f);
4291 	device_t pcib;
4294 	pcib = device_get_parent(bus);
4296 	PCIB_DECODE_RID(pcib, rid, &busno, &slot, &func);
4298 	vf_dinfo = pci_fill_devinfo(pcib, bus, pci_get_domain(pcib), busno,
4509 	 * the parent pcib what our domain and bus numbers are.
4572 	device_t pcib;
4582 	pcib = device_get_parent(dev);
4585 	    PCIB_POWER_FOR_SLEEP(pcib, child, &dstate) == 0)
6453 	device_t pcib, bus;
6468 		pcib = device_get_parent(bus);
6469 		KASSERT(pcib != NULL, ("%s: null bridge of %s", __func__,
6473 		 * pcib's parent must be a PCI bus for this to be a
6476 		if (device_get_devclass(device_get_parent(pcib)) != pci_class)
6479 		dinfo = device_get_ivars(pcib);
6482 			return (pcib);
6484 		dev = pcib;