71 	uint32_t reg;  in qcom_tlmm_ipq4018_hw_pin_set_function()  local
78 	reg = GPIO_READ(sc, QCOM_TLMM_IPQ4018_REG_PIN(pin,  in qcom_tlmm_ipq4018_hw_pin_set_function()
80 	reg &= ~(QCOM_TLMM_IPQ4018_REG_PIN_CONTROL_MUX_MASK  in qcom_tlmm_ipq4018_hw_pin_set_function()
82 	reg |= (function & QCOM_TLMM_IPQ4018_REG_PIN_CONTROL_MUX_MASK)  in qcom_tlmm_ipq4018_hw_pin_set_function()
85 	    QCOM_TLMM_IPQ4018_REG_PIN_CONTROL), reg);  in qcom_tlmm_ipq4018_hw_pin_set_function()
99 	uint32_t reg;  in qcom_tlmm_ipq4018_hw_pin_get_function()  local
107 	reg = GPIO_READ(sc, QCOM_TLMM_IPQ4018_REG_PIN(pin,  in qcom_tlmm_ipq4018_hw_pin_get_function()
109 	reg = reg >> QCOM_TLMM_IPQ4018_REG_PIN_CONTROL_MUX_SHIFT;  in qcom_tlmm_ipq4018_hw_pin_get_function()
110 	reg &= QCOM_TLMM_IPQ4018_REG_PIN_CONTROL_MUX_MASK;  in qcom_tlmm_ipq4018_hw_pin_get_function()
111 	*function = reg;  in qcom_tlmm_ipq4018_hw_pin_get_function()
124 	uint32_t reg;  in qcom_tlmm_ipq4018_hw_pin_set_oe_output()  local
131 	reg = GPIO_READ(sc, QCOM_TLMM_IPQ4018_REG_PIN(pin,  in qcom_tlmm_ipq4018_hw_pin_set_oe_output()
133 	reg |= QCOM_TLMM_IPQ4018_REG_PIN_CONTROL_OE_ENABLE;  in qcom_tlmm_ipq4018_hw_pin_set_oe_output()
136 	    reg);  in qcom_tlmm_ipq4018_hw_pin_set_oe_output()
149 	uint32_t reg;  in qcom_tlmm_ipq4018_hw_pin_set_oe_input()  local
156 	reg = GPIO_READ(sc, QCOM_TLMM_IPQ4018_REG_PIN(pin,  in qcom_tlmm_ipq4018_hw_pin_set_oe_input()
158 	reg &= ~QCOM_TLMM_IPQ4018_REG_PIN_CONTROL_OE_ENABLE;  in qcom_tlmm_ipq4018_hw_pin_set_oe_input()
160 	    QCOM_TLMM_IPQ4018_REG_PIN_CONTROL), reg);  in qcom_tlmm_ipq4018_hw_pin_set_oe_input()
173 	uint32_t reg;  in qcom_tlmm_ipq4018_hw_pin_get_oe_state()  local
180 	reg = GPIO_READ(sc, QCOM_TLMM_IPQ4018_REG_PIN(pin,  in qcom_tlmm_ipq4018_hw_pin_get_oe_state()
182 	*is_output = !! (reg & QCOM_TLMM_IPQ4018_REG_PIN_CONTROL_OE_ENABLE);  in qcom_tlmm_ipq4018_hw_pin_get_oe_state()
195 	uint32_t reg;  in qcom_tlmm_ipq4018_hw_pin_set_output_value()  local
202 	reg = GPIO_READ(sc, QCOM_TLMM_IPQ4018_REG_PIN(pin,  in qcom_tlmm_ipq4018_hw_pin_set_output_value()
205 		reg |= QCOM_TLMM_IPQ4018_REG_PIN_IO_OUTPUT_EN;  in qcom_tlmm_ipq4018_hw_pin_set_output_value()
207 		reg &= ~QCOM_TLMM_IPQ4018_REG_PIN_IO_OUTPUT_EN;  in qcom_tlmm_ipq4018_hw_pin_set_output_value()
209 	    QCOM_TLMM_IPQ4018_REG_PIN_IO), reg);  in qcom_tlmm_ipq4018_hw_pin_set_output_value()
221 	uint32_t reg;  in qcom_tlmm_ipq4018_hw_pin_get_output_value()  local
228 	reg = GPIO_READ(sc, QCOM_TLMM_IPQ4018_REG_PIN(pin,  in qcom_tlmm_ipq4018_hw_pin_get_output_value()
231 	*val = !! (reg & QCOM_TLMM_IPQ4018_REG_PIN_IO_INPUT_STATUS);  in qcom_tlmm_ipq4018_hw_pin_get_output_value()
244 	uint32_t reg;  in qcom_tlmm_ipq4018_hw_pin_get_input_value()  local
251 	reg = GPIO_READ(sc, QCOM_TLMM_IPQ4018_REG_PIN(pin,  in qcom_tlmm_ipq4018_hw_pin_get_input_value()
254 	*val = !! (reg & QCOM_TLMM_IPQ4018_REG_PIN_IO_INPUT_STATUS);  in qcom_tlmm_ipq4018_hw_pin_get_input_value()
266 	uint32_t reg;  in qcom_tlmm_ipq4018_hw_pin_toggle_output_value()  local
273 	reg = GPIO_READ(sc, QCOM_TLMM_IPQ4018_REG_PIN(pin,  in qcom_tlmm_ipq4018_hw_pin_toggle_output_value()
275 	if ((reg & QCOM_TLMM_IPQ4018_REG_PIN_IO_OUTPUT_EN) == 0)  in qcom_tlmm_ipq4018_hw_pin_toggle_output_value()
276 		reg |= QCOM_TLMM_IPQ4018_REG_PIN_IO_OUTPUT_EN;  in qcom_tlmm_ipq4018_hw_pin_toggle_output_value()
278 		reg &= ~QCOM_TLMM_IPQ4018_REG_PIN_IO_OUTPUT_EN;  in qcom_tlmm_ipq4018_hw_pin_toggle_output_value()
280 	    QCOM_TLMM_IPQ4018_REG_PIN_IO), reg);  in qcom_tlmm_ipq4018_hw_pin_toggle_output_value()
295 	uint32_t reg;  in qcom_tlmm_ipq4018_hw_pin_set_pupd_config()  local
302 	reg = GPIO_READ(sc, QCOM_TLMM_IPQ4018_REG_PIN(pin,  in qcom_tlmm_ipq4018_hw_pin_set_pupd_config()
305 	reg &= ~(QCOM_TLMM_IPQ4018_REG_PIN_CONTROL_PUPD_MASK  in qcom_tlmm_ipq4018_hw_pin_set_pupd_config()
310 		reg |= QCOM_TLMM_IPQ4018_REG_PIN_CONTROL_PUPD_DISABLE  in qcom_tlmm_ipq4018_hw_pin_set_pupd_config()
314 		reg |= QCOM_TLMM_IPQ4018_REG_PIN_CONTROL_PUPD_PULLDOWN  in qcom_tlmm_ipq4018_hw_pin_set_pupd_config()
318 		reg |= QCOM_TLMM_IPQ4018_REG_PIN_CONTROL_PUPD_PULLUP  in qcom_tlmm_ipq4018_hw_pin_set_pupd_config()
322 		reg |= QCOM_TLMM_IPQ4018_REG_PIN_CONTROL_PUPD_BUSHOLD  in qcom_tlmm_ipq4018_hw_pin_set_pupd_config()
328 	    QCOM_TLMM_IPQ4018_REG_PIN_CONTROL), reg);  in qcom_tlmm_ipq4018_hw_pin_set_pupd_config()
341 	uint32_t reg;  in qcom_tlmm_ipq4018_hw_pin_get_pupd_config()  local
348 	reg = GPIO_READ(sc, QCOM_TLMM_IPQ4018_REG_PIN(pin,  in qcom_tlmm_ipq4018_hw_pin_get_pupd_config()
351 	reg >>= QCOM_TLMM_IPQ4018_REG_PIN_CONTROL_PUPD_SHIFT;  in qcom_tlmm_ipq4018_hw_pin_get_pupd_config()
352 	reg &= QCOM_TLMM_IPQ4018_REG_PIN_CONTROL_PUPD_MASK;  in qcom_tlmm_ipq4018_hw_pin_get_pupd_config()
354 	switch (reg) {  in qcom_tlmm_ipq4018_hw_pin_get_pupd_config()
379 	uint32_t reg;  in qcom_tlmm_ipq4018_hw_pin_set_drive_strength()  local
391 	reg = GPIO_READ(sc, QCOM_TLMM_IPQ4018_REG_PIN(pin,  in qcom_tlmm_ipq4018_hw_pin_set_drive_strength()
394 	reg &= ~(QCOM_TLMM_IPQ4018_REG_PIN_CONTROL_DRIVE_STRENGTH_SHIFT  in qcom_tlmm_ipq4018_hw_pin_set_drive_strength()
396 	reg |= (drv & QCOM_TLMM_IPQ4018_REG_PIN_CONTROL_DRIVE_STRENGTH_MASK)  in qcom_tlmm_ipq4018_hw_pin_set_drive_strength()
400 	    QCOM_TLMM_IPQ4018_REG_PIN_CONTROL), reg);  in qcom_tlmm_ipq4018_hw_pin_set_drive_strength()
412 	uint32_t reg;  in qcom_tlmm_ipq4018_hw_pin_get_drive_strength()  local
419 	reg = GPIO_READ(sc, QCOM_TLMM_IPQ4018_REG_PIN(pin,  in qcom_tlmm_ipq4018_hw_pin_get_drive_strength()
422 	*drv = (reg >> QCOM_TLMM_IPQ4018_REG_PIN_CONTROL_DRIVE_STRENGTH_SHIFT)  in qcom_tlmm_ipq4018_hw_pin_get_drive_strength()
438 	uint32_t reg;  in qcom_tlmm_ipq4018_hw_pin_set_vm()  local
445 	reg = GPIO_READ(sc, QCOM_TLMM_IPQ4018_REG_PIN(pin,  in qcom_tlmm_ipq4018_hw_pin_set_vm()
448 	reg &= ~QCOM_TLMM_IPQ4018_REG_PIN_CONTROL_VM_ENABLE;  in qcom_tlmm_ipq4018_hw_pin_set_vm()
450 		reg |= QCOM_TLMM_IPQ4018_REG_PIN_CONTROL_VM_ENABLE;  in qcom_tlmm_ipq4018_hw_pin_set_vm()
453 	    QCOM_TLMM_IPQ4018_REG_PIN_CONTROL), reg);  in qcom_tlmm_ipq4018_hw_pin_set_vm()
465 	uint32_t reg;  in qcom_tlmm_ipq4018_hw_pin_get_vm()  local
472 	reg = GPIO_READ(sc, QCOM_TLMM_IPQ4018_REG_PIN(pin,  in qcom_tlmm_ipq4018_hw_pin_get_vm()
475 	*enable = !! (reg & QCOM_TLMM_IPQ4018_REG_PIN_CONTROL_VM_ENABLE);  in qcom_tlmm_ipq4018_hw_pin_get_vm()
487 	uint32_t reg;  in qcom_tlmm_ipq4018_hw_pin_set_open_drain()  local
494 	reg = GPIO_READ(sc, QCOM_TLMM_IPQ4018_REG_PIN(pin,  in qcom_tlmm_ipq4018_hw_pin_set_open_drain()
497 	reg &= ~QCOM_TLMM_IPQ4018_REG_PIN_CONTROL_OD_ENABLE;  in qcom_tlmm_ipq4018_hw_pin_set_open_drain()
499 		reg |= QCOM_TLMM_IPQ4018_REG_PIN_CONTROL_OD_ENABLE;  in qcom_tlmm_ipq4018_hw_pin_set_open_drain()
502 	    QCOM_TLMM_IPQ4018_REG_PIN_CONTROL), reg);  in qcom_tlmm_ipq4018_hw_pin_set_open_drain()
514 	uint32_t reg;  in qcom_tlmm_ipq4018_hw_pin_get_open_drain()  local
521 	reg = GPIO_READ(sc, QCOM_TLMM_IPQ4018_REG_PIN(pin,  in qcom_tlmm_ipq4018_hw_pin_get_open_drain()
524 	*enable = !! (reg & QCOM_TLMM_IPQ4018_REG_PIN_CONTROL_OD_ENABLE);  in qcom_tlmm_ipq4018_hw_pin_get_open_drain()