Lines Matching refs:irq

69 static void	xicp_bind(device_t dev, u_int irq, cpuset_t cpumask, void **priv);
108 int irq; member
299 xicp_setup_priv(struct xicp_softc *sc, u_int irq, void **priv) in xicp_setup_priv() argument
317 xicp_bind(device_t dev, u_int irq, cpuset_t cpumask, void **priv) in xicp_bind() argument
325 if (irq == MAX_XICP_IRQS) in xicp_bind()
328 iv = xicp_setup_priv(sc, irq, priv); in xicp_bind()
352 error = rtas_call_method(sc->ibm_set_xive, 3, 1, irq, cpu, in xicp_bind()
356 error = opal_call(OPAL_SET_XIVE, irq, cpu << 2, XICP_PRIORITY); in xicp_bind()
360 panic("Cannot bind interrupt %d to CPU %d", irq, cpu); in xicp_bind()
417 if (sc->intvecs[i].irq == xirr) in xicp_dispatch()
428 xicp_enable(device_t dev, u_int irq, u_int vector, void **priv) in xicp_enable() argument
439 intr = xicp_setup_priv(sc, irq, priv); in xicp_enable()
441 intr->irq = irq; in xicp_enable()
447 if (irq == MAX_XICP_IRQS) { in xicp_enable()
453 rtas_call_method(sc->ibm_set_xive, 3, 1, irq, cpu, in xicp_enable()
455 xicp_unmask(dev, irq, intr); in xicp_enable()
458 status = opal_call(OPAL_SET_XIVE, irq, cpu << 2, XICP_PRIORITY); in xicp_enable()
462 panic("OPAL_SET_XIVE IRQ %d -> cpu %d failed: %d", irq, in xicp_enable()
469 xicp_eoi(device_t dev, u_int irq, void *priv) in xicp_eoi() argument
476 if (irq == MAX_XICP_IRQS) /* Remap IPI interrupt to internal value */ in xicp_eoi()
477 irq = XICP_IPI; in xicp_eoi()
478 xirr = irq | (0xff << 24); in xicp_eoi()
515 xicp_mask(device_t dev, u_int irq, void *priv) in xicp_mask() argument
520 if (irq == MAX_XICP_IRQS) in xicp_mask()
524 rtas_call_method(sc->ibm_int_off, 1, 1, irq, &status); in xicp_mask()
530 opal_call(OPAL_SET_XIVE, irq, ivec->cpu << 2, 0xff); in xicp_mask()
536 xicp_unmask(device_t dev, u_int irq, void *priv) in xicp_unmask() argument
541 if (irq == MAX_XICP_IRQS) in xicp_unmask()
545 rtas_call_method(sc->ibm_int_on, 1, 1, irq, &status); in xicp_unmask()
551 opal_call(OPAL_SET_XIVE, irq, ivec->cpu << 2, XICP_PRIORITY); in xicp_unmask()