201 			mtx_unlock_spin(&icu_lock);  in _ioapic_eoi_source()
276 	mtx_unlock_spin(&icu_lock);  in ioapic_enable_source()
297 	mtx_unlock_spin(&icu_lock);  in ioapic_disable_source()
334 		mtx_unlock_spin(&icu_lock);  in ioapic_program_intpin()
343 	mtx_unlock_spin(&icu_lock);  in ioapic_program_intpin()
414 	mtx_unlock_spin(&icu_lock);  in ioapic_reprogram_intpin()
469 		mtx_unlock_spin(&icu_lock);  in ioapic_assign_cpu()
486 	mtx_unlock_spin(&icu_lock);  in ioapic_assign_cpu()
526 		mtx_unlock_spin(&icu_lock);  in ioapic_disable_intr()
590 	mtx_unlock_spin(&icu_lock);  in ioapic_config_intr()
603 	mtx_unlock_spin(&icu_lock);  in ioapic_resume()
622 	mtx_unlock_spin(&icu_lock);  in ioapic_create()
641 	mtx_unlock_spin(&icu_lock);  in ioapic_create()
716 		mtx_unlock_spin(&icu_lock);  in ioapic_create()
724 	mtx_unlock_spin(&icu_lock);  in ioapic_create()
925 	mtx_unlock_spin(&icu_lock);  in ioapic_register()
1022 	mtx_unlock_spin(&icu_lock);  in ioapic_pci_attach()
1047 	mtx_unlock_spin(&icu_lock);  in ioapic_pci_attach()
1074 	mtx_unlock_spin(&icu_lock);  in ioapic_get_rid()