Lines Matching refs:val
46 spr_tcp_state(val("t_state")), in t6_display_tcb_aux_0()
47 val("t_state"), in t6_display_tcb_aux_0()
48 spr_ip_version(val("ip_version")), in t6_display_tcb_aux_0()
49 val("lock_tid"), in t6_display_tcb_aux_0()
50 val("rss_fw") in t6_display_tcb_aux_0()
53 val("l2t_ix"), in t6_display_tcb_aux_0()
54 val("smac_sel"), in t6_display_tcb_aux_0()
55 val("tos") in t6_display_tcb_aux_0()
58 val("t_maxseg"), val("recv_scale"), in t6_display_tcb_aux_0()
59 val("recv_tstmp"), val("recv_sack")); in t6_display_tcb_aux_0()
64 val("timer"), val("dack_timer")); in t6_display_tcb_aux_0()
66 val("mod_schd_tx"), in t6_display_tcb_aux_0()
67 val("mod_schd_rx"), in t6_display_tcb_aux_0()
68 ((val("mod_schd_reason2")<<2) | (val("mod_schd_reason1")<<1) | in t6_display_tcb_aux_0()
69 val("mod_schd_reason0")) in t6_display_tcb_aux_0()
74 val("max_rt"), val("t_rxtshift"), in t6_display_tcb_aux_0()
75 val("keepalive")); in t6_display_tcb_aux_0()
77 val("timestamp_offset"),val("timestamp")); in t6_display_tcb_aux_0()
81 val("t_rtt_ts_recent_age"), val("t_rtseq_recent")); in t6_display_tcb_aux_0()
83 val("t_srtt"),val("t_rttvar")); in t6_display_tcb_aux_0()
92 val("snd_una"),val("snd_nxt"), in t6_display_tcb_aux_0()
93 val("snd_max"),val("tx_max")); in t6_display_tcb_aux_0()
95 val("core_fin"), SEQ_SUB(val("tx_max"),val("snd_una")) in t6_display_tcb_aux_0()
97 if (val("recv_scale") && !val("active_open")) { in t6_display_tcb_aux_0()
99 val("rcv_adv"), val("rcv_scale"), in t6_display_tcb_aux_0()
100 val("rcv_adv") << val("rcv_scale"), in t6_display_tcb_aux_0()
101 val("recv_scale"), val("rcv_scale"), val("active_open")); in t6_display_tcb_aux_0()
104 val("rcv_adv"), val("rcv_scale"), in t6_display_tcb_aux_0()
105 val("recv_scale"), val("active_open")); in t6_display_tcb_aux_0()
109 val("snd_cwnd") , val("snd_ssthresh"), val("snd_rec") in t6_display_tcb_aux_0()
116 spr_cctrl_sel(val("cctrl_sel0"),val("cctrl_sel1")), in t6_display_tcb_aux_0()
117 val("cctrl_ecn"), val("cctrl_ece"), val("cctrl_cwr"), in t6_display_tcb_aux_0()
118 val("cctrl_rfr")); in t6_display_tcb_aux_0()
120 val("t_dupacks"), val("dupack_count_odd"),val("fast_recovery")); in t6_display_tcb_aux_0()
122 val("core_more"),val("core_urg"),val("core_push")); in t6_display_tcb_aux_0()
123 PR(" core_flush %u\n",val("core_flush")); in t6_display_tcb_aux_0()
125 val("nagle"), val("ssws_disabled"), val("turbo")); in t6_display_tcb_aux_0()
126 PR(" tx_pdu_out %u\n",val("tx_pdu_out")); in t6_display_tcb_aux_0()
128 val("tx_pace_auto"),val("tx_pace_fixed"),val("tx_queue")); in t6_display_tcb_aux_0()
131 PR(" tx_quiesce %u\n",val("tx_quiesce")); in t6_display_tcb_aux_0()
133 val("tx_channel"), in t6_display_tcb_aux_0()
134 (val("tx_channel")>>1)&1, in t6_display_tcb_aux_0()
135 val("tx_channel")&1 in t6_display_tcb_aux_0()
142 val("tx_hdr_ptr"),val("tx_last_ptr"),val("tx_compact")); in t6_display_tcb_aux_0()
149 val("ts_last_ack_sent"),val("rx_compact")); in t6_display_tcb_aux_0()
151 val("rcv_nxt"), val("rx_hdr_offset")); in t6_display_tcb_aux_0()
153 val("rx_frag0_start_idx"), in t6_display_tcb_aux_0()
154 val("rx_frag0_len"), in t6_display_tcb_aux_0()
155 val("rx_ptr")); in t6_display_tcb_aux_0()
157 val("rx_frag1_start_idx_offset"), in t6_display_tcb_aux_0()
158 val("rx_frag1_len")); in t6_display_tcb_aux_0()
163 …if (val("ulp_type")!=4) { /* RDMA has FRAG1 idx && len, but no ptr? Should I not display frag1 at… in t6_display_tcb_aux_0()
164 PR("frag1_ptr 0x%-8x\n",val("rx_frag1_ptr")); in t6_display_tcb_aux_0()
170 if (val("ulp_type") != 9 && val("ulp_type")!=8 && val("ulp_type") !=6 && in t6_display_tcb_aux_0()
171 val("ulp_type") != 5 && val("ulp_type") !=4) { in t6_display_tcb_aux_0()
173 val("rx_frag2_start_idx_offset"), in t6_display_tcb_aux_0()
174 val("rx_frag2_len"), in t6_display_tcb_aux_0()
175 val("rx_frag2_ptr")); in t6_display_tcb_aux_0()
177 val("rx_frag3_start_idx_offset"), in t6_display_tcb_aux_0()
178 val("rx_frag3_len"), in t6_display_tcb_aux_0()
179 val("rx_frag3_ptr")); in t6_display_tcb_aux_0()
188 val("peer_fin"),val("rx_pdu_out"), val("pdu_len")); in t6_display_tcb_aux_0()
193 if (val("recv_scale")) { in t6_display_tcb_aux_0()
195 val("rcv_wnd"), val("snd_scale"), in t6_display_tcb_aux_0()
196 val("rcv_wnd") >> val("snd_scale"), in t6_display_tcb_aux_0()
197 val("recv_scale")); in t6_display_tcb_aux_0()
200 val("rcv_wnd"), val("snd_scale"), in t6_display_tcb_aux_0()
201 val("recv_scale")); in t6_display_tcb_aux_0()
208 val("dack_mss"),val("dack"),val("dack_not_acked")); in t6_display_tcb_aux_0()
210 val("rcv_coalesce_enable"), in t6_display_tcb_aux_0()
211 val("rcv_coalesce_push"), in t6_display_tcb_aux_0()
212 val("rcv_coalesce_last_psh"), in t6_display_tcb_aux_0()
213 val("rcv_coalesce_heartbeat")); in t6_display_tcb_aux_0()
216 val("rx_channel"), val("rx_quiesce"), in t6_display_tcb_aux_0()
217 val("rx_flow_control_disable")); in t6_display_tcb_aux_0()
219 val("rx_flow_control_ddp")); in t6_display_tcb_aux_0()
224 ((val("pend_ctl2")<<2) | (val("pend_ctl1")<<1) | in t6_display_tcb_aux_0()
225 val("pend_ctl0")), in t6_display_tcb_aux_0()
226 val("core_bypass"),val("main_slush")); in t6_display_tcb_aux_0()
228 val("migrating"), in t6_display_tcb_aux_0()
229 val("ask_mode"), val("non_offload"), val("rss_info")); in t6_display_tcb_aux_0()
231 val("ulp_type"), spr_ulp_type(val("ulp_type")), in t6_display_tcb_aux_0()
232 val("ulp_raw")); in t6_display_tcb_aux_0()
236 PR(", ulp_ext %u",val("ulp_ext")); in t6_display_tcb_aux_0()
244 val("rdma_error"), val("rdma_flm_error")); in t6_display_tcb_aux_0()
254 val("aux1_slush0"), val("aux1_slush1")); in t6_display_tcb_aux_1()
255 PR(" pdu_hdr_len %u\n",val("pdu_hdr_len")); in t6_display_tcb_aux_1()
267 val("qp_id"), val("pd_id"),val("stag")); in t6_display_tcb_aux_2()
269 val("irs_ulp"),val("iss_ulp")); in t6_display_tcb_aux_2()
271 val("tx_pdu_len")); in t6_display_tcb_aux_2()
273 val("cq_idx_sq"),val("cq_idx_rq")); in t6_display_tcb_aux_2()
275 val("rq_start"),val("rq_msn"),val("rq_max_offset"), in t6_display_tcb_aux_2()
276 val("rq_write_ptr")); in t6_display_tcb_aux_2()
278 val("ord_l_bit_vld"),val("rdmap_opcode")); in t6_display_tcb_aux_2()
280 val("tx_flush"),val("tx_oos_rxmt"),val("tx_oos_txmt")); in t6_display_tcb_aux_2()
295 val("aux3_slush"),val("ddp_buf0_unused"),val("ddp_buf1_unused")); in t6_display_tcb_aux_3()
299 val("ddp_indicate_fll"),val("tls_key_mode")); in t6_display_tcb_aux_3()
304 val("ddp_off"),val("ddp_active_buf"),val("ddp_indicate_out"), in t6_display_tcb_aux_3()
305 val("ddp_wait_frag"),val("ddp_rx2tx"),val("ddp_buf_inf") in t6_display_tcb_aux_3()
311 val("ddp_buf0_indicate"), in t6_display_tcb_aux_3()
312 val("ddp_pshf_enable_0"), val("ddp_push_disable_0"), in t6_display_tcb_aux_3()
313 val("ddp_buf0_flush"), val("ddp_psh_no_invalidate0") in t6_display_tcb_aux_3()
316 val("ddp_buf1_indicate"), in t6_display_tcb_aux_3()
317 val("ddp_pshf_enable_1"), val("ddp_push_disable_1"), in t6_display_tcb_aux_3()
318 val("ddp_buf1_flush"), val("ddp_psh_no_invalidate1") in t6_display_tcb_aux_3()
332 val("ddp_buf0_valid"),val("rx_ddp_buf0_offset"), in t6_display_tcb_aux_3()
333 val("rx_ddp_buf0_len"),val("rx_ddp_buf0_tag") in t6_display_tcb_aux_3()
337 if (0==val("ddp_off") && 1==val("ddp_buf0_valid") && 0==val("ddp_active_buf")) { in t6_display_tcb_aux_3()
345 val("ddp_buf1_valid"),val("rx_ddp_buf1_offset"), in t6_display_tcb_aux_3()
346 val("rx_ddp_buf1_len"),val("rx_ddp_buf1_tag") in t6_display_tcb_aux_3()
352 if (0==val("ddp_off") && 1==val("ddp_buf1_valid") && 1==val("ddp_active_buf")) { in t6_display_tcb_aux_3()
363 if (1==val("ddp_off")) { in t6_display_tcb_aux_3()
365 } else if (1==val("ddp_buf0_valid") && 0==val("ddp_active_buf")) { in t6_display_tcb_aux_3()
368 val("rx_ddp_buf0_len"),val("rx_ddp_buf0_offset"), in t6_display_tcb_aux_3()
369 val("rx_ddp_buf0_len")-val("rx_ddp_buf0_offset") in t6_display_tcb_aux_3()
371 if (1==val("ddp_buf1_valid")) { in t6_display_tcb_aux_3()
373 val("rx_ddp_buf1_len"),val("rx_ddp_buf1_offset"), in t6_display_tcb_aux_3()
374 val("rx_ddp_buf1_len")-val("rx_ddp_buf1_offset") in t6_display_tcb_aux_3()
377 } else if (1==val("ddp_buf1_valid") && 1==val("ddp_active_buf")) { in t6_display_tcb_aux_3()
380 val("rx_ddp_buf1_len"),val("rx_ddp_buf1_offset"), in t6_display_tcb_aux_3()
381 val("rx_ddp_buf1_len")-val("rx_ddp_buf1_offset") in t6_display_tcb_aux_3()
383 if (1==val("ddp_buf0_valid")) { in t6_display_tcb_aux_3()
385 val("rx_ddp_buf0_len"),val("rx_ddp_buf0_offset"), in t6_display_tcb_aux_3()
386 val("rx_ddp_buf0_len")-val("rx_ddp_buf0_offset") in t6_display_tcb_aux_3()
389 } else if (0==val("ddp_buf0_valid") && 1==val("ddp_buf1_valid") && 0==val("ddp_active_buf")) { in t6_display_tcb_aux_3()
391 } else if (1==val("ddp_buf0_valid") && 0==val("ddp_buf1_valid") && 1==val("ddp_active_buf")) { in t6_display_tcb_aux_3()
399 if (0==val("ddp_indicate_out")) { in t6_display_tcb_aux_3()
400 if (0==val("ddp_buf0_indicate") && 0==val("ddp_buf1_indicate")) { in t6_display_tcb_aux_3()
402 if (0==val("rx_hdr_offset")) { in t6_display_tcb_aux_3()
406 val("rx_hdr_offset")); in t6_display_tcb_aux_3()
411 } else if (1==val("ddp_indicate_out")) { in t6_display_tcb_aux_3()
413 if (0==val("rx_hdr_offset")) { in t6_display_tcb_aux_3()
417 val("rx_hdr_offset")); in t6_display_tcb_aux_3()
432 val("rx_tls_buf_offset"),val("rx_tls_buf_len"), in t6_display_tcb_aux_4()
433 val("rx_tls_flags")); in t6_display_tcb_aux_4()
436 val("rx_tls_buf_tag"),val("rx_tls_key_tag")); in t6_display_tcb_aux_4()